From nobody Thu Oct 2 11:58:09 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23C1537C104; Wed, 17 Sep 2025 15:38:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758123534; cv=none; b=VCIvhsaNLc2VV093uSocfIryKE1qAb0CBYXGNLKZ16ILTGYMHPULHaQLlUR1ROIyaSEKdZYijVJsIpiKa5T4jNSiaVZJ2my+L6pIcvu6uCxcHHQZtjxRVt7Ya0E7aWEJEzw0DQFo88V9ZUWzLOulGfaY8SCgLCRgrLBygeub0zQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758123534; c=relaxed/simple; bh=otgrb/vF+atbB3mWxRg3GACduHocftu87TGfvm3zQwU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XfyTzXuP5kJjBjNmmYAnxu3nPfWVHY+cF3JiVLT2JC+9xVf9szRSXi6axJ8BlFENzeiHNmV6/9m+0rCpREG1N/bU2Kk/XxZrAaMoY3uRVxvV/KWCMhaQXIbdACKXNPnYquE08CjFrdTnE1X0Xxd3eQexC4PvlHEJepOUOk+Kkv0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rnzY7XLh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rnzY7XLh" Received: by smtp.kernel.org (Postfix) with ESMTPS id 01435C4CEF5; Wed, 17 Sep 2025 15:38:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758123534; bh=otgrb/vF+atbB3mWxRg3GACduHocftu87TGfvm3zQwU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=rnzY7XLhlu2LuyUvRtzJBLKAWuI4r5EqAqbXFtGsUDT8gVx7CHG9AuvxpseocUpQs SmhCAW7ds79FPfd/5U1ZT2l6TGYP55wQInCMm4tVWHHYsrJf/2DwJxa2SpZAPYKjnV G0AAa402PEjOnjg0DbvkQHIfK7qfNczmqb/p5ghSlXyS22LbOseII39SclM3sSU7bz RsY+plgT8UR1f1mQDxCpE2Q/vRgvRp2e3dOdC+rP1Fa77VpINGay3BWHmHR6g3tw6B 65eI6eFFtH88tykvu1saPnGty0GoFChU/mheCezByAmjEe7tkhsMaRqjcaividMkRk j9k20eBBG98ig== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBCE5CAC5A0; Wed, 17 Sep 2025 15:38:53 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 17 Sep 2025 17:38:56 +0200 Subject: [PATCH v11 16/17] arm64: dts: rockchip: add mipi csi-2 receiver node to rk356x Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v11-16-af0eada54e5d@collabora.com> References: <20240220-rk3568-vicap-v11-0-af0eada54e5d@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v11-0-af0eada54e5d@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758123529; l=1644; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=mp3pf9RuqEGrye/HxgD+x+5GeyykIBGgvJ6m8tMl1hs=; b=Dp0dy1jjVh7QZr9Viym/ViFATmbF25T6MXpeYbETF3q+CsmM9Rpr2ss+NarQHxpOR6IDguezc 04RcRQ4mXVtCsWQUYRNxBEh3yYbr3sHQC8MxZ6hcPj036OpaYXv+weF X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add the device tree node for the RK356x MIPI CSI-2 Receiver. Signed-off-by: Michael Riesch Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 34 +++++++++++++++++++++++= ++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk356x-base.dtsi index e0e4dc85a3a9..4c3dbcabd834 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -564,6 +564,36 @@ gpu: gpu@fde60000 { status =3D "disabled"; }; =20 + csi: csi@fdfb0000 { + compatible =3D "rockchip,rk3568-mipi-csi"; + reg =3D <0x0 0xfdfb0000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "irq1", "irq2"; + clocks =3D <&cru PCLK_CSI2HOST1>; + phys =3D <&csi_dphy>; + power-domains =3D <&power RK3568_PD_VI>; + resets =3D <&cru SRST_P_CSI2HOST1>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi_in: port@0 { + reg =3D <0>; + }; + + csi_out: port@1 { + reg =3D <1>; + + csi_output: endpoint { + remote-endpoint =3D <&vicap_mipi_input>; + }; + }; + }; + }; + vicap: video-capture@fdfe0000 { compatible =3D "rockchip,rk3568-vicap"; reg =3D <0x0 0xfdfe0000 0x0 0x200>; @@ -592,6 +622,10 @@ vicap_dvp: port@0 { =20 vicap_mipi: port@1 { reg =3D <1>; + + vicap_mipi_input: endpoint { + remote-endpoint =3D <&csi_output>; + }; }; }; }; --=20 2.39.5