From nobody Thu Oct 2 11:57:47 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6DC337427A; Wed, 17 Sep 2025 15:38:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758123533; cv=none; b=cxoy11DiUjgousIGAHBC5ICP6oui8jdde/+HkiObLi3aUJk4vbJDo7MQ6RKKC/G+I/KGm1dw8g2ISdayTy91ghc0nH2gP0YNhuMkmWtwv1Gi3y1T3Y/1ySg3FmxdL99sh9x1xXgs60naF9jEGlzBDxl4SmBsNm1ympDGsSI3kLM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758123533; c=relaxed/simple; bh=YSpsViLLxuGU5D7Je8IyTHQdkElj63SWDdwwcUdbm2k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aplvKJO9+ZdgxL7mqvMd4XuPr9RzmEvx+dRizdzr2eIW8I0TGw3efu3TsZYRWLa8ONSRA4ll7ZDZCOSEo4k6ZZiXQ/RMCPCsOJ8aH4dsZTVyzpDowxnzrTUwuYnVgzBgdFAHXCqLaWJjaDS1Qxe8zc7IxaBhm2C7an7p/51VB/g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TT0eHG6n; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TT0eHG6n" Received: by smtp.kernel.org (Postfix) with ESMTPS id B67A8C4CEFB; Wed, 17 Sep 2025 15:38:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758123533; bh=YSpsViLLxuGU5D7Je8IyTHQdkElj63SWDdwwcUdbm2k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TT0eHG6n1hS2N1gf/bIkjGFEtng84CKzOrUDjyqTtWV8GCNDqfVZphweI6kQ6L06v zIc0z9bkjjCAanmCxl5eVp3Mi7LznjnT13c41Qo5G7TPaOKy4ZHjRCowx6zn9jUMlm Qrkvf64eqsGqleGjzabFEjkHMHh2VVfW2T/giDTvjPF3zW8bLs37LPdtD8ibETN4s4 RZETT4dioWebYkETBr6GHpvzPzAFcdii8NOEkMHdQQwGGOqFqF4Eewzqq3Lji4euKk DRE/QpiAl4TcyRm6+H+SchLrCLqJASqF1FucYk2RIolgGojc/E6nU5ZfQwvztr4NT0 pW8j3xYsi1Hyw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD939CAC5A5; Wed, 17 Sep 2025 15:38:53 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 17 Sep 2025 17:38:53 +0200 Subject: [PATCH v11 13/17] arm64: defconfig: enable rockchip camera interface and mipi csi-2 receiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v11-13-af0eada54e5d@collabora.com> References: <20240220-rk3568-vicap-v11-0-af0eada54e5d@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v11-0-af0eada54e5d@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1758123529; l=894; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=6z5w5UXmlNjJJGtSNqVj5CL67RL9SU86TrsgtDUqqGs=; b=ajD0e0JuPzJWO68dvsoaeSUwJxVvBkuZE/llxh9eJa57Om31MDUD7LTekIEc1E75TpctCmtOP U953rsTn4gyAxVMdzBC+Xvf8d8+z+f9I10rd7jxACdrFy8tLMB/UjW2 X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Rockchip Camera Interface (CIF) and the Rockchip MIPI CSI-2 Receiver are featured in many Rockchip SoCs in different variations. Enable the drivers for them in the default configuration. Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 58f87d09366c..625cb5b47fb5 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -876,6 +876,8 @@ CONFIG_VIDEO_RENESAS_FCP=3Dm CONFIG_VIDEO_RENESAS_FDP1=3Dm CONFIG_VIDEO_RENESAS_VSP1=3Dm CONFIG_VIDEO_RCAR_DRIF=3Dm +CONFIG_VIDEO_ROCKCHIP_CIF=3Dm +CONFIG_VIDEO_ROCKCHIP_CSI=3Dm CONFIG_VIDEO_ROCKCHIP_RGA=3Dm CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=3Dm CONFIG_VIDEO_SAMSUNG_S5P_JPEG=3Dm --=20 2.39.5