From nobody Sat Oct 4 09:36:23 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EEFC527D77B; Mon, 18 Aug 2025 23:39:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755560388; cv=none; b=g9IwHB51BR6hdFdIFh/zg0gwuDmm4ngugPPVDmy5xtJUgWRXrHQUlRvcj5jJRPUXgsBxBjeOxigVIYvp2/qDPmNKVuigFJhxOxlYjBPJQKOwrMEpJEgKTPRANvZHVy2OimF0RQYo9K0aIltsIYjONXncxqsJoHlrKNbFwZMa0m0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755560388; c=relaxed/simple; bh=F8Qdm9wRtPFj1FUfpuDc+eSbRNZ/9N7OZarf51+gRh0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PUKhKL8FcVvMrbmeJg3UofI5dpLXLQZHybgKVkJvlcXVVgHNNRD62G13BzOSRGDdTyzJnbe7SSXlVUoAGamSXhawkvxCruC3CnaLnwfahScdds3fsfTf3Pj22l06GkXTH/qEqBkj1j0mGzj2OW0gs2LuWT9fAZa9ylNNddRxzRo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cdZV7uml; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cdZV7uml" Received: by smtp.kernel.org (Postfix) with ESMTPS id B1A00C2BCC7; Mon, 18 Aug 2025 23:39:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755560387; bh=F8Qdm9wRtPFj1FUfpuDc+eSbRNZ/9N7OZarf51+gRh0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=cdZV7umlOBwLb24CcXHqVtwUyNjPqsa/XF28CHvX8VKh9w9FVmMkjy1hjQz6cvqaG B+dmer9j8tY7B23GYNJQX6/rhB3G+rzKD5AYWkYD9rfwjdj2p/ESOCXkI4lJIYwH8B v7wWydqvav1Z/04uszkpiuZCawMlz2YgKfZxURDGvdDtasDxwerQk+aYmr0EM0OJ7U vzz9Vec7+hPocSDxbxT4+gQnyo+yV0Q88N2a79Oy75OK+Esk+Lcu2svhrKCMM4Iutz 7zMk1HMzf1+EPFAHX0YGcyK91vZRZphvzSLSZeRgnihmChXDT5yHWFYoPsX2M8K2gn FpV1mBUPo0BNw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8395CA0EF7; Mon, 18 Aug 2025 23:39:47 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Tue, 19 Aug 2025 01:26:01 +0200 Subject: [PATCH v10 09/13] arm64: defconfig: enable rockchip camera interface and mipi csi-2 receiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240220-rk3568-vicap-v10-9-62d8a7b209b4@collabora.com> References: <20240220-rk3568-vicap-v10-0-62d8a7b209b4@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v10-0-62d8a7b209b4@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1755559554; l=834; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=ODTHuQlKuPRMOWRDe0uxoXXXqr9wwzui1kpqREL2WCM=; b=oOSjRvi11TmPA+x0kQ9FXOuacWH6jgGRCHVkESPgw1DTL00NYUCqTmnbjridOQh1GUTzJjKil Ugsof0WjXmUCmPrkcQ4HO0yAmp0rLbrwIq8NM6/fd1XyfmceXLUPdV+ X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Rockchip Camera Interface (CIF) and the Rockchip MIPI CSI-2 Receiver are featured in many Rockchip SoCs in different variations. Enable the drivers for them in the default configuration. Signed-off-by: Michael Riesch Reviewed-by: Bryan O'Donoghue --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 58f87d09366c..625cb5b47fb5 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -876,6 +876,8 @@ CONFIG_VIDEO_RENESAS_FCP=3Dm CONFIG_VIDEO_RENESAS_FDP1=3Dm CONFIG_VIDEO_RENESAS_VSP1=3Dm CONFIG_VIDEO_RCAR_DRIF=3Dm +CONFIG_VIDEO_ROCKCHIP_CIF=3Dm +CONFIG_VIDEO_ROCKCHIP_CSI=3Dm CONFIG_VIDEO_ROCKCHIP_RGA=3Dm CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=3Dm CONFIG_VIDEO_SAMSUNG_S5P_JPEG=3Dm --=20 2.39.5