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charset="utf-8" This adds common1 register space for AM62A SoC which is using TI's Keystone display hardware and supporting it as described in Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml Fixes: 3618811657b3 ("arm64: dts: ti: k3-am62a-main: Add node for Display S= ubSystem (DSS)") Signed-off-by: Devarsh Thakkar --- V1->V4 : - No change (this was part of "arm64: dts: ti: Add common1 register space for AM62x, AM62A & AM65x SoCs ) V5 : - Split this as a separate patch from "arm64: dts: ti: Add common1 register space for AM62x, AM62A & AM65x SoCs" - Remove Reviewed-By tag as this is split from older revision --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 2749533cf4fd..dbdd6bec4667 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -994,9 +994,10 @@ dss: dss@30200000 { <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Tied OFF in the SoC */ - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ reg-names =3D "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains =3D <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 186 6>, <&k3_clks 186 0>, --=20 2.34.1