From nobody Wed Dec 17 07:31:32 2025 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBB831DDDB; Thu, 15 Feb 2024 10:30:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707993058; cv=none; b=nUwGwN+K+Zhc6gDT2QnaEl2JpzhIOTZTAENibAZtE2tnnaxVTB8m40yzQs7fWIt9c4r10re02y4yAe0QkfbkTe2GVvUGIoucNWXyhz7okOJLU/hGKtLheAHhPM27USVx09RUNyToZYHwCl4JpxqO4eyy3WGqpKdSpV8KCGfB2Sg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707993058; c=relaxed/simple; bh=lFCW+S4RlRFZM8WxmSRzupQnZ8R5azS/EIsucaneiRE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=GX22u9Q82gmGeslJxR76lOrcgibb0AS2KfPwlSQX9iPK2Z5c5YYkmtZ+4jZ2W/SY+zorIGzxNoxTkm5jS2a3pGyXqOFid0uml74w9uIJSgtnz3TUfL+jRXCRPfbizbcwatHvVsYC2GsUvV+fdcwWJwRnDQcMfqx4rR5W11pCh58= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=D0vwUR8R; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="D0vwUR8R" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41FAUfpt095113; Thu, 15 Feb 2024 04:30:41 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707993041; bh=xUh4OTnhvZ4QilgxMoyStbN6234r5hgOwbudObkOCDE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=D0vwUR8Rm2uES/7J2/lEnjZ/qAkKfrFxsbtM8sWj5NQEGqTLVBzjbUe//cuCeuiCE W4LXTYHJMUwDQWQNf7ZQoONKAAEzjUY81fScQyfng2WIWs1WvWripfpP1S7uwTX2Fr X6oHbmhrTD9/YCrorW7kq0Luz1PA+hBx5jDAq3OY= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41FAUfsx041766 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Feb 2024 04:30:41 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Feb 2024 04:30:40 -0600 Received: from fllvsmtp7.itg.ti.com (10.64.40.31) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Feb 2024 04:30:40 -0600 Received: from fllv0122.itg.ti.com (fllv0122.itg.ti.com [10.247.120.72]) by fllvsmtp7.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41FAUeSI004604; Thu, 15 Feb 2024 04:30:40 -0600 Received: from localhost (danish-tpc.dhcp.ti.com [10.24.69.25]) by fllv0122.itg.ti.com (8.14.7/8.14.7) with ESMTP id 41FAUedS031772; Thu, 15 Feb 2024 04:30:40 -0600 From: MD Danish Anwar To: Vignesh Raghavendra , Nishanth Menon CC: Andrew Lunn , Conor Dooley , Krzysztof Kozlowski , Rob Herring , , , , "Tero Kristo" , , , "Roger Quadros" , Suman Anna , Grygorii Strashko , MD Danish Anwar Subject: [PATCH v5 1/3] arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes Date: Thu, 15 Feb 2024 16:00:34 +0530 Message-ID: <20240215103036.2825096-2-danishanwar@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215103036.2825096-1-danishanwar@ti.com> References: <20240215103036.2825096-1-danishanwar@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" From: Suman Anna The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) to manage/generate Industrial Ethernet functions such as time stamping. Each IEP sub-module is sourced from an internal clock mux that can be derived from either of the IP instance's ICSSG_IEP_GCLK or from another internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG instances. The IEP clock is currently configured to be derived indirectly from the ICSSG_ICLK running at 250 MHz. Signed-off-by: Vignesh Raghavendra Signed-off-by: Grygorii Strashko Signed-off-by: Suman Anna Reviewed-by: Ravi Gunasekaran Reviewed-by: Roger Quadros Signed-off-by: MD Danish Anwar --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index ddd382a0d735..c678366623b7 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1225,6 +1225,18 @@ icssg0_iepclk_mux: iepclk-mux@30 { }; }; =20 + icssg0_iep0: iep@2e000 { + compatible =3D "ti,am654-icss-iep"; + reg =3D <0x2e000 0x1000>; + clocks =3D <&icssg0_iepclk_mux>; + }; + + icssg0_iep1: iep@2f000 { + compatible =3D "ti,am654-icss-iep"; + reg =3D <0x2f000 0x1000>; + clocks =3D <&icssg0_iepclk_mux>; + }; + icssg0_mii_rt: mii-rt@32000 { compatible =3D "ti,pruss-mii", "syscon"; reg =3D <0x32000 0x100>; @@ -1366,6 +1378,18 @@ icssg1_iepclk_mux: iepclk-mux@30 { }; }; =20 + icssg1_iep0: iep@2e000 { + compatible =3D "ti,am654-icss-iep"; + reg =3D <0x2e000 0x1000>; + clocks =3D <&icssg1_iepclk_mux>; + }; + + icssg1_iep1: iep@2f000 { + compatible =3D "ti,am654-icss-iep"; + reg =3D <0x2f000 0x1000>; + clocks =3D <&icssg1_iepclk_mux>; + }; + icssg1_mii_rt: mii-rt@32000 { compatible =3D "ti,pruss-mii", "syscon"; reg =3D <0x32000 0x100>; --=20 2.34.1