From nobody Fri Sep 20 03:54:01 2024 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EFDF069D18 for ; Thu, 15 Feb 2024 10:11:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707991891; cv=none; b=P6BzN3snUYLhuf6GdSKgRAddv6qGJVcOLAKFTMIg8DbEjiCE4SBJOkUJKWr4UfTqt9C9KRwPwoctdepjvxheObY79Pdc7YYWJUhQKGMa+LD0nAkqRJ0CsHUsLHdE3vYfmT784Oh1B+ICDBE8iMD6sOGNWjAfIGNvn6eDZE/mvpo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707991891; c=relaxed/simple; bh=N8TiFFxxmTMa2QT5avLlhWkJIAIwN1BDdxEy63NKX2g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gpfbCDS4uVLTIDr2yz2ya7VJiO65BqhwXd03Z6k91OKoTRfdmvpMkeoV9Fupqx0Z9jks8A8KKlE8VatceIo/qQln5Og9awklbwiqF8I5ZaXneXdcP/PkhVvgduYjIiah09CL6x7mq+ahrrXxaK+042aEQGLHdNuFxupl1lt2A+w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=kt8UGFQe; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="kt8UGFQe" X-UUID: 927958eacbea11eea2298b7352fd921d-20240215 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=7s1oTV14wUXmLQ2Hzo35A2BBQL2juVHpTagPf8ZfOXQ=; b=kt8UGFQeyfzyoG0A2ceRPCKAF7/tz60QMJcpFLxm+eUnyyRYCyrnS6fx9uE5jBuQR2zpfid5lbwa6+BA255fyvvEx+7TdSL8qSmtzHKBGXLVVKJJ7osz5snpL8TgCNI8moCrLmjB1fxTmlEwh7xzzUdfwxXDvFptyA/YUadNx28=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:e9e63957-d945-449b-9aef-ac563c64b069,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:6f543d0,CLOUDID:dc5cd0fe-c16b-4159-a099-3b9d0558e447,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 927958eacbea11eea2298b7352fd921d-20240215 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1699541002; Thu, 15 Feb 2024 18:11:23 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 15 Feb 2024 18:11:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 15 Feb 2024 18:11:22 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , Chun-Kuang Hu CC: Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , Bibby Hsieh , CK Hu , Sean Paul , Fei Shao , Jason Chen , "Nancy . Lin" , , , , , Hsiao Chien Sung Subject: [PATCH v5 06/13] drm/mediatek: Turn off the layers with zero width or height Date: Thu, 15 Feb 2024 18:11:12 +0800 Message-ID: <20240215101119.12629-7-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240215101119.12629-1-shawn.sung@mediatek.com> References: <20240215101119.12629-1-shawn.sung@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" We found that IGT (Intel GPU Tool) will try to commit layers with zero width or height and lead to undefined behaviors in hardware. Disable the layers in such a situation. Fixes: 777b7bc86a0a3 ("drm/mediatek: Add ovl_adaptor support for MT8195") Fixes: fa97fe71f6f93 ("drm/mediatek: Add ETHDR support for MT8195") Signed-off-by: Hsiao Chien Sung Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +- drivers/gpu/drm/mediatek/mtk_ethdr.c | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/= drm/mediatek/mtk_disp_ovl_adaptor.c index d4a13a1402148..68a20312ac6f1 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -157,7 +157,7 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, u= nsigned int idx, merge =3D ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + idx]; ethdr =3D ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; =20 - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { mtk_merge_stop_cmdq(merge, cmdq_pkt); mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediate= k/mtk_ethdr.c index 73dc4da3ba3bd..69872b77922eb 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -160,7 +160,12 @@ void mtk_ethdr_layer_config(struct device *dev, unsign= ed int idx, if (idx >=3D 4) return; =20 - if (!pending->enable) { + if (!pending->enable || !pending->width || !pending->height) { + /* + * instead of disabling layer with MIX_SRC_CON directly + * set the size to 0 to avoid screen shift due to mixer + * mode switch (hardware behavior) + */ mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZ= E(idx)); return; } --=20 2.18.0