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[31.11.218.106]) by smtp.gmail.com with ESMTPSA id fg5-20020a056402548500b00561814de0easm2847074edb.62.2024.02.12.22.39.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 22:39:41 -0800 (PST) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Matthias Brugger , AngeloGioacchino Del Regno , Sean Wang , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Subject: [PATCH] dt-bindings: dma: convert MediaTek High-Speed controller to the json-schema Date: Tue, 13 Feb 2024 07:39:19 +0100 Message-Id: <20240213063919.20196-1-zajec5@gmail.com> X-Mailer: git-send-email 2.35.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable From: Rafa=C5=82 Mi=C5=82ecki This helps validating DTS files. Introduced changes: 1. Adjusted "reg" in example 2. Added includes to example Signed-off-by: Rafa=C5=82 Mi=C5=82ecki Reviewed-by: Conor Dooley --- .../bindings/dma/mediatek,mt7622-hsdma.yaml | 63 +++++++++++++++++++ .../devicetree/bindings/dma/mtk-hsdma.txt | 33 ---------- 2 files changed, 63 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/mediatek,mt7622-h= sdma.yaml delete mode 100644 Documentation/devicetree/bindings/dma/mtk-hsdma.txt diff --git a/Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.ya= ml b/Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml new file mode 100644 index 000000000000..3f1e120e40a3 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/mediatek,mt7622-hsdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek High-Speed DMA Controller + +maintainers: + - Sean Wang + +allOf: + - $ref: dma-controller.yaml# + +properties: + compatible: + enum: + - mediatek,mt7622-hsdma + - mediatek,mt7623-hsdma + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: hsdma + + power-domains: + maxItems: 1 + + "#dma-cells": + description: Channel number + const: 1 + +required: + - reg + - interrupts + - clocks + - clock-names + - power-domains + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + dma-controller@1b007000 { + compatible =3D "mediatek,mt7623-hsdma"; + reg =3D <0x1b007000 0x1000>; + interrupts =3D ; + clocks =3D <ðsys CLK_ETHSYS_HSDMA>; + clock-names =3D "hsdma"; + power-domains =3D <&scpsys MT2701_POWER_DOMAIN_ETH>; + #dma-cells =3D <1>; + }; diff --git a/Documentation/devicetree/bindings/dma/mtk-hsdma.txt b/Document= ation/devicetree/bindings/dma/mtk-hsdma.txt deleted file mode 100644 index 4bb317359dc6..000000000000 --- a/Documentation/devicetree/bindings/dma/mtk-hsdma.txt +++ /dev/null @@ -1,33 +0,0 @@ -MediaTek High-Speed DMA Controller -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D - -This device follows the generic DMA bindings defined in dma/dma.txt. - -Required properties: - -- compatible: Must be one of - "mediatek,mt7622-hsdma": for MT7622 SoC - "mediatek,mt7623-hsdma": for MT7623 SoC -- reg: Should contain the register's base address and length. -- interrupts: Should contain a reference to the interrupt used by this - device. -- clocks: Should be the clock specifiers corresponding to the entry in - clock-names property. -- clock-names: Should contain "hsdma" entries. -- power-domains: Phandle to the power domain that the device is part of -- #dma-cells: The length of the DMA specifier, must be <1>. This one cell - in dmas property of a client device represents the channel - number. -Example: - - hsdma: dma-controller@1b007000 { - compatible =3D "mediatek,mt7623-hsdma"; - reg =3D <0 0x1b007000 0 0x1000>; - interrupts =3D ; - clocks =3D <ðsys CLK_ETHSYS_HSDMA>; - clock-names =3D "hsdma"; - power-domains =3D <&scpsys MT2701_POWER_DOMAIN_ETH>; - #dma-cells =3D <1>; - }; - -DMA clients must use the format described in dma/dma.txt file. --=20 2.35.3