From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F03C24B33; Tue, 13 Feb 2024 01:03:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786233; cv=none; b=nUnVaQ+jMOgR1xuY/H0oRrkdhoFcfj4YvOnjEahE1PdOdHuWE2WB7pa/Ikg9c4UnpoHRzCoXM9zOaUZ4nmlOg+5LdvLPMZpVxkCNNJGJRmjrEf/Rn269VkvSFfpgKT6oUa4mtN4jZ3VdKgwQSVUmGNVaVSeayzKKdrUJTHNf3oc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786233; c=relaxed/simple; bh=OuIAXsTXeI+yVn+RPThfGxCtRwDO4KvymqLeppySnxg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uhJ6v5AeKWrqn3RSe+AiwVpxv9qz6tU6cXeVe0owBGdffmFf5awpX0xQ3nael4Msvti03jPuYwqYu9P+6dFAQmnbahLuelx3oKhH3zrqGVyDuxTGtxFtpfDja87pgURGV9CjcSPDywZp0S9NZfZZjYGUlcpR06Hhko7R5FW7PDc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lPSKesRD; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lPSKesRD" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E802C43399; Tue, 13 Feb 2024 01:03:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786232; bh=OuIAXsTXeI+yVn+RPThfGxCtRwDO4KvymqLeppySnxg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lPSKesRDE06+8WuupQyUWtJr/tCM/7Db30TYpk+YC50IErw/appwRN9Rkn8yNVStK jgIHdUzDlaixwv6zOVEWCTZJTzHl+7BhINotx4MnUgFgZ3gyoHkh2xyKnGSHh5fXdd z7dHf9NryJugUsbdrL91u4rh+d4U9X4V7ZLdA36hbAcSekVh8YfayF93ZWF9bwwTv6 hdU5wTfBv8vbEl6sk/fdswbb8NeyriWaDjb28haB2R33qm3Yq7YWJcVxaS7klj3mcL nAzkWZyRf/J3t5zfk81f1g+4YxUZ0TuwTuvp6wgNGVa17ScgzyPzP3LUeobQYYJUEH 2nebYieEmVlMw== Received: by mercury (Postfix, from userid 1000) id 22CDA106A02E; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/17] dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML Date: Tue, 13 Feb 2024 02:00:50 +0100 Message-ID: <20240213010347.1075251-2-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert i.MX6UL pinctrl bindings to YAML. Signed-off-by: Sebastian Reichel Reviewed-by: Linus Walleij Reviewed-by: Rob Herring --- .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------ .../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++ 2 files changed, 116 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pi= nctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pi= nctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.t= xt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt deleted file mode 100644 index 7ca4f6118d9a..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX6 UltraLite IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding p= art -and usage. - -Required properties: -- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or - "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. -- fsl,pins: each entry consists of 6 integers and represents the mux and c= onfig - setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in - imx6ul-pinfunc.h under device tree source folder. The last integer CONF= IG is - the pad setting value like pull-up on this pin. Please refer to i.MX6 U= ltraLite - Reference Manual for detailed CONFIG settings. - -CONFIG bits definition: -PAD_CTL_HYS (1 << 16) -PAD_CTL_PUS_100K_DOWN (0 << 14) -PAD_CTL_PUS_47K_UP (1 << 14) -PAD_CTL_PUS_100K_UP (2 << 14) -PAD_CTL_PUS_22K_UP (3 << 14) -PAD_CTL_PUE (1 << 13) -PAD_CTL_PKE (1 << 12) -PAD_CTL_ODE (1 << 11) -PAD_CTL_SPEED_LOW (0 << 6) -PAD_CTL_SPEED_MED (1 << 6) -PAD_CTL_SPEED_HIGH (3 << 6) -PAD_CTL_DSE_DISABLE (0 << 3) -PAD_CTL_DSE_260ohm (1 << 3) -PAD_CTL_DSE_130ohm (2 << 3) -PAD_CTL_DSE_87ohm (3 << 3) -PAD_CTL_DSE_65ohm (4 << 3) -PAD_CTL_DSE_52ohm (5 << 3) -PAD_CTL_DSE_43ohm (6 << 3) -PAD_CTL_DSE_37ohm (7 << 3) -PAD_CTL_SRE_FAST (1 << 0) -PAD_CTL_SRE_SLOW (0 << 0) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.y= aml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml new file mode 100644 index 000000000000..906b264a9e3c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX6UL IOMUX Controller + +maintainers: + - Dong Aisheng + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this dir= ectory + for common binding part and usage. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx6ul-iomuxc + - fsl,imx6ull-iomuxc-snvs + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configura= tion. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and con= fig + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, whic= h can + be found in . The last integ= er + CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX6UL Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration regis= ter. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be = applied: + PAD_CTL_HYS (1 << 16) + PAD_CTL_PUS_100K_DOWN (0 << 14) + PAD_CTL_PUS_47K_UP (1 << 14) + PAD_CTL_PUS_100K_UP (2 << 14) + PAD_CTL_PUS_22K_UP (3 << 14) + PAD_CTL_PUE (1 << 13) + PAD_CTL_PKE (1 << 12) + PAD_CTL_ODE (1 << 11) + PAD_CTL_SPEED_LOW (0 << 6) + PAD_CTL_SPEED_MED (1 << 6) + PAD_CTL_SPEED_HIGH (3 << 6) + PAD_CTL_DSE_DISABLE (0 << 3) + PAD_CTL_DSE_260ohm (1 << 3) + PAD_CTL_DSE_130ohm (2 << 3) + PAD_CTL_DSE_87ohm (3 << 3) + PAD_CTL_DSE_65ohm (4 << 3) + PAD_CTL_DSE_52ohm (5 << 3) + PAD_CTL_DSE_43ohm (6 << 3) + PAD_CTL_DSE_37ohm (7 << 3) + PAD_CTL_SRE_FAST (1 << 0) + PAD_CTL_SRE_SLOW (0 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: pinctrl@20e0000 { + compatible =3D "fsl,imx6ul-iomuxc"; + reg =3D <0x020e0000 0x4000>; + + mux_uart: uartgrp { + fsl,pins =3D < + 0x0084 0x0310 0x0000 0 0 0x1b0b1 + 0x0088 0x0314 0x0624 0 3 0x1b0b1 + >; + }; + }; + - | + iomuxc_snvs: pinctrl@2290000 { + compatible =3D "fsl,imx6ull-iomuxc-snvs"; + reg =3D <0x02290000 0x4000>; + + pinctrl_snvs_usbc_det: snvsusbcdetgrp { + fsl,pins =3D < + 0x0010 0x0054 0x0000 0x5 0x0 0x130b0 + >; + }; + }; --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F0B324B59; Tue, 13 Feb 2024 01:03:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786233; cv=none; b=G6HvKaHIUFnRBpZ54+Ok9/CpnroWP8Nd6ExCCRQugMKfCMoYgBI4uxPBUgiwNRNEcmP+JwtZqd+lzxOoey+cnT+MIXkQJCEO6jf8E8sdnTtqllscZrw7JFL5pNTfvfTdfQ3b5kdCNfo3ZeoMp7uBJpR7fB70ecx+cabyPoq2EDE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786233; c=relaxed/simple; bh=hxRem+x8ATQ6PkHunH7PZQp3qFO+mPmucI0ujEIQwwU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QKEmdjqbCpbSelXuZsIkGF/OE7kxMV2cmnCDTPs3n+xqmbSAQg/S6cIxthi812CfTiSR84bsdKM37NlYcC9Tkgb4rog5ueEXCRcHRjqz+zNDEYEq7LCujQKwCeJpNavfMW+mih9tvlaCPwBGQ7i+h5345+i01/IPIG41i/CtGMk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=IBv1PTIr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IBv1PTIr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3F467C433C7; Tue, 13 Feb 2024 01:03:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786232; bh=hxRem+x8ATQ6PkHunH7PZQp3qFO+mPmucI0ujEIQwwU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IBv1PTIrVSlyqQgqqQjD5z8l7pd1GGmwG/A0RbGPTU70KR0hhnf60F3p0SaqQz2VF DNEihqEO40oGRL+i/VSnxcqgacpUQqWz1EgN54qwaNJxMZDDnTpRM4vIt8+zbaLtFX UsmdWvYNTwi956tA9nqDCxuwR1bX1xQadZ5l0vplV+irs4dEIQVqU3Zh8DeGsWU8h5 ISDET1b8TlaGs281csKhKXJYdcMFVs0rAB+YcXXXcFvvErSoB+AWd0d7XSJCN5+MZ0 reKC97laCKPv9XqEprmBg7Ewh5G/PxB1jifCz/DcsdyC+gUtm9GuxVq9YWTUz7Z6+G WSehTFDQcBGOA== Received: by mercury (Postfix, from userid 1000) id 289BF106A43A; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/17] dt-bindings: bus: imx-weim: convert to YAML Date: Tue, 13 Feb 2024 02:00:51 +0100 Message-ID: <20240213010347.1075251-3-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the i.MX Wireless External Interface Module binding to YAML. Signed-off-by: Sebastian Reichel --- .../devicetree/bindings/bus/imx-weim.txt | 117 ---------- .../fsl/fsl,imx-weim-peripherals.yaml | 36 ++++ .../memory-controllers/fsl/fsl,imx-weim.yaml | 201 ++++++++++++++++++ .../mc-peripheral-props.yaml | 1 + .../fieldbus/arcx,anybus-controller.txt | 2 +- 5 files changed, 239 insertions(+), 118 deletions(-) delete mode 100644 Documentation/devicetree/bindings/bus/imx-weim.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/fs= l/fsl,imx-weim-peripherals.yaml create mode 100644 Documentation/devicetree/bindings/memory-controllers/fs= l/fsl,imx-weim.yaml diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documenta= tion/devicetree/bindings/bus/imx-weim.txt deleted file mode 100644 index e7f502070d77..000000000000 --- a/Documentation/devicetree/bindings/bus/imx-weim.txt +++ /dev/null @@ -1,117 +0,0 @@ -Device tree bindings for i.MX Wireless External Interface Module (WEIM) - -The term "wireless" does not imply that the WEIM is literally an interface -without wires. It simply means that this module was originally designed for -wireless and mobile applications that use low-power technology. - -The actual devices are instantiated from the child nodes of a WEIM node. - -Required properties: - - - compatible: Should contain one of the following: - "fsl,imx1-weim" - "fsl,imx27-weim" - "fsl,imx51-weim" - "fsl,imx50-weim" - "fsl,imx6q-weim" - - reg: A resource specifier for the register space - (see the example below) - - clocks: the clock, see the example below. - - #address-cells: Must be set to 2 to allow memory address translation - - #size-cells: Must be set to 1 to allow CS address passing - - ranges: Must be set up to reflect the memory layout with four - integer values for each chip-select line in use: - - 0 - -Optional properties: - - - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, it should be the phandle to the system General - Purpose Register controller that contains WEIM CS GPR - register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] - should be set up as one of the following 4 possible - values depending on the CS space configuration. - - IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 - --------------------------------------------- - 05 128M 0M 0M 0M - 033 64M 64M 0M 0M - 0113 64M 32M 32M 0M - 01111 32M 32M 32M 32M - - In case that the property is absent, the reset value or - what bootloader sets up in IOMUXC_GPR1[11:0] will be - used. - - - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of - devices, the presence of this property indicates that - the weim bus should operate in Burst Clock Mode. - - - fsl,continuous-burst-clk Make Burst Clock to output continuous clock. - Without this option Burst Clock will output clock - only when necessary. This takes effect only if - "fsl,burst-clk-enable" is set. - -Timing property for child nodes. It is mandatory, not optional. - - - fsl,weim-cs-timing: The timing array, contains timing values for the - child node. We get the CS indexes from the address - ranges in the child node's "reg" property. - The number of registers depends on the selected chip: - For i.MX1, i.MX21 ("fsl,imx1-weim") there are two - registers: CSxU, CSxL. - For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") - there are three registers: CSCRxU, CSCRxL, CSCRxA. - For i.MX50, i.MX53 ("fsl,imx50-weim"), - i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim") - there are six registers: CSxGCR1, CSxGCR2, CSxRCR1, - CSxRCR2, CSxWCR1, CSxWCR2. - -Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: - - weim: weim@21b8000 { - compatible =3D "fsl,imx6q-weim"; - reg =3D <0x021b8000 0x4000>; - clocks =3D <&clks 196>; - #address-cells =3D <2>; - #size-cells =3D <1>; - ranges =3D <0 0 0x08000000 0x08000000>; - fsl,weim-cs-gpr =3D <&gpr>; - - nor@0,0 { - compatible =3D "cfi-flash"; - reg =3D <0 0 0x02000000>; - #address-cells =3D <1>; - #size-cells =3D <1>; - bank-width =3D <2>; - fsl,weim-cs-timing =3D <0x00620081 0x00000001 0x1c022000 - 0x0000c000 0x1404a38e 0x00000000>; - }; - }; - -Example for an imx6q-based board, a multi-chipselect device connected to W= EIM: - -In this case, both chip select 0 and 1 will be configured with the same ti= ming -array values. - - weim: weim@21b8000 { - compatible =3D "fsl,imx6q-weim"; - reg =3D <0x021b8000 0x4000>; - clocks =3D <&clks 196>; - #address-cells =3D <2>; - #size-cells =3D <1>; - ranges =3D <0 0 0x08000000 0x02000000 - 1 0 0x0a000000 0x02000000 - 2 0 0x0c000000 0x02000000 - 3 0 0x0e000000 0x02000000>; - fsl,weim-cs-gpr =3D <&gpr>; - - acme@0 { - compatible =3D "acme,whatever"; - reg =3D <0 0 0x100>, <0 0x400000 0x800>, - <1 0x400000 0x800>; - fsl,weim-cs-timing =3D <0x024400b1 0x00001010 0x20081100 - 0x00000000 0xa0000240 0x00000000>; - }; - }; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,i= mx-weim-peripherals.yaml b/Documentation/devicetree/bindings/memory-control= lers/fsl/fsl,imx-weim-peripherals.yaml new file mode 100644 index 000000000000..86d7e5011107 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim= -peripherals.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-per= ipherals.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX WEIM Bus Peripheral Nodes + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + This binding is meant for the child nodes of the WEIM node. The node + represents any device connected to the WEIM bus. It may be a Flash chip, + RAM chip or Ethernet controller, etc. These properties are meant for + configuring the WEIM settings/timings and will accompany the bindings + supported by the respective device. + +properties: + reg: true + + fsl,weim-cs-timing: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Timing values for the child node. + minItems: 2 + maxItems: 6 + +required: + - compatible + - reg + - fsl,weim-cs-timing + +# the WEIM child will have its own native properties +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,i= mx-weim.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl= ,imx-weim.yaml new file mode 100644 index 000000000000..a2c96da683bf --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim= .yaml @@ -0,0 +1,201 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yam= l# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX Wireless External Interface Module (WEIM) + +maintainers: + - Shawn Guo + - Sascha Hauer + +description: + The term "wireless" does not imply that the WEIM is literally an interfa= ce + without wires. It simply means that this module was originally designed = for + wireless and mobile applications that use low-power technology. The actu= al + devices are instantiated from the child nodes of a WEIM node. + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - fsl,imx1-weim + - fsl,imx27-weim + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - items: + - enum: + - fsl,imx31-weim + - fsl,imx35-weim + - const: fsl,imx27-weim + - items: + - enum: + - fsl,imx6sx-weim + - fsl,imx6ul-weim + - const: fsl,imx6q-weim + + '#address-cells': + const: 2 + + '#size-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + ranges: true + + fsl,weim-cs-gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the system General Purpose Register controller that conta= ins + WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] + should be set up as one of the following 4 possible values depending= on + the CS space configuration. + + IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 + --------------------------------------------- + 05 128M 0M 0M 0M + 033 64M 64M 0M 0M + 0113 64M 32M 32M 0M + 01111 32M 32M 32M 32M + + In case that the property is absent, the reset value or what bootloa= der + sets up in IOMUXC_GPR1[11:0] will be used. + + fsl,burst-clk-enable: + type: boolean + description: + The presence of this property indicates that the weim bus should ope= rate + in Burst Clock Mode. + + fsl,continuous-burst-clk: + type: boolean + description: + Make Burst Clock to output continuous clock. Without this option Bur= st + Clock will output clock only when necessary. + +patternProperties: + "^.*@[0-7],[0-9a-f]+$": + type: object + description: Devices attached to chip selects are represented as subno= des. + $ref: fsl,imx-weim-peripherals.yaml + additionalProperties: true + +required: + - compatible + - reg + - clocks + - '#address-cells' + - '#size-cells' + - ranges + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - fsl,imx50-weim + - fsl,imx6q-weim + then: + properties: + fsl,weim-cs-gpr: false + fsl,burst-clk-enable: false + - if: + properties: + fsl,burst-clk-enable: false + then: + properties: + fsl,continuous-burst-clk: false + - if: + properties: + compatible: + contains: + const: fsl,imx1-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxU + - description: CSxL + - if: + properties: + compatible: + contains: + enum: + - fsl,imx27-weim + - fsl,imx31-weim + - fsl,imx35-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSCRxU + - description: CSCRxL + - description: CSCRxA + - if: + properties: + compatible: + contains: + enum: + - fsl,imx50-weim + - fsl,imx51-weim + - fsl,imx6q-weim + - fsl,imx6sx-weim + - fsl,imx6ul-weim + then: + patternProperties: + "^.*@[0-7],[0-9a-f]+$": + properties: + fsl,weim-cs-timing: + items: + items: + - description: CSxGCR1 + - description: CSxGCR2 + - description: CSxRCR1 + - description: CSxRCR2 + - description: CSxWCR1 + - description: CSxWCR2 + +additionalProperties: false + +examples: + - | + memory-controller@21b8000 { + compatible =3D "fsl,imx6q-weim"; + reg =3D <0x021b8000 0x4000>; + clocks =3D <&clks 196>; + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges =3D <0 0 0x08000000 0x08000000>; + fsl,weim-cs-gpr =3D <&gpr>; + + flash@0,0 { + compatible =3D "cfi-flash"; + reg =3D <0 0 0x02000000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + bank-width =3D <2>; + fsl,weim-cs-timing =3D <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-periph= eral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-p= eripheral-props.yaml index 8d9dae15ade0..00deeb09f87d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-pr= ops.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-pr= ops.yaml @@ -37,5 +37,6 @@ allOf: - $ref: ingenic,nemc-peripherals.yaml# - $ref: intel,ixp4xx-expansion-peripheral-props.yaml# - $ref: ti,gpmc-child.yaml# + - $ref: fsl/fsl,imx-weim-peripherals.yaml =20 additionalProperties: true diff --git a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fie= ldbus/arcx,anybus-controller.txt b/drivers/staging/fieldbus/Documentation/d= evicetree/bindings/fieldbus/arcx,anybus-controller.txt index b1f9474f36d5..f34a95611645 100644 --- a/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/a= rcx,anybus-controller.txt +++ b/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/a= rcx,anybus-controller.txt @@ -48,7 +48,7 @@ Example of usage: ----------------- =20 This example places the bridge on top of the i.MX WEIM parallel bus, see: -Documentation/devicetree/bindings/bus/imx-weim.txt +Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml =20 &weim { controller@0,0 { --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03FA824B31; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jobcDP79" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4529BC43390; Tue, 13 Feb 2024 01:03:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786232; bh=Ehlp7hHJZYm3Lr614/F5tdmRyAT/7rlmntGKdfIBDXM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jobcDP796WO+Ov8lHvZFiBruir0hF1f6IV/F6w07ltuzXZ/uYHCD9cGFQxPbrsGV5 +EWMDYSDn5xP4txafJ2kohShGTZQODE6ros7IRHI1jCsUOQ5O4Da4W9TjhnKHIY8RR xhP7noIPsJgg3RXDp++De4RfXKDLiKPfZicT9VbsugmjVo1jiZ3tGXzgDzml6FTpqg 2UZUmHuFGExg56MdKFED22XGR/1HnRF8E38XugdBxHE4hInAEoDmehIrOlVqma5FgA oJMSADN2dVfS3KaErgNIWT6gmCngcJWERzA38NAy2fyVHMJkx03lsfdbfV7i4dwukp fpPK0g+xA9jLQ== Received: by mercury (Postfix, from userid 1000) id 2E4F1106A446; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/17] ASoC: dt-bindings: fsl,imx-asrc: convert to YAML Date: Tue, 13 Feb 2024 02:00:52 +0100 Message-ID: <20240213010347.1075251-4-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the i.MX ASRC DT binding to YAML. Signed-off-by: Sebastian Reichel Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/sound/fsl,asrc.txt | 80 --------- .../bindings/sound/fsl,imx-asrc.yaml | 162 ++++++++++++++++++ 2 files changed, 162 insertions(+), 80 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/fsl,asrc.txt create mode 100644 Documentation/devicetree/bindings/sound/fsl,imx-asrc.ya= ml diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documen= tation/devicetree/bindings/sound/fsl,asrc.txt deleted file mode 100644 index 998b4c8a7f78..000000000000 --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt +++ /dev/null @@ -1,80 +0,0 @@ -Freescale Asynchronous Sample Rate Converter (ASRC) Controller - -The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate o= f a -signal associated with an input clock into a signal associated with a diff= erent -output clock. The driver currently works as a Front End of DPCM with other= Back -Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to sup= port -three substreams within totally 10 channels. - -Required properties: - - - compatible : Compatible list, should contain one of the following - compatibles: - "fsl,imx35-asrc", - "fsl,imx53-asrc", - "fsl,imx8qm-asrc", - "fsl,imx8qxp-asrc", - - - reg : Offset and length of the register set for the device. - - - interrupts : Contains the spdif interrupt. - - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. - - - dma-names : Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc". - - - clocks : Contains an entry for each entry in clock-names. - - - clock-names : Contains the following entries - "mem" Peripheral access clock to access registers. - "ipg" Peripheral clock to driver module. - "asrck_<0-f>" Clock sources for input and output clock. - "spba" The spba clock is required when ASRC is placed as a - bus slave of the Shared Peripheral Bus and when two - or more bus masters (CPU, DMA or DSP) try to access - it. This property is optional depending on the SoC - design. - - - fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends. - - - fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends. - - - fsl,asrc-clk-map : Defines clock map used in driver. which is requi= red - by imx8qm/imx8qxp platform - <0> - select the map for asrc0 in imx8qm/imx8qxp - <1> - select the map for asrc1 in imx8qm/imx8qxp - -Optional properties: - - - big-endian : If this property is absent, the little endian mode - will be in use as default. Otherwise, the big endian - mode will be in use for all the device registers. - - - fsl,asrc-format : Defines a mutual sample format used by DPCM Back - Ends, which can replace the fsl,asrc-width. - The value is 2 (S16_LE), or 6 (S24_LE). - -Example: - -asrc: asrc@2034000 { - compatible =3D "fsl,imx53-asrc"; - reg =3D <0x02034000 0x4000>; - interrupts =3D <0 50 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&clks 107>, <&clks 107>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 107>, <&clks 0>, <&clks 0>; - clock-names =3D "mem", "ipg", "asrck0", - "asrck_1", "asrck_2", "asrck_3", "asrck_4", - "asrck_5", "asrck_6", "asrck_7", "asrck_8", - "asrck_9", "asrck_a", "asrck_b", "asrck_c", - "asrck_d", "asrck_e", "asrck_f"; - dmas =3D <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, - <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; - dma-names =3D "rxa", "rxb", "rxc", - "txa", "txb", "txc"; - fsl,asrc-rate =3D <48000>; - fsl,asrc-width =3D <16>; -}; diff --git a/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml b/Do= cumentation/devicetree/bindings/sound/fsl,imx-asrc.yaml new file mode 100644 index 000000000000..bfef2fcb75b1 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/fsl,imx-asrc.yaml @@ -0,0 +1,162 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/fsl,imx-asrc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Asynchronous Sample Rate Converter (ASRC) Controller + +description: + The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate= of + a signal associated with an input clock into a signal associated with a + different output clock. The driver currently works as a Front End of DPCM + with other Back Ends Audio controller such as ESAI, SSI and SAI. It has + three pairs to support three substreams within totally 10 channels. + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - enum: + - fsl,imx35-asrc + - fsl,imx53-asrc + - fsl,imx8qm-asrc + - fsl,imx8qxp-asrc + - items: + - enum: + - fsl,imx6sx-asrc + - fsl,imx6ul-asrc + - const: fsl,imx53-asrc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + dmas: + maxItems: 6 + + dma-names: + items: + - const: rxa + - const: rxb + - const: rxc + - const: txa + - const: txb + - const: txc + + clocks: + maxItems: 19 + + clock-names: + items: + - const: mem + - const: ipg + - const: asrck_0 + - const: asrck_1 + - const: asrck_2 + - const: asrck_3 + - const: asrck_4 + - const: asrck_5 + - const: asrck_6 + - const: asrck_7 + - const: asrck_8 + - const: asrck_9 + - const: asrck_a + - const: asrck_b + - const: asrck_c + - const: asrck_d + - const: asrck_e + - const: asrck_f + - const: spba + + fsl,asrc-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The mutual sample rate used by DPCM Back Ends + + fsl,asrc-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The mutual sample width used by DPCM Back Ends + enum: [16, 24] + + fsl,asrc-clk-map: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Defines clock map used in driver + <0> - select the map for asrc0 in imx8qm/imx8qxp + <1> - select the map for asrc1 in imx8qm/imx8qxp + enum: [0, 1] + + big-endian: + type: boolean + description: + If this property is absent, the little endian mode will be in use as + default. Otherwise, the big endian mode will be in use for all the + device registers. + + fsl,asrc-format: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Defines a mutual sample format used by DPCM Back Ends, which can + replace the fsl,asrc-width. The value is 2 (S16_LE), or 6 (S24_LE). + enum: [2, 6] + +required: + - compatible + - reg + - interrupts + - dmas + - dma-names + - clocks + - clock-names + - fsl,asrc-rate + - fsl,asrc-width + +allOf: + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8qm-asrc + - fsl,imx8qxp-asrc + then: + required: + - fsl,asrc-clk-map + else: + properties: + fsl,asrc-clk-map: false + +additionalProperties: false + +examples: + - | + #include + #include + asrc: asrc@2034000 { + compatible =3D "fsl,imx53-asrc"; + reg =3D <0x02034000 0x4000>; + interrupts =3D <0 50 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&clks IMX6QDL_CLK_ASRC_IPG>, + <&clks IMX6QDL_CLK_ASRC_MEM>, <&clks 0>, + <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, + <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, + <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, + <&clks IMX6QDL_CLK_ASRC>, <&clks 0>, <&clks 0>, + <&clks IMX6QDL_CLK_SPBA>; + clock-names =3D "mem", "ipg", "asrck_0", + "asrck_1", "asrck_2", "asrck_3", "asrck_4", + "asrck_5", "asrck_6", "asrck_7", "asrck_8", + "asrck_9", "asrck_a", "asrck_b", "asrck_c", + "asrck_d", "asrck_e", "asrck_f", "spba"; + dmas =3D <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, + <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; + dma-names =3D "rxa", "rxb", "rxc", + "txa", "txb", "txc"; + fsl,asrc-rate =3D <48000>; + fsl,asrc-width =3D <16>; + }; --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F06024B54; Tue, 13 Feb 2024 01:03:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786233; cv=none; b=e7a4T83+U5JUWDVqgUexsFWfsxmfnBLncRFna4cCYJTy4irgrj4fenxTlxZ2Zusfh6L1ZmrmoPkqcBJ/RT/GHP7zaFAZLuU25InL2+3hsFchBMIYwXUOKk20s133rLRRxbYxHGLlVpvTJPCHt0CZ/I616aGGKuDOu7qMjKUukEQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786233; c=relaxed/simple; bh=XcLlCMMMy31s8hZU2c3Wsa/Zd1+X2ic3Z4KoTJlm/bY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=V8CPR2kjzhNCWWEYBgfI++p/dVODe8yUX1O9+Cy73gvPwqJbWj0ev3sr2sJditbXJrZ+Lesk3nObd/SSZEoYsKzFfSRD3bfo0xuH7AvscnAQJfKk2Ln00JelLdfRgavAN4lQbsq1KGBC5H0T0rdwt6vuy24+PCoHjrmX7XbtiFc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kKbTeDf2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kKbTeDf2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7C8F0C43394; Tue, 13 Feb 2024 01:03:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786232; bh=XcLlCMMMy31s8hZU2c3Wsa/Zd1+X2ic3Z4KoTJlm/bY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kKbTeDf2icr27gcnSax5obuKQF4oaD3FEg+5uIfYJmyzz6l3tK7Tf27HrV2xrNg5c kyEEEHe+4xOTfSCC/nHLn1/IQrwrMmkAymhi7wByvuqHvalskNXMG0hFyAGRlpQ5Go cI3W+13nz194Tpw8JFh0xCAm3uSwxZU0JcuXW9I3BeP1Zft2tac83r4UqffE4v48A9 1iupes2lG3Kyq9c6o8B0HlcO1Qls1VGUhFoEVsaJtz9oaTPYJnfSRDG2RIz7LF9l85 o3TbihPuttAStEGFH5C+Oa3YJnFE5q4De9vsblMvDC29vhLuyRtmmYcT4j2pkaIuDH 9B5wUQRfj8Ngw== Received: by mercury (Postfix, from userid 1000) id 33DD4106A4BC; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/17] dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML Date: Tue, 13 Feb 2024 02:00:53 +0100 Message-ID: <20240213010347.1075251-5-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the i.MX6UL touchscreen DT binding to YAML. Signed-off-by: Sebastian Reichel Reviewed-by: Rob Herring --- .../input/touchscreen/fsl,imx6ul-tsc.yaml | 97 +++++++++++++++++++ .../bindings/input/touchscreen/imx6ul_tsc.txt | 38 -------- 2 files changed, 97 insertions(+), 38 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl= ,imx6ul-tsc.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/imx= 6ul_tsc.txt diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul= -tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-= tsc.yaml new file mode 100644 index 000000000000..678756ad0f92 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.ya= ml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6UL Touch Controller + +maintainers: + - Haibo Chen + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + const: fsl,imx6ul-tsc + + reg: + items: + - description: touch controller address + - description: ADC2 address + + interrupts: + items: + - description: touch controller address + - description: ADC2 address + + clocks: + maxItems: 2 + + clock-names: + items: + - const: tsc + - const: adc + + xnur-gpios: + maxItems: 1 + description: + The X- gpio this controller connect to. This xnur-gpio returns to + low once the finger leave the touch screen (The last touch event + the touch controller capture). + + measure-delay-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The value of measure delay time. Before X-axis or Y-axis measurement, + the screen need some time before even potential distribution ready. + default: 0xffff + minimum: 0 + maximum: 0xffffff + + pre-charge-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The touch screen need some time to precharge. + default: 0xfff + minimum: 0 + maximum: 0xffffffff + + touchscreen-average-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of data samples which are averaged for each read. + enum: [ 1, 4, 8, 16, 32 ] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - xnur-gpios + +allOf: + - $ref: touchscreen.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + #include + touchscreen@2040000 { + compatible =3D "fsl,imx6ul-tsc"; + reg =3D <0x02040000 0x4000>, <0x0219c000 0x4000>; + interrupts =3D , + ; + clocks =3D <&clks IMX6UL_CLK_IPG>, + <&clks IMX6UL_CLK_ADC2>; + clock-names =3D "tsc", "adc"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_tsc>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time =3D <0xfff>; + pre-charge-time =3D <0xffff>; + touchscreen-average-samples =3D <32>; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc= .txt b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt deleted file mode 100644 index 164915004424..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Freescale i.MX6UL Touch Controller - -Required properties: -- compatible: must be "fsl,imx6ul-tsc". -- reg: this touch controller address and the ADC2 address. -- interrupts: the interrupt of this touch controller and ADC2. -- clocks: the root clock of touch controller and ADC2. -- clock-names; must be "tsc" and "adc". -- xnur-gpio: the X- gpio this controller connect to. - This xnur-gpio returns to low once the finger leave the touch screen (The - last touch event the touch controller capture). - -Optional properties: -- measure-delay-time: the value of measure delay time. - Before X-axis or Y-axis measurement, the screen need some time before - even potential distribution ready. - This value depends on the touch screen. -- pre-charge-time: the touch screen need some time to precharge. - This value depends on the touch screen. -- touchscreen-average-samples: Number of data samples which are averaged f= or - each read. Valid values are 1, 4, 8, 16 and 32. - -Example: - tsc: tsc@2040000 { - compatible =3D "fsl,imx6ul-tsc"; - reg =3D <0x02040000 0x4000>, <0x0219c000 0x4000>; - interrupts =3D , - ; - clocks =3D <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_ADC2>; - clock-names =3D "tsc", "adc"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; - measure-delay-time =3D <0xfff>; - pre-charge-time =3D <0xffff>; - touchscreen-average-samples =3D <32>; - }; --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D084967E8B; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; cv=none; b=i5Y0UQT9fTtLg/c7rt1I1LEyZYvHnn80F4juEjH1Yx1Ao5q6K/5B57ePD/OOyptaR7QZ/tiQXF3a5JC92zP/7+ctsA5k2i9jWa88R/XDS9filvZGWJPcKWyxiTwbqPAf5ByxswKWMlyh7afKgSG4BqKrOt2Z6y7RW6ZGRLME1hs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; c=relaxed/simple; bh=SwGh5DLM5LsIthu3tG63lPvezvOw26wv4J7Bcpkos2c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LD/LeIRWEd2XQDYKQixKiQt6sx4bYjHzETkGrlHbOE3vLC0oGFzJGyksB9pRfiRQgZTdMNCQyVpUddzF74uB8mbutbiIThCe6CODcehdYS7xhfhd30SWQW+Wh0JegRIp8KVmK3SAjPzLcwOHPpbQhdhw4kM8yQBIxmr4k7/FQZU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DLmi2THy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DLmi2THy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 40E67C43390; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=SwGh5DLM5LsIthu3tG63lPvezvOw26wv4J7Bcpkos2c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DLmi2THy7it1s9W8KIjFVFEVjxibd2FA725t3HWn6KI+e1L2Xx8yU8V7jLrYZlWv5 ayB01TJ3ZOHjE/t0nToWqfvJ5HuMcJfhxodhVjOYoIYC9+BMgPiHxnNDK0rE+buzmD BC7kveBIWKPJHHujko6+UMKUIpW7mixuNVfWh0ttiaHDyinOXJJX7/mfLXpMFBTgln /UNtOY5mdLcp+ARakeRqMpj2w6EmsxgZofNAPeNlx9aqIaQPOEeU5tbhKPJWfJdoRC Es1IX15Ibb8jkDKoLuuDnCv+5FNoEF5Lv8Z+bwr5+O2XiAcOJCgXVq3ON3QjRatoC/ 5CebyHtMUQMZw== Received: by mercury (Postfix, from userid 1000) id 39A86106A504; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/17] dt-bindings: soc: imx: fsl,imx-anatop: add binding Date: Tue, 13 Feb 2024 02:00:54 +0100 Message-ID: <20240213010347.1075251-6-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add missing binding for i.MX anatop syscon. Signed-off-by: Sebastian Reichel --- .../bindings/soc/imx/fsl,imx-anatop.yaml | 128 ++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anato= p.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml = b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml new file mode 100644 index 000000000000..5a59e3470510 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ANATOP register + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx6sl-anatop + - fsl,imx6sll-anatop + - fsl,imx6sx-anatop + - fsl,imx6ul-anatop + - fsl,imx7d-anatop + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + - items: + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + interrupts: + items: + - description: Temperature sensor event + - description: Brown-out event on either of the support regulators + - description: Brown-out event on either the core, gpu or soc regula= tors + + tempmon: + type: object + unevaluatedProperties: false + $ref: /schemas/thermal/imx-thermal.yaml + +patternProperties: + "regulator-((3p0)|(vddcore)|(vddsoc))$": + type: object + unevaluatedProperties: false + $ref: /schemas/regulator/anatop-regulator.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + anatop: anatop@20c8000 { + compatible =3D "fsl,imx6ul-anatop", "fsl,imx6q-anatop", + "syscon", "simple-mfd"; + reg =3D <0x020c8000 0x1000>; + interrupts =3D , + , + ; + + reg_3p0: regulator-3p0 { + compatible =3D "fsl,anatop-regulator"; + regulator-name =3D "vdd3p0"; + regulator-min-microvolt =3D <2625000>; + regulator-max-microvolt =3D <3400000>; + anatop-reg-offset =3D <0x120>; + anatop-vol-bit-shift =3D <8>; + anatop-vol-bit-width =3D <5>; + anatop-min-bit-val =3D <0>; + anatop-min-voltage =3D <2625000>; + anatop-max-voltage =3D <3400000>; + anatop-enable-bit =3D <0>; + }; + + reg_arm: regulator-vddcore { + compatible =3D "fsl,anatop-regulator"; + regulator-name =3D "cpu"; + regulator-min-microvolt =3D <725000>; + regulator-max-microvolt =3D <1450000>; + regulator-always-on; + anatop-reg-offset =3D <0x140>; + anatop-vol-bit-shift =3D <0>; + anatop-vol-bit-width =3D <5>; + anatop-delay-reg-offset =3D <0x170>; + anatop-delay-bit-shift =3D <24>; + anatop-delay-bit-width =3D <2>; + anatop-min-bit-val =3D <1>; + anatop-min-voltage =3D <725000>; + anatop-max-voltage =3D <1450000>; + }; + + reg_soc: regulator-vddsoc { + compatible =3D "fsl,anatop-regulator"; + regulator-name =3D "vddsoc"; + regulator-min-microvolt =3D <725000>; + regulator-max-microvolt =3D <1450000>; + regulator-always-on; + anatop-reg-offset =3D <0x140>; + anatop-vol-bit-shift =3D <18>; + anatop-vol-bit-width =3D <5>; + anatop-delay-reg-offset =3D <0x170>; + anatop-delay-bit-shift =3D <28>; + anatop-delay-bit-width =3D <2>; + anatop-min-bit-val =3D <1>; + anatop-min-voltage =3D <725000>; + anatop-max-voltage =3D <1450000>; + }; + + tempmon: tempmon { + compatible =3D "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupt-parent =3D <&gpc>; + interrupts =3D ; + fsl,tempmon =3D <&anatop>; + nvmem-cells =3D <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names =3D "calib", "temp_grade"; + clocks =3D <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells =3D <0>; + }; + }; --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5DB466B55; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NizeDhxj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F31DAC433F1; Tue, 13 Feb 2024 01:03:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=LccWUqgei2sBSg0YkmgZm3yt8IVqTllbhmxd2arkXLs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NizeDhxjItnujsP7YJPtrR9de5zxiLDOQ/J/nJlhkTwt+pkCNd7gvC0KedPwxAj+k PtQmkHz+E8riV1jndRy2EkzDzRz2CkwjG5yU0PnnoUP7lIT6CyFEiuG3GVlKp647Wq 1uNgPwAbsPdKKa3VrZnS+gkvstGW32j+Xqmt/Vn099NP2fgFkco7b/flDSHhMv9yJg PqK2/sFnuOIq8JSO+khW2fdoC6KrrA2/uGr1QNQEyoyDEf48y8yMzj1gaGkhpcXEHr c3FWgb/v6Ln7L/QrDccGwx9lyUc4sPnW1FlP8Qmp50rVQHEiIEH9Q/oOC4qyEM4vEa ASASWTfswmtkA== Received: by mercury (Postfix, from userid 1000) id 3FE86106A851; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/17] dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6 Date: Tue, 13 Feb 2024 02:00:55 +0100 Message-ID: <20240213010347.1075251-7-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatibles used by different i.MX6 variants to the i.MX IOMUX Controller GPR binding. Signed-off-by: Sebastian Reichel Acked-by: Rob Herring --- .../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.y= aml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml index 1da1b758b4ae..8451cb4dd87c 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml @@ -17,7 +17,23 @@ properties: compatible: oneOf: - items: - - const: fsl,imx8mq-iomuxc-gpr + - enum: + - fsl,imx6q-iomuxc-gpr + - fsl,imx8mq-iomuxc-gpr + - const: syscon + - const: simple-mfd + - items: + - enum: + - fsl,imx6sl-iomuxc-gpr + - fsl,imx6sll-iomuxc-gpr + - fsl,imx6ul-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - items: + - enum: + - fsl,imx6sx-iomuxc-gpr + - fsl,imx7d-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr - const: syscon - const: simple-mfd - items: --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0504D69953; Tue, 13 Feb 2024 01:03:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786236; cv=none; b=ge6qs1ee71z3DQbtn07FrJok4ersRPNIzDWnJF5DiCUdREL1bxtdmKfOMmQy9L/CQQ4YYEr2D6mOgDI+wxmNu13OkUpVat7MW75CTGeVDIN2gZn/p7ISTkxEZG74WHgAo1czcY4ggAmPIOSZgbyfeO/GasAyUvIbqHLfhMJNdxw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786236; c=relaxed/simple; bh=rUmJV8kGaEHJUfJDmv7OgUPHvh7znQWSM5zbc3u5TGM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=u+z5ov3ldAqKzkW7J+npsOvOg7+QofFc+l6zfetqQwfjP6wQpi7iF0C86yyU8mHrZ7s97mRn4NC3S5L3Qv8yVGUbA7IOzLXAZEtvBLaKx5K7ko/NBt4vXSdeLF1i2z/L+DtQ8xsG6r1BeQtdFzrXPh1CmoK54hpmrc8mb3Aqk24= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fcZyXGBv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fcZyXGBv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 925CCC4166A; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=rUmJV8kGaEHJUfJDmv7OgUPHvh7znQWSM5zbc3u5TGM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fcZyXGBvYyPxvMGxP6sQPcoStEP9d84MovkhPd7L0h2xN4XmGz3UNg4JDNwQmuqIu 5N6RWdcFLw80LLYMkq5+MzIJdsuW5GOdwLWmn2IFGZGSg5w2scL3c2jinZU9O1g653 qpcjwp8jN7RWEPP2YidOldw7rjvvFGEOingg1PqPHrLVNqVLFfjjtEwJ2egH6FCWyP CiWGhVPVWiyyMboZnztTEbGknrvOV0CL4oamus1tDR+z9lGy6HA4Pqkfr1SslLDgbC U0jRlQmFbXHuYxzZ39M5j0W7bRZ+q/xJlZWVYBIsF07II3/XqGOpZ/UtR/cPnRrNbY 28Y3c1Ds96xWA== Received: by mercury (Postfix, from userid 1000) id 46B97106A85F; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 07/17] dt-bindings: lcdif: Do not require power-domains for i.MX6ULL Date: Tue, 13 Feb 2024 02:00:56 +0100 Message-ID: <20240213010347.1075251-8-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" i.MX6UL(L) uses "fsl,imx6sx-lcdif" as fallback compatible string, but has only very lightweight DISPLAY power domain. Its DISPLAY power domain is not supported by the binding / Linux kernel at the moment. Since the current setup is working, let's remove the power-domain from being required for that platform to fix the warning printed by CHECK_DTBS=3Dy. Fixes: f62678a77d58 ("dt-bindings: mxsfb: Document i.MX8M/i.MX6SX/i.MX6SL p= ower-domains property") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Doc= umentation/devicetree/bindings/display/fsl,lcdif.yaml index 1c2be8d6f633..0681fc49aa1b 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -120,13 +120,19 @@ allOf: maxItems: 1 clock-names: maxItems: 1 + - if: + properties: + compatible: + const: fsl,imx6sx-lcdif + then: + required: + - power-domains - if: properties: compatible: contains: enum: - fsl,imx6sl-lcdif - - fsl,imx6sx-lcdif - fsl,imx8mm-lcdif - fsl,imx8mn-lcdif - fsl,imx8mp-lcdif --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D090D692E1; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; cv=none; b=d1fcEwN1bxO7hkX/x+XEachS6MEUWLsYTpeEb4Mq+KMzNIeDECLjG31A633ta2HFRAbIxt/cHrk7Z4kQHjeDAAi4EKOfZj1skp0WHQZQGIsQlFjx5wqGJOHxlcwjlHZmTd+2psAsaignxzQuJQ+Z66u538lmlxbN0qZEr89WeUw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; c=relaxed/simple; bh=2Rf/qADjPS/HdwZc3ACrJCkDkpnzYWtpsvVoZxBWBCU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aJCfpnY57N8Rzks9vDKxLvahP+uDC7CchXlb6Yew+Z3sbjlgBDmO/2yxHFZS6Lnehse+WdKEW/qZOuInBZZqw+rovWbYW6/fgOmxHLWD7SIi2Wk1J0fgmRuuJ+PV/1WnfUa36Q0a3nXT4yiW3q5QzZ67swDL9JthP5mnXMJfw3o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GqkbaK4W; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GqkbaK4W" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4DEC5C433A6; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=2Rf/qADjPS/HdwZc3ACrJCkDkpnzYWtpsvVoZxBWBCU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GqkbaK4WUXcgNjlkKobnKQtsKRdsfcYU85xHR9hKsf2DBO8DRfgnIi65mEp++HY4p SSi2DYgaLGqSvyzuKlDykIqDnpBb+2l0ZtsxJQ0mCiYcaqlEBvROQo82y6JxzfoEZ2 +CXX3X/TZo0MqPOPIx9hkaPgewN9ptk6DzihEU6bsAGb6sCPP8zcObL2pNW33/95Do 9kg2GBshr3QFPaFw3smEGgDPN2xho3Bp5752EJdbA6Z2F5pmV+N2BKd+CKn41MHmwv aew6563A9jMgc2ePs5kzU4CPqVnLgX9vLktaZ7jRH2Nc0LcaPpdD3p+ztVR8JkR7FS 6/7njCrgW2Jwg== Received: by mercury (Postfix, from userid 1000) id 4E06A106D636; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Yackavage , Krzysztof Kozlowski Subject: [PATCH v2 08/17] dt-bindings: fsl-imx-sdma: fix HDMI audio index Date: Tue, 13 Feb 2024 02:00:57 +0100 Message-ID: <20240213010347.1075251-9-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" HDMI Audio has been added to the DT binding documentation with an incorrect index. DT and the driver use index 26. This happened, because the binding is missing MULTI_SAI type, which is using index 25. Reported-by: Michael Yackavage Fixes: 7bdbd87d4008 ("dt-bindings: fsl-imx-sdma: Convert imx sdma to DT sch= ema") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Docu= mentation/devicetree/bindings/dma/fsl,imx-sdma.yaml index b95dd8db5a30..37135fa024f9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml @@ -92,7 +92,8 @@ properties: description: needs firmware more than ver 2 - Shared ASRC: 23 - SAI: 24 - - HDMI Audio: 25 + - Multi SAI: 25 + - HDMI Audio: 26 =20 The third cell: transfer priority ID enum: --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D089A67E97; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; cv=none; b=W+dAu3H9frWd8NP+w9YtHR7d7qgvggxxbkekZ1UnCO8o7rRRhkAH0Zo65NnF4JWjQp/sY8sfoDK4zchvlITmYCwPrevrdzQhQDaeMi/+V0X2YbMyYBiGDMZWey9ATpFfSBu5ES+KLBscCc7udvsOfT4gIHuO2batyyWfhd0w+7M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; c=relaxed/simple; bh=4dEfl82ZwKQ7mXIpNreWb5CcjIFADyzlcxSDXtMAG3w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=trtJQdBxNYBfcFA2s/2xr935TmFQFx8P+pN/jIOQF5wyb6gpjmyqaBjTY2Lf2luhBp195VXCdp2wHRMWk60QdHwzmaSU8TogEhT2Qw8moBEKhjFcIg+piys6MydCEWPreFeIeFqp7PFopBY/8DBMPg+c/2NkDoZMXsAACC5RdkA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HZErKdlR; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HZErKdlR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 419B3C433C7; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=4dEfl82ZwKQ7mXIpNreWb5CcjIFADyzlcxSDXtMAG3w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HZErKdlRR/fMWxh89IBb8dkrJ3qxrlPRMiSiHMDQo0onkUO4hGYnipB7Pzi4JobHs ZccsU+lCidwB7p+Oa2Cwa8XRwHXU4C4dFnefOT0uT/2WKRgVVixNveBjWiDRIBA1Dh dWT6zZWhy6BlEKV22X+fhsuLknG83MbVFO3HM3Yy3xuIh2gi6H6qAiPENJ7YBKllo7 umMHl67B44daavl0w6BF8uukls3pozN5hCW9HIIGEBb7ES1ZoNBkQJ3f/U8YVQY4Ds pzPmDh6Ek0zy4SCNlBg8z4KNm7EvmkA0te+udLkmOtFAhF8tn/YFhS7oXy1tyYky9C Z9yD1FxqBAMwQ== Received: by mercury (Postfix, from userid 1000) id 53429106D637; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/17] ARM: dts: imx6ull: fix pinctrl node name Date: Tue, 13 Feb 2024 02:00:58 +0100 Message-ID: <20240213010347.1075251-10-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" pinctrl node name must be either pinctrl or pinmux. Signed-off-by: Sebastian Reichel Reviewed-by: Linus Walleij --- arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi b/arch/arm/boot/dts/nxp= /imx/imx6ull.dtsi index 2bccd45e9fc2..8a1776067ecc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi @@ -75,7 +75,7 @@ rngb: rng@2284000 { clocks =3D <&clks IMX6UL_CLK_DUMMY>; }; =20 - iomuxc_snvs: iomuxc-snvs@2290000 { + iomuxc_snvs: pinctrl@2290000 { compatible =3D "fsl,imx6ull-iomuxc-snvs"; reg =3D <0x02290000 0x4000>; }; --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D09AD692FF; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; cv=none; b=ObTn5EPqpZlp+t9XiKTPjdhemprpi7VIphIz1DVEIem8ek8S5mYp35fEHLBTYjnM4KR2BA88VZuCNhmjN7Yhb1XC/Xe7BEH1IV/0KadyYSyMgXqmTOun4Kdew7qyQi1xg3GQOEcVLVpGMZH+4lvwZZS2avmAMFl6oveHcr/kHwQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786235; c=relaxed/simple; bh=pSvctDHxVCaAu+4cZjOT/I3a/3LHsGScFSRvh9RHyIQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sbviJTrIJa+p9PfqFG1+g67KfOnL7z/+wsEFS/JHHxdZioThleE39h5PKLtJdQT5JLL6pgADDXV8JGWBQcFoQ10Af6PWe2f50qOo5/+Eo+uGxMI/lCPPKVECIE2OyUjsGDGQrlD5xmOny/sMuZoKMVSN5ZbJq7oy+lirlY40rYk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WP/DvuEd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WP/DvuEd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4B8B3C43399; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=pSvctDHxVCaAu+4cZjOT/I3a/3LHsGScFSRvh9RHyIQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WP/DvuEdP2yZwW7/I6LJRn5k8K8J2czcQ8L5O3VNIQE6QH1HbnIR5nzJqr/hOsPvm ZDQCnQ4gTVfrCPpP6g3tirV5rJD4B3JeMR03dtFh9F/rvZB40s96TYCFNYf314qlE3 3CxbXyWM6ZVJZJVqjwJ4AtGfRLJ6Z8CkPf0606/6XiPIvYKu+YgtzCM/vvFBWuix+1 QicoKhdeYMJ39nDPvQk0q9zKQOSX4ePnOP4W1zXe1yk2Ko4woIQB8hBAJMqoDimuQM PHRMgeRaeUsMkm/29+HuzDYYPIIHMndpxMIklH8Z/CyY/SqLUHTwxAbie3+mWSoNJD Dy1H8K/YJXmxw== Received: by mercury (Postfix, from userid 1000) id 58C5F106D638; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/17] ARM: dts: imx6ul: Remove fsl,anatop from usbotg1 Date: Tue, 13 Feb 2024 02:00:59 +0100 Message-ID: <20240213010347.1075251-11-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" fsl,anatop should only be added to the usbphy nodes. Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index a27a7554c2e7..9eb4eee0c272 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -855,7 +855,6 @@ usbotg1: usb@2184000 { clocks =3D <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy =3D <&usbphy1>; fsl,usbmisc =3D <&usbmisc 0>; - fsl,anatop =3D <&anatop>; ahb-burst-config =3D <0x0>; tx-burst-size-dword =3D <0x10>; rx-burst-size-dword =3D <0x10>; --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3035B6997E; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Fix the following warning found via CHECK_DTBS: tempmon: '#thermal-sensor-cells' is a required property Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index 9eb4eee0c272..45b7605ac381 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -638,6 +638,7 @@ tempmon: tempmon { nvmem-cells =3D <&tempmon_calib>, <&tempmon_temp_grade>; nvmem-cell-names =3D "calib", "temp_grade"; clocks =3D <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells =3D <0>; }; }; =20 --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3876669D01; Tue, 13 Feb 2024 01:03:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 13 Feb 2024 01:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=Oc6mVzGyq/BN1P7mRTpRHKgFXcuCun6rDvCNqAaPnEo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mKcPJtL8ZkvRX3ihoSlK23ml3tIypYeKNljH2z7Oucl2NjD+S1FL+ic/RyU7ujITs XPd8RO0yiOPR/nqyELodeZusPJg+mRIXq6j8LV7EVzq9a5JDygrxON9TLt1SQBNcp4 xRAEi/dD6CI/lS/K4LYGDDeXpjwJJKjGKs6qYQEiOEwEILW22BeuaiT/EcQyPThTTf r+vSq8+jC66aIoxF9KUfPWqdyDs2CEgUv/uTg9Yi6vfFbgahhAGFWo0TaA+Q5dqDuo 2BA61YyPdn77oxBIu5nf5Vt0pbPuuZw9M2AaiHY9SKr7Pab8NcuRx5mXG+AeP6VlbR bOIdqYdVLms1Q== Received: by mercury (Postfix, from userid 1000) id 63782106D63A; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 12/17] ARM: dts: nxp: imx6ul: xnur-gpio -> xnur-gpios Date: Tue, 13 Feb 2024 02:01:01 +0100 Message-ID: <20240213010347.1075251-13-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace all "xnur-gpio" with "xnur-gpios" in the i.MX6UL(L) Touchscreen node. Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boo= t/dts/nxp/imx/imx6ul-14x14-evk.dtsi index 2ac40d69425b..f10f0525490b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi @@ -321,7 +321,7 @@ &snvs_pwrkey { &tsc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time =3D <0xffff>; pre-charge-time =3D <0xfff>; status =3D "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/= nxp/imx/imx6ul-geam.dts index 875ae699c5cb..2ca18f3dad0a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -203,7 +203,7 @@ &pwm8 { &tsc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; }; =20 &sai2 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi b/arc= h/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi index 18cac19aa9b0..af337f18a266 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi @@ -156,7 +156,7 @@ &snvs_pwrkey { &tsc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_tsc>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time =3D <0xffff>; pre-charge-time =3D <0xffff>; status =3D "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi b/arch/arm/bo= ot/dts/nxp/imx/imx6ull-dhcom-som.dtsi index 830b5a5064f2..6d2163250b5d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi @@ -273,7 +273,7 @@ &tsc { pinctrl-names =3D "default"; pre-charge-time =3D <0xfff>; touchscreen-average-samples =3D <32>; - xnur-gpio =3D <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios =3D <&gpio1 3 GPIO_ACTIVE_LOW>; }; =20 /* DHCOM UART1 */ --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3880E69D04; Tue, 13 Feb 2024 01:03:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786236; cv=none; b=W9cFvDnqnu4GaSQ+Q7MXlHTcpD/DohkUEPqPmdWUQQbXwPTuQ3Xn69vhZgtajXg9Ff2dje8P8mcGxfTF26S3Ec1lhJ37QggPE6dfOz0zhBL/lbmmwqyS0UIKsyc9/v9PSpP+mKibZnXYw/INDyi+UON4VqfvDPNzEoRb/rp6c9c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786236; c=relaxed/simple; bh=uCDHKIm6DTVG+Z7IiiCmTbgbHgtV7TTCN+RO8gz4Has=; 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Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 13/17] ARM: dts: nxp: imx6ul: fix touchscreen node name Date: Tue, 13 Feb 2024 02:01:02 +0100 Message-ID: <20240213010347.1075251-14-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The nodename for a touchscreen should be touchscreen instead of tsc. Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index 45b7605ac381..8aa365f837ca 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -370,7 +370,7 @@ asrc: asrc@2034000 { }; }; =20 - tsc: tsc@2040000 { + tsc: touchscreen@2040000 { compatible =3D "fsl,imx6ul-tsc"; reg =3D <0x02040000 0x4000>, <0x0219c000 0x4000>; interrupts =3D , --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 387A569D03; Tue, 13 Feb 2024 01:03:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786236; cv=none; b=sSePmCVK5sVbOiXh/KLdptGC91AKaY9HkgKgFo8dAmAJ2mQeLU+rlS5YKYtVj4e+uembrvAHvvufOFnSzyWFBb7OiJ5gQ7YGohs+6yH69N1y11A7zPMxbz52DLz634Ng4xsDMmyh4kpN9UO+aliJdtaQKECJHBE2w86oFCSHSD4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786236; c=relaxed/simple; bh=cRnD3UxdkU8FVmoJGMo6G3O+GOIH2cO9D8tU3TTlz18=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MbRn3wccPthu6FP8wsp4qGzjhjcA2E3gui+5vFRM5o/HMTarQWkmmZYd5ESwDbR3FakBAgEJSwthdYsd2/a1/p5xrIhklKbjorw7Nh7d4NFAAVzlr/3f7dD1+8gx2KxJU352G1Tx2TWG+jCVwtcBFYRlZNYqHMg0fafW62kellY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JWiuZCB8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JWiuZCB8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8FC0FC43142; Tue, 13 Feb 2024 01:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786235; bh=cRnD3UxdkU8FVmoJGMo6G3O+GOIH2cO9D8tU3TTlz18=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JWiuZCB8ybWARJWagy8tOjTJ1f/fPDCq+69P2ldXLh7zWN9mv6vvQPeNv1z74dIQy e2tP3RECpNl4EWFLJPQSmKaS55MnkqYhgdReDUzgm0Xr8qjSZn65UYcK4Hi6qJ3uOS uRUXBBqYtuhrgwmvG5SwYtVvJcbLIFmyATOf/aFmZpcIECjHzC514VAJWgjQ2LXJGm WbLb5Cvx84gsDUAuBJV3G4Q31CZ3I4F1lg1Uvzgo7xZwwm2pA0arhqXlhandFHM9+f i2LojE4XAt+VtqBIQ4vctwcYGMQGtrdOf1mSDLd+6GIboTuKKOj0BhHLIYTGCOnWLU Tb/5kCA5UVSQQ== Received: by mercury (Postfix, from userid 1000) id 6E608106D63C; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 14/17] ARM: dts: nxp: imx: fix weim node name Date: Tue, 13 Feb 2024 02:01:03 +0100 Message-ID: <20240213010347.1075251-15-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fix WEIM node name in all i.MX SoC DT files. Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/nxp/imx/imx1.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx27.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx35.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx1.dtsi b/arch/arm/boot/dts/nxp/im= x/imx1.dtsi index 1ac10965fdfd..389ecb1ebf8f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx1.dtsi @@ -251,7 +251,7 @@ gpio4: gpio@21c300 { }; }; =20 - weim: weim@220000 { + weim: memory-controller@220000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx1-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx27.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx27.dtsi index ec472695c71e..ec3ccc8f4095 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27.dtsi @@ -568,7 +568,7 @@ nfc: nand-controller@d8000000 { status =3D "disabled"; }; =20 - weim: weim@d8002000 { + weim: memory-controller@d8002000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx27-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx31.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx31.dtsi index e1ae7c175f7d..00006c90d9a7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx31.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx31.dtsi @@ -352,7 +352,7 @@ nfc: nand@b8000000 { status =3D "disabled"; }; =20 - weim: weim@b8002000 { + weim: memory-controller@b8002000 { compatible =3D "fsl,imx31-weim", "fsl,imx27-weim"; reg =3D <0xb8002000 0x1000>; clocks =3D <&clks 56>; diff --git a/arch/arm/boot/dts/nxp/imx/imx35.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx35.dtsi index 2d20e5541acc..442dc15677b8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx35.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx35.dtsi @@ -374,7 +374,7 @@ nfc: nand@bb000000 { status =3D "disabled"; }; =20 - weim: weim@b8002000 { + weim: memory-controller@b8002000 { #address-cells =3D <2>; #size-cells =3D <1>; clocks =3D <&clks 0>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/i= mx/imx51.dtsi index c96d6311dfa7..4efce49022e4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -578,7 +578,7 @@ m4if: m4if@83fd8000 { reg =3D <0x83fd8000 0x1000>; }; =20 - weim: weim@83fda000 { + weim: memory-controller@83fda000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx51-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp= /imx/imx6qdl.dtsi index 81142c523fa8..8431b8a994f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -1158,7 +1158,7 @@ mmdc1: memory-controller@21b4000 { /* MMDC1 */ status =3D "disabled"; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6sl.dtsi index 28111efb19a6..6aa61235e39e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi @@ -949,7 +949,7 @@ rngb: rngb@21b4000 { clocks =3D <&clks IMX6SL_CLK_DUMMY>; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; reg =3D <0x021b8000 0x4000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6sx.dtsi index df3a375f0a3e..0de359d62a47 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1107,7 +1107,7 @@ fec2: ethernet@21b4000 { status =3D "disabled"; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; compatible =3D "fsl,imx6sx-weim", "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/= imx/imx6ul.dtsi index 8aa365f837ca..aeb7e07fd309 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -975,7 +975,7 @@ memory-controller@21b0000 { clocks =3D <&clks IMX6UL_CLK_MMDC_P0_IPG>; }; =20 - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells =3D <2>; #size-cells =3D <1>; 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Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 15/17] dt-bindings: vendor-prefixes: add UNI-T Date: Tue, 13 Feb 2024 02:01:04 +0100 Message-ID: <20240213010347.1075251-16-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Uni-Trend Technology is a manufacturer of measurement and testing tools. Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 1a0dc04f1db4..e945e76696c2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1484,6 +1484,8 @@ patternProperties: description: Ufi Space Co., Ltd. "^ugoos,.*": description: Ugoos Industrial Co., Ltd. + "^uni-t,.*": + description: Uni-Trend Technology (China) Co., Ltd. "^uniwest,.*": description: United Western Technologies Corp (UniWest) "^upisemi,.*": --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 428EE7318B; Tue, 13 Feb 2024 01:03:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786239; cv=none; b=hyqGbxXflhDmn98iM/j/GGSKdhWuX7WLbSt2jXOjtz9nIqN0ZbfvOK+OVjRnA98H1tRk7tAltpr3tukIUDb4RNQCXwQ72fdk4cLzFymTOmJHlgf+lhYR5wdGMs5dG5uTaEWCU4NwaZDTDWuCEzXaLFNj9qE5aaw+Zj6r8WHdGxQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786239; c=relaxed/simple; bh=+SUYL0W4dHgMw59ZTfos6cqc8yQnbtH+XaraJUPUIeE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HLW4khp7lVL8CgMtGC4KYcDy2DYQETiNdoLS4wiEjlQMlRcP3vmLIeU1C9lNE5liMhkm6SkVbE/ajCF7puiGj1S+keCW+I0NxunqcWZUTNun7hhpg5hTrTsFgIiPRrEG8pO9S4+WodkAFhPUvbZEnS0vAZv7abRLJW1E/17bWjQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lxduPwWC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lxduPwWC" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6CED8C43390; Tue, 13 Feb 2024 01:03:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786238; bh=+SUYL0W4dHgMw59ZTfos6cqc8yQnbtH+XaraJUPUIeE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lxduPwWCuOcpFCYFZKH9j01/7fW8c7OREAdvbK2BhkxhIFMFRXJFodhiW9l7YO26g nxJTjt2t4sEGbG1MHfASp4LsRRXAvKmICQkjKEG6Bx+GlNX/1QKYysRiYLVV2fWdoM 4kxLT7wAZBMmODgZVQrEjOHAnebHKu0ZDPgN+jGJF0tmfEWiG+XtqVHpzVXqtW3C6l X2Hlwm96r1deT9tieLGMs/OnPZKcWnn6uepc7l1syOeCPtbKYXg03+1SXwhHMXxNSX +O0ivZdsaQtoLFPLuzcjZ6/2Bb+pTUWYy7JhfmVJZLHT0Au181or1hqChIyQFEWse/ 6IBjKE2T1U8aQ== Received: by mercury (Postfix, from userid 1000) id 794B4106D63E; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 16/17] dt-bindings: arm: add UNI-T UTi260b Date: Tue, 13 Feb 2024 02:01:05 +0100 Message-ID: <20240213010347.1075251-17-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatible value for i.MX6ULL based UNI-T UTi260b thermal camera. Signed-off-by: Sebastian Reichel Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 228dcc5c7d6f..7b65f9c9c1a5 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -708,6 +708,7 @@ properties: - toradex,colibri-imx6ull # Colibri iMX6ULL Modules - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) = Module - toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT = Modules + - uni-t,uti260b # UNI-T UTi260B Thermal Camera - const: fsl,imx6ull =20 - description: i.MX6ULL Armadeus Systems OPOS6ULDev Board --=20 2.43.0 From nobody Sun Sep 8 01:04:11 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8EF6768FF; Tue, 13 Feb 2024 01:03:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786239; cv=none; b=H7Ui3YcHPDd0ccOnciwV+QsRfNoJe0Ayp2F9npCMv9ktjeLzmVg7f4nl3ibziz4ISOkr/5dvSsgMnSI1RLCX1HaxpBIsy5VbyG6QxbAcFuRAX2I87g/9S0bGaL18bBQJLRz4sNzR3LSfYWy3J7LMGLgaFHjaee9hqoi9PXvYmUE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707786239; c=relaxed/simple; bh=54ISsNFLqfzPZb1GL4iH9XJl7WELgMxcJdiOsHrZFDA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=O3M2qu+21voKw5Z4G7vaP7rvS54cNA9TZ6AfrUPkafCz3xeX2t8qoze/eBMqc0qpjYZvPaJDRxan4R2xwxurWS919XBwMXWRvRVPxt5ujEkAIf4bOZ7bSGGJ3Z2ilbYMAZt9k06aARIk+RuA29M8zrSghd43ny9PIWfOejKVwTE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZqAmJTBd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZqAmJTBd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7DDCC43394; Tue, 13 Feb 2024 01:03:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707786239; bh=54ISsNFLqfzPZb1GL4iH9XJl7WELgMxcJdiOsHrZFDA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZqAmJTBdqWrX/512QM+z4hwdbXBh/7AIiIfTJqtkJEstA26jkU0Tdt4rYmcTIPiYC CUwmNiMMDyxmsPBCV0q6F6KqI0ZrGzRdCde3OF5k5qIPPtUV5Pca9PYUwCSuiDFkxh vOgjK8Q9s2eb9q+OLFbU/i2N+vQZ57bS4DcWCcatRqG6CEpWFQ8fqXNnZL0EZSzHKw 2W5XyMQtU37mHjpNX9uU3GEpVhE1gMbEuTIEWifVVyuBKDhIVRR0RSdZ1C3lHNXumF 6ipPVsZSX0iDkgE8h1UoXWaQDnCyvWv04TGLM2/HRAuw2/JXF6YhhZ+05ClWmNUpnZ WrIPFAKoDdKxA== Received: by mercury (Postfix, from userid 1000) id 7F3A1106D63F; Tue, 13 Feb 2024 02:03:49 +0100 (CET) From: Sebastian Reichel To: Sebastian Reichel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team Cc: Dong Aisheng , Linus Walleij , Dmitry Torokhov , Mark Brown , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 17/17] ARM: dts: imx6ull-uti260b: Add board Date: Tue, 13 Feb 2024 02:01:06 +0100 Message-ID: <20240213010347.1075251-18-sre@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213010347.1075251-1-sre@kernel.org> References: <20240213010347.1075251-1-sre@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add UNI-T UTi260b thermal camera board. Signed-off-by: Sebastian Reichel Reviewed-by: Stefan Wahren --- arch/arm/boot/dts/nxp/imx/Makefile | 1 + arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts | 572 ++++++++++++++++++ 2 files changed, 573 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx= /Makefile index a724d1a7a9a0..47350cf3ddeb 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -349,6 +349,7 @@ dtb-$(CONFIG_SOC_IMX6UL) +=3D \ imx6ull-tarragon-slavext.dtb \ imx6ull-tqma6ull2-mba6ulx.dtb \ imx6ull-tqma6ull2l-mba6ulx.dtb \ + imx6ull-uti260b.dtb \ imx6ulz-14x14-evk.dtb \ imx6ulz-bsh-smm-m2.dtb dtb-$(CONFIG_SOC_IMX7D) +=3D \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts b/arch/arm/boot/= dts/nxp/imx/imx6ull-uti260b.dts new file mode 100644 index 000000000000..2c0972145c79 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-uti260b.dts @@ -0,0 +1,572 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2022-2024 Sebastian Reichel + +/dts-v1/; +#include "imx6ull.dtsi" +#include +#include +#include +#include + +/ { + model =3D "UNI-T UTi260B Thermal Camera"; + compatible =3D "uni-t,uti260b", "fsl,imx6ull"; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x80000000 0x20000000>; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_led_ctrl>; + + led { + color =3D ; + function =3D LED_FUNCTION_FLASH; + gpios =3D <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state =3D "off"; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_gpio_keys>; + autorepeat; + + up-key { + label =3D "Up"; + gpios =3D <&gpio2 11 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + down-key { + label =3D "Down"; + gpios =3D <&gpio2 12 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + left-key { + label =3D "Left"; + gpios =3D <&gpio2 13 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + right-key { + label =3D "Right"; + gpios =3D <&gpio2 10 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + ok-key { + label =3D "Ok"; + gpios =3D <&gpio2 9 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + return-key { + label =3D "Return"; + gpios =3D <&gpio2 15 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + play-key { + label =3D "Media"; + gpios =3D <&gpio2 8 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + trigger-key { + label =3D "Trigger"; + gpios =3D <&gpio2 14 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + power-key { + label =3D "Power"; + gpios =3D <&gpio2 3 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + light-key { + label =3D "Light"; + gpios =3D <&gpio2 1 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; + + panel_backlight: backlight { + compatible =3D "pwm-backlight"; + brightness-levels =3D <0 4 8 16 32 64 128 255>; + default-brightness-level =3D <6>; + enable-gpios =3D <&gpio1 9 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_backlight_enable>; + power-supply =3D <®_vsd>; + pwms =3D <&pwm1 0 50000 0>; + }; + + reg_vsd: regulator-vsd { + compatible =3D "regulator-fixed"; + regulator-name =3D "VSD_3V3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_vref: regulator-vref-4v2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VREF_4V2"; + regulator-min-microvolt =3D <4200000>; + regulator-max-microvolt =3D <4200000>; + }; + + tp5000: charger { + compatible =3D "gpio-charger"; + charger-type =3D "usb-sdp"; + gpios =3D <&gpio1 1 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_charger_stat1>; + }; + + battery: battery { + compatible =3D "simple-battery"; + /* generic 26650 battery */ + device-chemistry =3D "lithium-ion"; + charge-full-design-microamp-hours =3D <5000000>; + voltage-max-design-microvolt =3D <4200000>; + voltage-min-design-microvolt =3D <3300000>; + }; + + fuel-gauge { + compatible =3D "adc-battery"; + charged-gpios =3D <&gpio1 2 GPIO_ACTIVE_LOW>; + io-channel-names =3D "voltage"; + io-channels =3D <&adc1 7>; + monitored-battery =3D <&battery>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_charger_stat2>; + power-supplies =3D <&tp5000>; + }; + + poweroff { + compatible =3D "gpio-poweroff"; + gpios =3D <&gpio2 4 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_poweroff>; + }; +}; + +&gpio1 { + ir-reset-hog { + gpio-hog; + gpios =3D <3 GPIO_ACTIVE_LOW>; + line-name =3D "ir-reset-gpio"; + output-low; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_ir_reset>; + }; +}; + +&gpio2 { + /* configuring this to output-high results in poweroff */ + power-en-hog { + gpio-hog; + gpios =3D <6 GPIO_ACTIVE_HIGH>; + line-name =3D "power-en-gpio"; + output-low; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_poweroff2>; + }; +}; + +&ecspi3 { + cs-gpios =3D <&gpio1 20 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_spi3>, <&mux_spi3_cs>; + status =3D "okay"; + + panel@0 { + compatible =3D "inanbo,t28cp45tn89-v17"; + reg =3D <0>; + backlight =3D <&panel_backlight>; + power-supply =3D <®_vsd>; + spi-cpha; + spi-cpol; + spi-max-frequency =3D <1000000>; + spi-rx-bus-width =3D <0>; + + port { + panel_in: endpoint { + remote-endpoint =3D <&display_out>; + }; + }; + }; +}; + +&uart1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_uart>; + status =3D "okay"; +}; + +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_pwm>; + status =3D "okay"; +}; + +&i2c1 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_i2c1>; + status =3D "okay"; + + camera@21 { + compatible =3D "galaxycore,gc0308"; + reg =3D <0x21>; + clocks =3D <&clks IMX6UL_CLK_CSI>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_gc0308>; + powerdown-gpios =3D <&gpio1 5 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&gpio1 6 GPIO_ACTIVE_LOW>; + vdd28-supply =3D <®_vsd>; + + port { + gc0308_to_parallel: endpoint { + remote-endpoint =3D <¶llel_from_gc0308>; + bus-width =3D <8>; + data-shift =3D <2>; /* lines 9:2 are used */ + hsync-active =3D <1>; /* active high */ + vsync-active =3D <1>; /* active high */ + data-active =3D <1>; /* active high */ + pclk-sample =3D <1>; /* sample on rising edge */ + }; + }; + }; +}; + +&csi { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_csi>; + + port { + parallel_from_gc0308: endpoint { + remote-endpoint =3D <&gc0308_to_parallel>; + }; + }; +}; + +&i2c2 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_i2c2>; + status =3D "okay"; + + rtc@51 { + compatible =3D "nxp,pcf8563"; + reg =3D <0x51>; + }; +}; + +&lcdif { + assigned-clocks =3D <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; + assigned-clock-parents =3D <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_lcd_data>, <&mux_lcd_ctrl>; + status =3D "okay"; + + port { + display_out: endpoint { + remote-endpoint =3D <&panel_in>; + }; + }; +}; + +&usdhc1 { + /* MicroSD */ + cd-gpios =3D <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + no-1-8-v; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&mux_sdhc1>, <&mux_sdhc1_cd>; + pinctrl-1 =3D <&mux_sdhc1_100mhz>, <&mux_sdhc1_cd>; + pinctrl-2 =3D <&mux_sdhc1_200mhz>, <&mux_sdhc1_cd>; + wakeup-source; + vmmc-supply =3D <®_vsd>; + status =3D "okay"; +}; + +&usdhc2 { + /* eMMC */ + keep-power-in-suspend; + no-1-8-v; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_sdhc2>; + wakeup-source; + status =3D "okay"; +}; + +&wdog1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_wdog>; +}; + +&adc1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mux_adc>; + vref-supply =3D <®_vref>; + #io-channel-cells =3D <1>; + status =3D "okay"; +}; + +&usbotg1 { + /* USB-C connector */ + disable-over-current; + dr_mode =3D "otg"; + status =3D "okay"; +}; + +&usbotg2 { + /* thermal sensor */ + disable-over-current; + dr_mode =3D "host"; + status =3D "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal =3D <106>; +}; + +&usbphy2 { + fsl,tx-d-cal =3D <106>; +}; + +&iomuxc { + mux_ir_reset: irresetgrp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3008 + >; + }; + + mux_poweroff: poweroffgrp { + fsl,pins =3D < + MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x3008 + >; + }; + + mux_poweroff2: poweroff2grp { + fsl,pins =3D < + MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x3008 + >; + }; + + mux_charger_stat1: charger1grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3008 + >; + }; + + mux_charger_stat2: charger2grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x3008 + >; + }; + + mux_wdog: wdoggrp { + fsl,pins =3D < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 + >; + }; + + mux_sdhc1_cd: sdhc1-cd-grp { + fsl,pins =3D < + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + mux_sdhc1: sdhc1grp { + fsl,pins =3D < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + >; + }; + + mux_sdhc1_100mhz: sdhc1-100mhz-grp { + fsl,pins =3D < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + mux_sdhc1_200mhz: sdhc1-200mhz-grp { + fsl,pins =3D < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + mux_sdhc2: sdhc2grp { + fsl,pins =3D < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + mux_i2c1: i2c1grp { + fsl,pins =3D < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + mux_i2c2: i2c2grp { + fsl,pins =3D < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8 + >; + }; + + mux_uart: uartgrp { + fsl,pins =3D < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + mux_gpio_keys: gpiokeygrp { + fsl,pins =3D < + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x3008 + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x3008 + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x3008 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x3008 + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x3008 + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x3008 + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x3008 + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x3008 + MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x3008 + MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x3008 + >; + }; + + mux_led_ctrl: ledctrlgrp { + fsl,pins =3D < + MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x3008 + >; + }; + + mux_adc: adcgrp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0 + >; + }; + + mux_pwm: pwm1grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + mux_backlight_enable: blenablegrp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3008 + >; + }; + + mux_lcd_data: lcdifdatgrp { + fsl,pins =3D < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + >; + }; + + mux_lcd_ctrl: lcdifctrlgrp { + fsl,pins =3D < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + >; + }; + + mux_csi: csi1grp { + fsl,pins =3D < + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + mux_gc0308: gc0308grp { + fsl,pins =3D < + MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1e038 + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b088 + MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x1b088 + >; + }; + + + mux_spi3: ecspi3grp { + fsl,pins =3D < + MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x100b1 + MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x100b1 + >; + }; + + mux_spi3_cs: ecspi3_csgrp { + fsl,pins =3D < + MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x3008 + >; + }; +}; --=20 2.43.0