From nobody Fri Oct 18 08:37:48 2024 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9337224FA; Tue, 13 Feb 2024 00:54:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707785700; cv=none; b=RT/PP931rI30/26R8i9UculpWLNEMH4UQ7BJ/Iefg/5hMkE9K2sDvYETdqXl13fNGH/nPAnLQg/PckZFoPvH7Qf+MXlwpJw5ts59DdXA8085yvcxdF7rFegWERj3rY8Wibo6BUkfELlvfwu+ovapS/7qiMtpwL280GZTklVsIuo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707785700; c=relaxed/simple; bh=noUq46uIIl4c54Ml8nUqG/zmcTMdZmp/uQzsEWtdfvc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ERA34B2pebcSXwp0gX240ouH4yc00P1YheaY4imWaM1mSZ/WS/9+blTZOAwain2R3Hpr2gMFDXw+t7+VREIpdUpDS7K6wkkKlX3sqrBLHpviZ+MdIBmAeVhMyo4PshulV4RpQgEoZoft6zDqpD/xzdYSLd9FzFivxLxTZvUcQps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=cMo+B+Rw; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="cMo+B+Rw" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41D09Ysk016771; Tue, 13 Feb 2024 00:54:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=YEmwQFMFTsyU12bZ+DA3 QUirFGkywDIHtACo1YVzlzE=; b=cMo+B+RwHegcGoz4tQnlHJha5RGEQ9a1up1+ OoiXUrNejPJq1LmVXFOpaMer1pHmegIs2zTnT+xsOTrA2jfwM7AUahjOl7b+d3AG XtEz63s3BaqWsyl7mJ4LgCe+G4HkdFW4zU1/kLhyhyc9NOrjzF6BDRlmyDXTEQ36 eQmQMCSc1NyAfnMydeqQkbXcW40s5QKRQ1XXjm8EHh9+Gs6eqHyer7zUlOurpVL2 96CeWodMYtcslOYaP7jR6NRhW1WKlBCciH2yQWl73p2QUC2QND4JhawmgQXcvf+q Om/77+QpxnrvcIjcf+1xeLv1rFnguQD5D9fS427+YvFDcgQ36g== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3w62kt4tya-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 13 Feb 2024 00:54:36 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41D0sZr3016233 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 13 Feb 2024 00:54:35 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 12 Feb 2024 16:54:35 -0800 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , Mathias Nyman , Wesley Cheng Subject: [PATCH v15 09/50] xhci: Decouple handling an event from checking for unhandled events Date: Mon, 12 Feb 2024 16:53:41 -0800 Message-ID: <20240213005422.3121-10-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240213005422.3121-1-quic_wcheng@quicinc.com> References: <20240213005422.3121-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: HRL5JZU_lawJd8PCleqpbovf1MB37d1r X-Proofpoint-ORIG-GUID: HRL5JZU_lawJd8PCleqpbovf1MB37d1r X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-12_20,2024-02-12_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 suspectscore=0 phishscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=746 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402130005 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mathias Nyman Some sequences, will require traversing through the entire event ring without handling the event TRB. This is ideal for when secondary interrupters that are utilized by external entities need to clean up the interrupter's event rings during halting of the XHCI HCD. Signed-off-by: Mathias Nyman Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci-ring.c | 38 ++++++++++++++++++------------------ 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 293239d8fab0..6ef95f67970a 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -2912,25 +2912,18 @@ static int handle_tx_event(struct xhci_hcd *xhci, } =20 /* - * This function handles all OS-owned events on the event ring. It may dr= op + * This function handles one OS-owned event on the event ring. It may drop * xhci->lock between event processing (e.g. to pass up port status change= s). - * Returns >0 for "possibly more events to process" (caller should call ag= ain), - * otherwise 0 if done. In future, <0 returns should indicate error code. */ -static int xhci_handle_event(struct xhci_hcd *xhci, struct xhci_interrupte= r *ir) +static int xhci_handle_event_trb(struct xhci_hcd *xhci, struct xhci_interr= upter *ir, + union xhci_trb *event) { - union xhci_trb *event; u32 trb_type; =20 - event =3D ir->event_ring->dequeue; - - if (!unhandled_event_trb(ir->event_ring)) - return 0; - trace_xhci_handle_event(ir->event_ring, &event->generic); =20 /* - * Barrier between reading the TRB_CYCLE (valid) flag above and any + * Barrier between reading the TRB_CYCLE (valid) flag before, and any * speculative reads of the event's flags/data below. */ rmb(); @@ -2960,15 +2953,11 @@ static int xhci_handle_event(struct xhci_hcd *xhci,= struct xhci_interrupter *ir) * to make sure a watchdog timer didn't mark the host as non-responsive. */ if (xhci->xhc_state & XHCI_STATE_DYING) { - xhci_dbg(xhci, "xHCI host dying, returning from " - "event handler.\n"); - return 0; + xhci_dbg(xhci, "xHCI host dying, returning from event handler.\n"); + return -ENODEV; } =20 - /* Are there more items on the event ring? Caller will call us again to - * check. - */ - return 1; + return 0; } =20 /* @@ -3018,9 +3007,14 @@ static void xhci_clear_interrupt_pending(struct xhci= _hcd *xhci, } } =20 +/* + * Handle all OS-owned events on an interrupter event ring. It may drop + * and reaquire xhci->lock between event processing. + */ static int xhci_handle_events(struct xhci_hcd *xhci, struct xhci_interrupt= er *ir) { int event_loop =3D 0; + int err; u64 temp; =20 xhci_clear_interrupt_pending(xhci, ir); @@ -3041,7 +3035,10 @@ static int xhci_handle_events(struct xhci_hcd *xhci,= struct xhci_interrupter *ir return -ENODEV; } =20 - while (xhci_handle_event(xhci, ir) > 0) { + /* Process all OS owned event TRBs on this event ring */ + while (unhandled_event_trb(ir->event_ring)) { + err =3D xhci_handle_event_trb(xhci, ir, ir->event_ring->dequeue); + /* * If half a segment of events have been handled in one go then * update ERDP, and force isoc trbs to interrupt more often @@ -3057,6 +3054,9 @@ static int xhci_handle_events(struct xhci_hcd *xhci, = struct xhci_interrupter *ir =20 /* Update SW event ring dequeue pointer */ inc_deq(xhci, ir->event_ring); + + if (err) + break; } =20 xhci_update_erst_dequeue(xhci, ir, true);