From nobody Thu Nov 14 16:40:23 2024 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95A1D5FBA9; Tue, 13 Feb 2024 15:02:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707836571; cv=none; b=l8yDDepYm5PGUrUy7msEhCl1cNi6ewmU+UQGwgD/7QbV8dxWRcmiqXcHSXDiDEJgaZLeFc8AcwXp53oNFuvM3n0Ono5Wg9CbjNG/YJKAIUS7o1akPuQgJUm3f1TOn9v7O6UsG/qQa+7PdBBYaI5of9nNH8ZEdIrBCc553JD2W7o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707836571; c=relaxed/simple; bh=Mq7Gr3WDYsBP1PMrwjprrD4YC2YKvVWwkGxj9ia8i/E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=irr6/QUcYQ7QogKGGkTBTg4usfuNMbRn6Q3YTI+9St/TtaoFk/uXP4rcliMDr9krKr4pa1rogGiMGZ7gv3CoxP1+xKlGGSPGwfDN/z+S8jWkNx74V1W78g0cVc+yh7IwsdbjS10vyxSfv254/MuE5pplGfMeY7tJEQhcm+AIbQU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=hwduHJED; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="hwduHJED" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1707836565; bh=Mq7Gr3WDYsBP1PMrwjprrD4YC2YKvVWwkGxj9ia8i/E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=hwduHJEDs0vx3pjIVoR0oZ6lTTt3czESrIxa+bFne47UUZgw0bwQXZ6SPw37KeyT2 AqUf7Vi8aMvJhcyi3J2mTafivV6AkRoCDqJmB/2w8j3nz3OZQMu8XyV8NzfL7WBvYw d0F5hPRilnGFwFy/lsBuXsdX4DslFUkk/xQPI+gw4qJddB1X9+mh+sMftaipnTX7og 58bsvuJfu/pcm/Sqyza0iYex2mN33f91od6aOCyWi1/aXX/hOvivWJyoJgxaar3+Wk LAIbMzUe/4mTmI5kp4y37EzPFWrs5uyznJD7Z/0s0rlN6JOCZvSOSYChbXRDZ9ml0+ 2QlD5kef4rivg== Received: from [192.168.1.42] (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 569D73782073; Tue, 13 Feb 2024 15:02:43 +0000 (UTC) From: =?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= Date: Tue, 13 Feb 2024 10:02:37 -0500 Subject: [PATCH v2 1/2] arm64: dts: mediatek: mt8186: Add missing clocks to ssusb power domains Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240213-mt8186-ssusb-domain-clk-fix-v2-1-1f981d35f3fd@collabora.com> References: <20240213-mt8186-ssusb-domain-clk-fix-v2-0-1f981d35f3fd@collabora.com> In-Reply-To: <20240213-mt8186-ssusb-domain-clk-fix-v2-0-1f981d35f3fd@collabora.com> To: AngeloGioacchino Del Regno , Matthias Brugger Cc: Chen-Yu Tsai , Eugen Hristev , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Allen-KH Cheng , kernel@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= X-Mailer: b4 0.12.4 The ssusb power domains currently don't list any clocks, despite depending on some, and thus rely on the bootloader leaving the required clocks on in order to work. When booting with the upstream arm64 defconfig, the power domain controller will defer probe until modules have loaded since it has an indirect dependency on CONFIG_MTK_CMDQ, which is configured as a module. However at the point where modules are loaded, unused clocks are also disabled, causing the ssusb domains to fail to be enabled and consequently the controller to fail probe: mtk-power-controller 10006000.syscon:power-controller: /soc/syscon@10006000= /power-controller/power-domain@4: failed to power on domain: -110 mtk-power-controller: probe of 10006000.syscon:power-controller failed with= error -110 Add the missing clocks for the ssusb power domains so that they can successfully probe without relying on the bootloader state. Fixes: d9e43c1e7a38 ("arm64: dts: mt8186: Add power domains controller") Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts= /mediatek/mt8186.dtsi index adaf5e57fac5..e0e5721d6b53 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -931,11 +931,17 @@ power-domain@MT8186_POWER_DOMAIN_CSIRX_TOP { =20 power-domain@MT8186_POWER_DOMAIN_SSUSB { reg =3D ; + clocks =3D <&topckgen CLK_TOP_USB_TOP>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>; + clock-names =3D "sys_ck", "ref_ck"; #power-domain-cells =3D <0>; }; =20 power-domain@MT8186_POWER_DOMAIN_SSUSB_P1 { reg =3D ; + clocks =3D <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>, + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>; + clock-names =3D "sys_ck", "ref_ck"; #power-domain-cells =3D <0>; }; =20 --=20 2.43.0