From nobody Mon Sep 16 18:55:16 2024 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6BC384D9E8; Mon, 12 Feb 2024 21:07:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707772041; cv=none; b=R4vtUlc0txeBsx2iH7wbw2k4Rhx50O8bcOASV4D30JHY9bkI7maIjDQvifAFsYm2leSbQ/lvlUqc8E0cjX/eODG1/jQZ1PqZqweRjXivIt5ImP6anfwyzrJj2Hzb2NeYFAZWrwri7h16rOVWj5WA4SFdQAZddypwYSA5xncyENs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707772041; c=relaxed/simple; bh=6uO8+5f0HuUGMhLDr4KYd9xN8pPGpxbc7PKeC1VVNfo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=CVKSq44OUglfHevKrkRGVNnT9oyq6R49gnWGYv00KWxXp+C3NpG4K3Ay/7ehUUzYn5EN5yLPyfmcFvGPmxfC7AGN6xfpA0DfuJ845pWamH38skvxPTT2Jho15BN57DUDocmqaTt3Gcy0ggSepksDvkSEfSnEGXI/W/JIRTHszzc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-IronPort-AV: E=Sophos;i="6.06,155,1705330800"; d="scan'208";a="193681651" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 13 Feb 2024 06:07:18 +0900 Received: from mulinux.home (unknown [10.226.93.37]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 439214006DEF; Tue, 13 Feb 2024 06:07:14 +0900 (JST) From: Fabrizio Castro To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven Cc: Biju Das , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrizio Castro Subject: [PATCH v7 4/4] arm64: dts: renesas: rzv2m evk: Enable pwm Date: Mon, 12 Feb 2024 21:06:52 +0000 Message-Id: <20240212210652.368680-5-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240212210652.368680-1-fabrizio.castro.jz@renesas.com> References: <20240212210652.368680-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Enable pwm{8..14} on RZ/V2M EVK. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v6->v7: * No change. v5->v6: * No change. v4->v5: * No change v3->v4: * No change v2->v3: * Added Rb tag from Geert. v1->v2: * No change .../boot/dts/renesas/r9a09g011-v2mevk2.dts | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts b/arch/arm64= /boot/dts/renesas/r9a09g011-v2mevk2.dts index 39fe3f94991e..6e636ac2d190 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts @@ -196,6 +196,34 @@ i2c2_pins: i2c2 { ; /* SCL */ }; =20 + pwm8_pins: pwm8 { + pinmux =3D ; /* PM8 */ + }; + + pwm9_pins: pwm9 { + pinmux =3D ; /* PM9 */ + }; + + pwm10_pins: pwm10 { + pinmux =3D ; /* PM10 */ + }; + + pwm11_pins: pwm11 { + pinmux =3D ; /* PM11 */ + }; + + pwm12_pins: pwm12 { + pinmux =3D ; /* PM12 */ + }; + + pwm13_pins: pwm13 { + pinmux =3D ; /* PM13 */ + }; + + pwm14_pins: pwm14 { + pinmux =3D ; /* PM14 */ + }; + sdhi0_pins: sd0 { data { pinmux =3D , /* SD0DAT0 */ @@ -251,6 +279,48 @@ &pwc { status =3D "okay"; }; =20 +&pwm8 { + pinctrl-0 =3D <&pwm8_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&pwm9 { + pinctrl-0 =3D <&pwm9_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&pwm10 { + pinctrl-0 =3D <&pwm10_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&pwm11 { + pinctrl-0 =3D <&pwm11_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&pwm12 { + pinctrl-0 =3D <&pwm12_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&pwm13 { + pinctrl-0 =3D <&pwm13_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&pwm14 { + pinctrl-0 =3D <&pwm14_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + &sdhi0 { pinctrl-0 =3D <&sdhi0_pins>; pinctrl-1 =3D <&sdhi0_pins_uhs>; --=20 2.34.1