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charset="utf-8" Switch to the batched version of the jump label update functions so instruction cache maintenance is deferred until the end of the update. Signed-off-by: Samuel Holland Reviewed-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/include/asm/jump_label.h | 2 ++ arch/riscv/include/asm/patch.h | 1 + arch/riscv/kernel/jump_label.c | 16 ++++++++++++---- arch/riscv/kernel/patch.c | 2 +- 4 files changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/riscv/include/asm/jump_label.h b/arch/riscv/include/asm/j= ump_label.h index 4a35d787c019..6290b26f4a14 100644 --- a/arch/riscv/include/asm/jump_label.h +++ b/arch/riscv/include/asm/jump_label.h @@ -12,6 +12,8 @@ #include #include =20 +#define HAVE_JUMP_LABEL_BATCH + #define JUMP_LABEL_NOP_SIZE 4 =20 static __always_inline bool arch_static_branch(struct static_key * const k= ey, diff --git a/arch/riscv/include/asm/patch.h b/arch/riscv/include/asm/patch.h index e88b52d39eac..9f5d6e14c405 100644 --- a/arch/riscv/include/asm/patch.h +++ b/arch/riscv/include/asm/patch.h @@ -6,6 +6,7 @@ #ifndef _ASM_RISCV_PATCH_H #define _ASM_RISCV_PATCH_H =20 +int patch_insn_write(void *addr, const void *insn, size_t len); int patch_text_nosync(void *addr, const void *insns, size_t len); int patch_text_set_nosync(void *addr, u8 c, size_t len); int patch_text(void *addr, u32 *insns, int ninsns); diff --git a/arch/riscv/kernel/jump_label.c b/arch/riscv/kernel/jump_label.c index e6694759dbd0..11ad789c60c6 100644 --- a/arch/riscv/kernel/jump_label.c +++ b/arch/riscv/kernel/jump_label.c @@ -9,13 +9,14 @@ #include #include #include +#include #include =20 #define RISCV_INSN_NOP 0x00000013U #define RISCV_INSN_JAL 0x0000006fU =20 -void arch_jump_label_transform(struct jump_entry *entry, - enum jump_label_type type) +bool arch_jump_label_transform_queue(struct jump_entry *entry, + enum jump_label_type type) { void *addr =3D (void *)jump_entry_code(entry); u32 insn; @@ -24,7 +25,7 @@ void arch_jump_label_transform(struct jump_entry *entry, long offset =3D jump_entry_target(entry) - jump_entry_code(entry); =20 if (WARN_ON(offset & 1 || offset < -524288 || offset >=3D 524288)) - return; + return true; =20 insn =3D RISCV_INSN_JAL | (((u32)offset & GENMASK(19, 12)) << (12 - 12)) | @@ -36,6 +37,13 @@ void arch_jump_label_transform(struct jump_entry *entry, } =20 mutex_lock(&text_mutex); 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charset="utf-8" The idiomatic way to write "jal zero" is "j". Signed-off-by: Samuel Holland Reviewed-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/include/asm/jump_label.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/jump_label.h b/arch/riscv/include/asm/j= ump_label.h index 6290b26f4a14..1c768d02bd0c 100644 --- a/arch/riscv/include/asm/jump_label.h +++ b/arch/riscv/include/asm/jump_label.h @@ -46,7 +46,7 @@ static __always_inline bool arch_static_branch_jump(struc= t static_key * const ke " .option push \n\t" " .option norelax \n\t" " .option norvc \n\t" - "1: jal zero, %l[label] \n\t" + "1: j %l[label] \n\t" " .option pop \n\t" " .pushsection __jump_table, \"aw\" \n\t" " .align " RISCV_LGPTR " \n\t" --=20 2.43.0 From nobody Sun Feb 8 19:43:41 2026 Received: from mail-pl1-f173.google.com (mail-pl1-f173.google.com [209.85.214.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5BC6279F9 for ; Mon, 12 Feb 2024 02:55:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" These instructions are not yet visible to the rest of the system, so there is no need to do the whole stop_machine() dance. Signed-off-by: Samuel Holland Reviewed-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/kernel/probes/kprobes.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/= kprobes.c index 2f08c14a933d..cbf8197072bf 100644 --- a/arch/riscv/kernel/probes/kprobes.c +++ b/arch/riscv/kernel/probes/kprobes.c @@ -28,9 +28,9 @@ static void __kprobes arch_prepare_ss_slot(struct kprobe = *p) =20 p->ainsn.api.restore =3D (unsigned long)p->addr + offset; =20 - patch_text(p->ainsn.api.insn, &p->opcode, 1); - patch_text((void *)((unsigned long)(p->ainsn.api.insn) + offset), - &insn, 1); + patch_text_nosync(p->ainsn.api.insn, &p->opcode, 1); + patch_text_nosync(p->ainsn.api.insn + offset, + &insn, 1); } =20 static void __kprobes arch_prepare_simulate(struct kprobe *p) --=20 2.43.0 From nobody Sun Feb 8 19:43:41 2026 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E6D48C1D for ; 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charset="utf-8" This reduces the number of variables and makes the code easier to parse. Signed-off-by: Samuel Holland --- arch/riscv/kernel/patch.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/riscv/kernel/patch.c b/arch/riscv/kernel/patch.c index bccd9ed04a05..7f030b46eae5 100644 --- a/arch/riscv/kernel/patch.c +++ b/arch/riscv/kernel/patch.c @@ -155,7 +155,6 @@ NOKPROBE_SYMBOL(__patch_insn_write); =20 static int patch_insn_set(void *addr, u8 c, size_t len) { - size_t patched =3D 0; size_t size; int ret =3D 0; =20 @@ -163,11 +162,12 @@ static int patch_insn_set(void *addr, u8 c, size_t le= n) * __patch_insn_set() can only work on 2 pages at a time so call it in a * loop with len <=3D 2 * PAGE_SIZE. */ - while (patched < len && !ret) { - size =3D min_t(size_t, PAGE_SIZE * 2 - offset_in_page(addr + patched), l= en - patched); - ret =3D __patch_insn_set(addr + patched, c, size); + while (len && !ret) { + size =3D min_t(size_t, PAGE_SIZE * 2 - offset_in_page(addr), len); + ret =3D __patch_insn_set(addr, c, size); =20 - patched +=3D size; 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charset="utf-8" patch_text_nosync() already handles an arbitrary length of code, so this removes a superfluous loop and reduces the number of icache flushes. Signed-off-by: Samuel Holland Reviewed-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/include/asm/patch.h | 2 +- arch/riscv/kernel/patch.c | 15 +++++---------- arch/riscv/kernel/probes/kprobes.c | 20 +++++++++++--------- arch/riscv/net/bpf_jit_comp64.c | 7 ++++--- 4 files changed, 21 insertions(+), 23 deletions(-) diff --git a/arch/riscv/include/asm/patch.h b/arch/riscv/include/asm/patch.h index 9f5d6e14c405..7228e266b9a1 100644 --- a/arch/riscv/include/asm/patch.h +++ b/arch/riscv/include/asm/patch.h @@ -9,7 +9,7 @@ int patch_insn_write(void *addr, const void *insn, size_t len); int patch_text_nosync(void *addr, const void *insns, size_t len); int patch_text_set_nosync(void *addr, u8 c, size_t len); -int patch_text(void *addr, u32 *insns, int ninsns); +int patch_text(void *addr, u32 *insns, size_t len); =20 extern int riscv_patch_in_stop_machine; =20 diff --git a/arch/riscv/kernel/patch.c b/arch/riscv/kernel/patch.c index 7f030b46eae5..9aa0050225c0 100644 --- a/arch/riscv/kernel/patch.c +++ b/arch/riscv/kernel/patch.c @@ -19,7 +19,7 @@ struct patch_insn { void *addr; u32 *insns; - int ninsns; + size_t len; atomic_t cpu_count; }; =20 @@ -227,15 +227,10 @@ NOKPROBE_SYMBOL(patch_text_nosync); static int patch_text_cb(void *data) { struct patch_insn *patch =3D data; - unsigned long len; - int i, ret =3D 0; + int ret =3D 0; =20 if (atomic_inc_return(&patch->cpu_count) =3D=3D num_online_cpus()) { - for (i =3D 0; ret =3D=3D 0 && i < patch->ninsns; i++) { - len =3D GET_INSN_LENGTH(patch->insns[i]); - ret =3D patch_text_nosync(patch->addr + i * len, - &patch->insns[i], len); - } + ret =3D patch_text_nosync(patch->addr, patch->insns, patch->len); atomic_inc(&patch->cpu_count); } else { while (atomic_read(&patch->cpu_count) <=3D num_online_cpus()) @@ -247,13 +242,13 @@ static int patch_text_cb(void *data) } NOKPROBE_SYMBOL(patch_text_cb); =20 -int patch_text(void *addr, u32 *insns, int ninsns) +int patch_text(void *addr, u32 *insns, size_t len) { int ret; struct patch_insn patch =3D { .addr =3D addr, .insns =3D insns, - .ninsns =3D ninsns, + .len =3D len, .cpu_count =3D ATOMIC_INIT(0), }; =20 diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/= kprobes.c index cbf8197072bf..a64461fa715c 100644 --- a/arch/riscv/kernel/probes/kprobes.c +++ b/arch/riscv/kernel/probes/kprobes.c @@ -23,14 +23,14 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlb= lk *, struct pt_regs *); =20 static void __kprobes arch_prepare_ss_slot(struct kprobe *p) { + size_t len =3D GET_INSN_LENGTH(p->opcode); u32 insn =3D __BUG_INSN_32; - unsigned long offset =3D GET_INSN_LENGTH(p->opcode); =20 - p->ainsn.api.restore =3D (unsigned long)p->addr + offset; + p->ainsn.api.restore =3D (unsigned long)p->addr + len; =20 - patch_text_nosync(p->ainsn.api.insn, &p->opcode, 1); - patch_text_nosync(p->ainsn.api.insn + offset, - &insn, 1); + patch_text_nosync(p->ainsn.api.insn, &p->opcode, len); + patch_text_nosync(p->ainsn.api.insn + len, + &insn, GET_INSN_LENGTH(insn)); } =20 static void __kprobes arch_prepare_simulate(struct kprobe *p) @@ -117,16 +117,18 @@ void *alloc_insn_page(void) /* install breakpoint in text */ void __kprobes arch_arm_kprobe(struct kprobe *p) { - u32 insn =3D (p->opcode & __INSN_LENGTH_MASK) =3D=3D __INSN_LENGTH_32 ? - __BUG_INSN_32 : __BUG_INSN_16; + size_t len =3D GET_INSN_LENGTH(p->opcode); + u32 insn =3D len =3D=3D 4 ? __BUG_INSN_32 : __BUG_INSN_16; =20 - patch_text(p->addr, &insn, 1); + patch_text(p->addr, &insn, len); } =20 /* remove breakpoint from text */ void __kprobes arch_disarm_kprobe(struct kprobe *p) { - patch_text(p->addr, &p->opcode, 1); + size_t len =3D GET_INSN_LENGTH(p->opcode); + + patch_text(p->addr, &p->opcode, len); } =20 void __kprobes arch_remove_kprobe(struct kprobe *p) diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp6= 4.c index 719a97e7edb2..43be2585f0d4 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -14,6 +14,7 @@ #include "bpf_jit.h" =20 #define RV_FENTRY_NINSNS 2 +#define RV_FENTRY_NBYTES (RV_FENTRY_NINSNS * 4) =20 #define RV_REG_TCC RV_REG_A6 #define RV_REG_TCC_SAVED RV_REG_S6 /* Store A6 in S6 if program do calls */ @@ -681,7 +682,7 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_typ= e poke_type, if (ret) return ret; =20 - if (memcmp(ip, old_insns, RV_FENTRY_NINSNS * 4)) + if (memcmp(ip, old_insns, RV_FENTRY_NBYTES)) return -EFAULT; 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Sun, 11 Feb 2024 18:55:36 -0800 (PST) From: Samuel Holland To: Palmer Dabbelt Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland Subject: [PATCH 6/7] riscv: Use offset_in_page() in text patching functions Date: Sun, 11 Feb 2024 18:55:17 -0800 Message-ID: <20240212025529.1971876-7-samuel.holland@sifive.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240212025529.1971876-1-samuel.holland@sifive.com> References: <20240212025529.1971876-1-samuel.holland@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This is a bit easier to parse than the equivalent bit manipulation. Signed-off-by: Samuel Holland Reviewed-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/kernel/patch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/patch.c b/arch/riscv/kernel/patch.c index 9aa0050225c0..b0cf050738aa 100644 --- a/arch/riscv/kernel/patch.c +++ b/arch/riscv/kernel/patch.c @@ -54,7 +54,7 @@ static __always_inline void *patch_map(void *addr, const = unsigned int fixmap) BUG_ON(!page); =20 return (void *)set_fixmap_offset(fixmap, page_to_phys(page) + - (uintaddr & ~PAGE_MASK)); + offset_in_page(addr)); } =20 static void patch_unmap(int fixmap) @@ -65,8 +65,8 @@ NOKPROBE_SYMBOL(patch_unmap); =20 static int __patch_insn_set(void *addr, u8 c, size_t len) { + bool across_pages =3D (offset_in_page(addr) + len) > PAGE_SIZE; void *waddr =3D addr; - bool across_pages =3D (((uintptr_t)addr & ~PAGE_MASK) + len) > PAGE_SIZE; =20 /* * Only two pages can be mapped at a time for writing. @@ -98,8 +98,8 @@ NOKPROBE_SYMBOL(__patch_insn_set); =20 static int __patch_insn_write(void *addr, const void *insn, size_t len) { + bool across_pages =3D (offset_in_page(addr) + len) > PAGE_SIZE; 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charset="utf-8" This cast is superfluous, and is incorrect anyway if compressed instructions may be present. Signed-off-by: Samuel Holland Reviewed-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/kernel/patch.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/riscv/kernel/patch.c b/arch/riscv/kernel/patch.c index b0cf050738aa..80755aa627d2 100644 --- a/arch/riscv/kernel/patch.c +++ b/arch/riscv/kernel/patch.c @@ -176,13 +176,11 @@ NOKPROBE_SYMBOL(patch_insn_set); =20 int patch_text_set_nosync(void *addr, u8 c, size_t len) { - u32 *tp =3D addr; int ret; =20 - ret =3D patch_insn_set(tp, c, len); - + ret =3D patch_insn_set(addr, c, len); if (!ret) - flush_icache_range((uintptr_t)tp, (uintptr_t)tp + len); + flush_icache_range((uintptr_t)addr, (uintptr_t)addr + len); =20 return ret; } @@ -212,13 +210,11 @@ NOKPROBE_SYMBOL(patch_insn_write); =20 int patch_text_nosync(void *addr, const void *insns, size_t len) { - u32 *tp =3D addr; int ret; =20 - ret =3D patch_insn_write(tp, insns, len); - + ret =3D patch_insn_write(addr, insns, len); if (!ret) - flush_icache_range((uintptr_t) tp, (uintptr_t) tp + len); + flush_icache_range((uintptr_t)addr, (uintptr_t)addr + len); =20 return ret; } --=20 2.43.0