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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240212-realtek-fix_ext0-v1-1-f3d2536d191a@gmail.com> X-B4-Tracking: v=1; b=H4sIAOiOymUC/x2MUQqDQAwFryL5NrBGqaVXKSKhPtvQspbdpQiLd zf0c3jzplJGMmS6NZUSfpZtiw5d29DjpfEJtsWZJMgQpBNO0E/Bm1fbZ+wl8DUMqr2MouOF/PZ N8O2fvFNE4egaTcdxAi9GubJsAAAA To: Linus Walleij , =?utf-8?q?Alvin_=C5=A0ipraga?= , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Luiz Angelo Daros de Luca X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1468; i=luizluca@gmail.com; h=from:subject:message-id; bh=MEChIYkvQHqxWqS/fjWdPqFHkAIj3ZLNWN4rsNfct7g=; b=owEBbQGS/pANAwAIAbsR27rRBztWAcsmYgBlyo7znpm3TMVYV+rMp8H5VWOfgNuidW22MQpAi ZRKysK4idqJATMEAAEIAB0WIQQRByhHhc1bOhL6L/i7Edu60Qc7VgUCZcqO8wAKCRC7Edu60Qc7 Vru+B/4gjK3xAOWMDgfjdQGY0I6pSnDf1ElWlwq2ppFwBs1+++JCKGj6gpyH4hXwWqU5+klLR/U rlUyz8sRFrcCbk2TZx+fMsZMlTpwZrTE/5rH1neV38lV+XuNs0SWYZBPLmvGw8IfhB51P48pHCG CMDBn7o2HLUAP5PUSah4BgVfQua9zvaCDrlec7RwG/Uy1+91/VwzBhxB1Ee8devv8HiD8iJNEHu XEn36Sr4KCo5nz/M166byb+wH9XiN52HrWibnN+jEoZ5kN4qyJL2DSAD1czp1RhE0lAwsvMp0xL KAhwlav3K8aQOI3AssJJaaoRHTCWZuluJ9PXlt+FsU0CBaTq X-Developer-Key: i=luizluca@gmail.com; a=openpgp; fpr=1107284785CD5B3A12FA2FF8BB11DBBAD1073B56 While no supported devices currently utilize EXT0, the register reserves the bits for an EXT0. EXT0 is utilized by devices from the generation prior to rtl8365mb, such as those supported by the driver library rtl8367b. Signed-off-by: Luiz Angelo Daros de Luca Reviewed-by: Alvin =C5=A0ipraga Reviewed-by: Linus Walleij --- drivers/net/dsa/realtek/rtl8365mb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/= rtl8365mb.c index be56373e9473..12665a8a3412 100644 --- a/drivers/net/dsa/realtek/rtl8365mb.c +++ b/drivers/net/dsa/realtek/rtl8365mb.c @@ -209,10 +209,10 @@ #define RTL8365MB_EXT_PORT_MODE_100FX 13 =20 /* External interface mode configuration registers 0~1 */ -#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 0x1305 /* EXT1 */ +#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 0x1305 /* EXT0,EXT1 */ #define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1 0x13C3 /* EXT2 */ #define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(_extint) \ - ((_extint) =3D=3D 1 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 : \ + ((_extint) <=3D 1 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 : \ (_extint) =3D=3D 2 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1 : \ 0x0) #define RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extint) \ --- base-commit: 0f37666d87d2dea42ec21776c3d562b7cbd71612 change-id: 20240212-realtek-fix_ext0-804aa3272a76 Best regards, --=20 Luiz Angelo Daros de Luca