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charset="utf-8" The imx8mp-beacon SOM has an integrated PHY connected to the EQOS ethernet controller which can support up to five queues. Configure these queues in the same manor as done on the imx8mp-evk. Signed-off-by: Adam Ford diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi b/arch/ar= m64/boot/dts/freescale/imx8mp-beacon-som.dtsi index 2ec282b91c42..8be251b69378 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi @@ -50,6 +50,8 @@ &eqos { phy-mode =3D "rgmii-id"; phy-handle =3D <ðphy0>; snps,force_thresh_dma_mode; + snps,mtl-rx-config =3D <&mtl_rx_setup>; + snps,mtl-tx-config =3D <&mtl_tx_setup>; status =3D "okay"; =20 mdio { @@ -66,6 +68,71 @@ ethphy0: ethernet-phy@3 { interrupts =3D <10 IRQ_TYPE_LEVEL_LOW>; }; }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use =3D <5>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + snps,map-to-dma-channel =3D <0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + snps,map-to-dma-channel =3D <1>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + snps,map-to-dma-channel =3D <2>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + snps,map-to-dma-channel =3D <3>; + }; + + queue4 { + snps,dcb-algorithm; + snps,priority =3D <0xf0>; + snps,map-to-dma-channel =3D <4>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use =3D <5>; + snps,tx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,priority =3D <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,priority =3D <0x2>; + }; + + queue2 { + snps,dcb-algorithm; + snps,priority =3D <0x4>; + }; + + queue3 { + snps,dcb-algorithm; + snps,priority =3D <0x8>; + }; + + queue4 { + snps,dcb-algorithm; + snps,priority =3D <0xf0>; + }; + }; }; =20 &flexspi { --=20 2.43.0