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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net-next v3] net: ethernet: mtk_eth_soc: ppe: add support for multiple PPEs Date: Sat, 10 Feb 2024 15:56:07 +0200 Message-ID: <20240210135620.28368-1-eladwf@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the missing pieces to allow multiple PPEs units, one for each GMAC. mtk_gdm_config has been modified to work on targted mac ID, the inner loop moved outside of the function to allow unrelated operations like setting the MAC's PPE index. Signed-off-by: Elad Yifee --- v3: applied changes suggested by Daniel Golle v2: fixed CI warnings --- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 86 +++++++++++-------- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 15 +++- .../net/ethernet/mediatek/mtk_ppe_offload.c | 6 +- 3 files changed, 68 insertions(+), 39 deletions(-) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethe= rnet/mediatek/mtk_eth_soc.c index a6e91573f8da..5d5cf73a5d5a 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -2010,6 +2010,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int = budget, struct mtk_rx_dma_v2 *rxd, trxd; int done =3D 0, bytes =3D 0; dma_addr_t dma_addr =3D DMA_MAPPING_ERROR; + u8 ppe_index =3D 0; =20 while (done < budget) { unsigned int pktlen, *rxdcsum; @@ -2053,6 +2054,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int = budget, goto release_desc; =20 netdev =3D eth->netdev[mac]; + ppe_index =3D eth->mac[mac]->ppe_idx; =20 if (unlikely(test_bit(MTK_RESETTING, ð->state))) goto release_desc; @@ -2176,7 +2178,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int = budget, } =20 if (reason =3D=3D MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) - mtk_ppe_check_skb(eth->ppe[0], skb, hash); + mtk_ppe_check_skb(eth->ppe[ppe_index], skb, hash); =20 skb_record_rx_queue(skb, 0); napi_gro_receive(napi, skb); @@ -3267,37 +3269,27 @@ static int mtk_start_dma(struct mtk_eth *eth) return 0; } =20 -static void mtk_gdm_config(struct mtk_eth *eth, u32 config) +static void mtk_gdm_config(struct mtk_eth *eth, u32 id, u32 config) { - int i; + u32 val; =20 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) return; =20 - for (i =3D 0; i < MTK_MAX_DEVS; i++) { - u32 val; - - if (!eth->netdev[i]) - continue; - - val =3D mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); + val =3D mtk_r32(eth, MTK_GDMA_FWD_CFG(id)); =20 - /* default setup the forward port to send frame to PDMA */ - val &=3D ~0xffff; + /* default setup the forward port to send frame to PDMA */ + val &=3D ~0xffff; =20 - /* Enable RX checksum */ - val |=3D MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN; + /* Enable RX checksum */ + val |=3D MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN; =20 - val |=3D config; + val |=3D config; =20 - if (netdev_uses_dsa(eth->netdev[i])) - val |=3D MTK_GDMA_SPECIAL_TAG; + if (eth->netdev[id] && netdev_uses_dsa(eth->netdev[id])) + val |=3D MTK_GDMA_SPECIAL_TAG; =20 - mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i)); - } - /* Reset and enable PSE */ - mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); - mtk_w32(eth, 0, MTK_RST_GL); + mtk_w32(eth, val, MTK_GDMA_FWD_CFG(id)); } =20 =20 @@ -3358,6 +3350,8 @@ static int mtk_open(struct net_device *dev) struct mtk_mac *mac =3D netdev_priv(dev); struct mtk_eth *eth =3D mac->hw; int i, err; + struct mtk_mac *target_mac; + const u8 ppe_num =3D mtk_get_ppe_num(eth); =20 err =3D phylink_of_phy_connect(mac->phylink, mac->of_node, 0); if (err) { @@ -3381,18 +3375,38 @@ static int mtk_open(struct net_device *dev) for (i =3D 0; i < ARRAY_SIZE(eth->ppe); i++) mtk_ppe_start(eth->ppe[i]); =20 - gdm_config =3D soc->offload_version ? soc->reg_map->gdma_to_ppe - : MTK_GDMA_TO_PDMA; - mtk_gdm_config(eth, gdm_config); + for (i =3D 0; i < MTK_MAX_DEVS; i++) { + if (!eth->netdev[i]) + break; + + target_mac =3D netdev_priv(eth->netdev[i]); + if (!soc->offload_version) { + target_mac->ppe_idx =3D 0; + gdm_config =3D MTK_GDMA_TO_PDMA; + } else if (ppe_num >=3D 3 && target_mac->id =3D=3D 2) { + target_mac->ppe_idx =3D 2; + gdm_config =3D MTK_GDMA_TO_PPE2; + } else if (ppe_num >=3D 2 && target_mac->id =3D=3D 1) { + target_mac->ppe_idx =3D 1; + gdm_config =3D MTK_GDMA_TO_PPE1; + } else { + target_mac->ppe_idx =3D 0; + gdm_config =3D soc->reg_map->gdma_to_ppe; + } + mtk_gdm_config(eth, target_mac->id, gdm_config); + } + /* Reset and enable PSE */ + mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); + mtk_w32(eth, 0, MTK_RST_GL); =20 napi_enable(ð->tx_napi); napi_enable(ð->rx_napi); mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); mtk_rx_irq_enable(eth, soc->txrx.rx_irq_done_mask); refcount_set(ð->dma_refcnt, 1); - } - else + } else { refcount_inc(ð->dma_refcnt); + } =20 phylink_start(mac->phylink); netif_tx_start_all_queues(dev); @@ -3469,7 +3483,8 @@ static int mtk_stop(struct net_device *dev) if (!refcount_dec_and_test(ð->dma_refcnt)) return 0; =20 - mtk_gdm_config(eth, MTK_GDMA_DROP_ALL); + for (i =3D 0; i < MTK_MAX_DEVS; i++) + mtk_gdm_config(eth, i, MTK_GDMA_DROP_ALL); =20 mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); mtk_rx_irq_disable(eth, eth->soc->txrx.rx_irq_done_mask); @@ -4945,23 +4960,24 @@ static int mtk_probe(struct platform_device *pdev) } =20 if (eth->soc->offload_version) { - u32 num_ppe =3D mtk_is_netsys_v2_or_greater(eth) ? 2 : 1; + u8 num_ppe =3D mtk_get_ppe_num(eth); =20 - num_ppe =3D min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe); + num_ppe =3D min_t(u8, ARRAY_SIZE(eth->ppe), num_ppe); for (i =3D 0; i < num_ppe; i++) { - u32 ppe_addr =3D eth->soc->reg_map->ppe_base + i * 0x400; + u32 ppe_addr =3D eth->soc->reg_map->ppe_base; =20 + ppe_addr +=3D (i =3D=3D 2 ? 0xc00 : i * 0x400); eth->ppe[i] =3D mtk_ppe_init(eth, eth->base + ppe_addr, i); =20 if (!eth->ppe[i]) { err =3D -ENOMEM; goto err_deinit_ppe; } - } + err =3D mtk_eth_offload_init(eth, i); =20 - err =3D mtk_eth_offload_init(eth); - if (err) - goto err_deinit_ppe; + if (err) + goto err_deinit_ppe; + } } =20 for (i =3D 0; i < MTK_MAX_DEVS; i++) { diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethe= rnet/mediatek/mtk_eth_soc.h index 9ae3b8a71d0e..9ff0d6951688 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -124,6 +124,8 @@ #define MTK_GDMA_UCS_EN BIT(20) #define MTK_GDMA_STRP_CRC BIT(16) #define MTK_GDMA_TO_PDMA 0x0 +#define MTK_GDMA_TO_PPE1 0x4444 +#define MTK_GDMA_TO_PPE2 0xcccc #define MTK_GDMA_DROP_ALL 0x7777 =20 /* GDM Egress Control Register */ @@ -1286,7 +1288,7 @@ struct mtk_eth { =20 struct metadata_dst *dsa_meta[MTK_MAX_DSA_PORTS]; =20 - struct mtk_ppe *ppe[2]; + struct mtk_ppe *ppe[3]; struct rhashtable flow_table; =20 struct bpf_prog __rcu *prog; @@ -1311,6 +1313,7 @@ struct mtk_eth { struct mtk_mac { int id; phy_interface_t interface; + u8 ppe_idx; int speed; struct device_node *of_node; struct phylink *phylink; @@ -1421,6 +1424,14 @@ static inline u32 mtk_get_ib2_multicast_mask(struct = mtk_eth *eth) return MTK_FOE_IB2_MULTICAST; } =20 +static inline u8 mtk_get_ppe_num(struct mtk_eth *eth) +{ + if (!eth->soc->offload_version) + return 0; + + return eth->soc->version; +} + /* read the hardware status register */ void mtk_stats_update_mac(struct mtk_mac *mac); =20 @@ -1432,7 +1443,7 @@ int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, in= t mac_id); int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id); int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id); =20 -int mtk_eth_offload_init(struct mtk_eth *eth); +int mtk_eth_offload_init(struct mtk_eth *eth, u8 id); int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data); int mtk_flow_offload_cmd(struct mtk_eth *eth, struct flow_cls_offload *cls, diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c b/drivers/net/= ethernet/mediatek/mtk_ppe_offload.c index fbb5e9d5af13..1079c20bc049 100644 --- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c @@ -570,7 +570,7 @@ mtk_eth_setup_tc_block_cb(enum tc_setup_type type, void= *type_data, void *cb_pri if (type !=3D TC_SETUP_CLSFLOWER) return -EOPNOTSUPP; =20 - return mtk_flow_offload_cmd(eth, cls, 0); + return mtk_flow_offload_cmd(eth, cls, mac->ppe_idx); } =20 static int @@ -633,7 +633,9 @@ int mtk_eth_setup_tc(struct net_device *dev, enum tc_se= tup_type type, } } =20 -int mtk_eth_offload_init(struct mtk_eth *eth) +int mtk_eth_offload_init(struct mtk_eth *eth, u8 id) { + if (!eth->ppe[id] || !eth->ppe[id]->foe_table) + return 0; return rhashtable_init(ð->flow_table, &mtk_flow_ht_params); } --=20 2.43.0