From nobody Mon Feb 9 06:19:12 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6EFF7AE62; Thu, 8 Feb 2024 13:52:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707400341; cv=none; b=K5DLiD2VFKXIopCboQ89suN7bRTkkMzC9Pby9Jw50uCpG8tKLp4/qJnioa3E8ZPI3E33BGems7kLCdypMlpxX9jrn0TdPltSBLuOG1PjNeHtphis/o7EbVsDtD3m18F7dlvO/56oV3Lh4FxuruOMWMOqCoc7hqG9lNGu9Cg1PqU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707400341; c=relaxed/simple; bh=9J6hs2cF1PTZz9x7RaAYnxiP2LNQddxpTIQiNApPAzw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VpgQqV869AAt4FDrDZ1ZoYXoKVi/VaViMwRW1dQhgyBd1Czvvp9cczSYYRrDj9Qv+PY/EoiMxZCjOgjvu0sE8P0laxOl0TwtW7jTw1sb7jkLHKmZ6+HGzc272+cuY1r6HTNTQoRFkcG0YkRDpfLTA7bTTlq4UsYsf4F1AtB2eJA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tvjRVa/P; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tvjRVa/P" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DBA9FC43399; Thu, 8 Feb 2024 13:52:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707400341; bh=9J6hs2cF1PTZz9x7RaAYnxiP2LNQddxpTIQiNApPAzw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=tvjRVa/PV7O+xZRYX3k77JzS4rQtYx1qcnz1SquOWtrdDOdoWrSMZnxWRRmRMO92d tuDUeDvg2nDV0ioQAjScNmCFqhzx7iA6GETU8+au7IdV1FxuVGUqndT8NlDf2lzjkL WrAa//27OIFu1wFmNzsQV5xG7B+W0oadKogZDDLUehEYEZusEVbwxtNTXqz7B2RTU+ 8/i5hudJ+PEWDFBId0YHeuqUNqOw82986NW6LFerQkxWjNcdKs8m9WEajPCY6oUJml vCzGoMogf3G6LzeAjqXPW9Rb7MPU4ypfBbz9oN30dIBBgIEZYKQ2qfWnDSEqiMuRL6 EdJ2HnVhRwLdw== From: Roger Quadros Date: Thu, 08 Feb 2024 15:51:43 +0200 Subject: [PATCH v2 1/3] arm64: dts: ti: am65x: Fix dtbs_install for Rocktech OLDI overlay Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240208-for-v6-9-am65-overlays-2-0-v2-1-70bae3e91597@kernel.org> References: <20240208-for-v6-9-am65-overlays-2-0-v2-0-70bae3e91597@kernel.org> In-Reply-To: <20240208-for-v6-9-am65-overlays-2-0-v2-0-70bae3e91597@kernel.org> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andrew Davis , Tomi Valkeinen , Aradhya Bhatia , Nikhil Devshatwar , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros , srk@ti.com, r-gunasekaran@ti.com X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1031; i=rogerq@kernel.org; h=from:subject:message-id; bh=9J6hs2cF1PTZz9x7RaAYnxiP2LNQddxpTIQiNApPAzw=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBlxNyMI3N0hea6elrgcUCo2pgDgfkaWLgL3RVur w3OdJDZwKmJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZcTcjAAKCRDSWmvTvnYw k1ByD/9cXF5sSs+pVNvHL9HwYu3v8oeNmVN4sPOuWVzaiX3+6RsNGqgggmbrl9Dqg2mXm6KsKup oj+xl+Yrb/ls+EzbvJYoRkNdwsUoPsVCqD+KyhbAvx7Nt/d+Uv+8xOow0nEHNxS9Wa8iklIEmCP mONFEnmo/mT4SXFjU+pTjYUU9KpKBWb2iHzl7fqbyu3FkCsl39AKzOv3c8BagSKSmmd5jjmbHpF MT9y0GyIZDDyiBbeKCS6qrge74IkaK1Ems4dgARv49QQTwVSlyuNRs7BIeHUU50U0pkFvl1EZiM /Hv0b/Jgqjh2zlWfdTe8Lq6/b+L6KYVnPnw6rsnmLKFsE6Gm7TGKXvcMu315hv8mLOVOTw4WtYT UE4XHHfxpPDFQqszcFBW12+tWx0S+9vth1hcIyLLERZQdhWyB1mtyZ2FhhDmZNECOdI9GmwP3dp xerVNimL5m3sPnmnRw9lFNimG5trQTffqiaysFByc9yati5/W3tKZfbIED85LOQ5NUgDRM2CcP3 rE8qMx6MHH46EVuPaqAj9QHKrPNPfXaELO8k6pDsn9GtRd6CHf5jSSGYSnoGwzP8hZ/HoqEhRK7 F7cS3HaWd+50tESVoKW5xSurspnGzPNQXvVXVH6MCre5wPLmQ+fGVj2/OH40Um2OlmTdVvbU4oe q5bZjQrFudlqWBg== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Add the overlay dtbo file to a Makefile target so it can be picked by the dtbs_install command. Fixes: b8690ed3d1d1 ("arm64: dts: ti: am65x: Add Rocktech OLDI panel DT ove= rlay") Signed-off-by: Roger Quadros Reviewed-by: Aradhya Bhatia --- Changelog: v2: no change v1: https://lore.kernel.org/all/20240126114530.40913-2-rogerq@kernel.org/ --- arch/arm64/boot/dts/ti/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index 4a570dffb638..bfcc86ff8e24 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-base-board.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-gp-evm.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-evm.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-idk.dtb +dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-base-board-rocktech-rk101-panel.dtbo =20 # Boards with J7200 SoC k3-j7200-evm-dtbs :=3D k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-po= rt-eth-exp.dtbo --=20 2.34.1 From nobody Mon Feb 9 06:19:12 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 263D37AE56; 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a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 From: Roger Quadros Enable both SERDES and PCIe DT nodes in order to get PCIe working on the SERDES PCIe x2 personality card. The daughter card also has a USB 2.0 dual-role port. As the base board already supports a 2.0 dual-role port, enable the port on the SERDES card to be a host only port. This will prevent user confusion as having 2 ports in device mode often leads to confusion as to which port is bound to the gadget function driver. The PCIe x2 card is provided with the AM65x IDK configuration [1] so apply the overlay to k3-am654-idk.dtb [1] https://www.ti.com/lit/ug/spruim6a/spruim6a.pdf Co-developed-by: Kishon Vijay Abraham I Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Roger Quadros --- Changelog: v2: - Drop PCIe endpoint settings as it no longer exists in base tree. v1: https://lore.kernel.org/all/20240126114530.40913-3-rogerq@kernel.org/ --- arch/arm64/boot/dts/ti/Makefile | 3 +- arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso | 59 ++++++++++++++++++++++= ++++ 2 files changed, 61 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index bfcc86ff8e24..f534c373c958 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -47,7 +47,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am64-tqma64xxl-mbax4xxl-wla= n.dtbo # Boards with AM65x SoC k3-am654-gp-evm-dtbs :=3D k3-am654-base-board.dtb k3-am654-base-board-rock= tech-rk101-panel.dtbo k3-am654-evm-dtbs :=3D k3-am654-base-board.dtb k3-am654-icssg2.dtbo -k3-am654-idk-dtbs :=3D k3-am654-evm.dtb k3-am654-idk.dtbo +k3-am654-idk-dtbs :=3D k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-us= b2.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am6528-iot2050-basic.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am6528-iot2050-basic-pg2.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am6548-iot2050-advanced.dtb @@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-gp-evm.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-evm.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-idk.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-base-board-rocktech-rk101-panel.dtbo +dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-pcie-usb2.dtbo =20 # Boards with J7200 SoC k3-j7200-evm-dtbs :=3D k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-po= rt-eth-exp.dtbo diff --git a/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso b/arch/arm64/bo= ot/dts/ti/k3-am654-pcie-usb2.dtso new file mode 100644 index 000000000000..dd701e0c1750 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT overlay for SERDES personality card: 2lane PCIe + USB2.0 Host on AM6= 54 EVM + * + * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti= .com/ + */ + +/dts-v1/; +/plugin/; +#include +#include +#include +#include "k3-pinctrl.h" + +&serdes0 { + assigned-clocks =3D <&k3_clks 153 4>, + <&serdes0 AM654_SERDES_CMU_REFCLK>, + <&serdes0 AM654_SERDES_RO_REFCLK>; + assigned-clock-parents =3D <&k3_clks 153 8>, + <&k3_clks 153 4>, + <&k3_clks 153 4>; + status =3D "okay"; +}; + +&serdes1 { + assigned-clocks =3D <&serdes1 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents =3D <&serdes0 AM654_SERDES_RO_REFCLK>; + status =3D "okay"; +}; + +&pcie0_rc { + num-lanes =3D <2>; + phys =3D <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>; + phy-names =3D "pcie-phy0", "pcie-phy1"; + reset-gpios =3D <&pca9555 5 GPIO_ACTIVE_HIGH>; + status =3D "okay"; +}; + +&main_pmx0 { + usb0_pins_default: usb0-pins-default { + pinctrl-single,pins =3D < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + }; +}; + +&dwc3_0 { + status =3D "okay"; +}; + +&usb0_phy { + status =3D "okay"; +}; + +&usb0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb0_pins_default>; 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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PLjiG6vV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PLjiG6vV" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 28A4AC43399; Thu, 8 Feb 2024 13:52:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707400349; bh=kYztuwBHKj80b91I8rCKfMS/3L636fHRS+pTX9G+Poc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PLjiG6vVM0s3p+fyOguNaTY5WlAKfZxfIpsNuncBhDt7LZOasVt8cHoQk7tYOJDms Jcbzwh11Hn8AEcf9gl3qOW0T0FglczA1D8pJkfSGI9rgfNkPiVLE0aEirCIaZQZSHV eKEgEcgfgg2uvLYB/pDUdzs+QbVdFJ7HIx0rQZzE1SY+r0itspBDaU3I3P0uzYjZ9D Oa/zMHYj17dNI3c59dxN2q2hHgwgRcwLVATEklo0NG37x6vClOsqyWe2OGNUd4OBVp u4FE0EpwHYCVbzqIFcnKY8vsgYvA/1uPoZTj8E18tCZhk7ytQGI6fqszQ5T2jVWLfw g8kZY4Xq+qvgQ== From: Roger Quadros Date: Thu, 08 Feb 2024 15:51:45 +0200 Subject: [PATCH v2 3/3] arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240208-for-v6-9-am65-overlays-2-0-v2-3-70bae3e91597@kernel.org> References: <20240208-for-v6-9-am65-overlays-2-0-v2-0-70bae3e91597@kernel.org> In-Reply-To: <20240208-for-v6-9-am65-overlays-2-0-v2-0-70bae3e91597@kernel.org> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andrew Davis , Tomi Valkeinen , Aradhya Bhatia , Nikhil Devshatwar , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros , srk@ti.com, r-gunasekaran@ti.com, Kishon Vijay Abraham I X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3697; i=rogerq@kernel.org; h=from:subject:message-id; bh=QXycpi9i6PTUYgnWc7XUT7n2X/NNWxiXbCqvtx5c3DI=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBlxNyNOGciqQDX2eC55qyEZqsPQY3lP/ckM0rjB ZnwpftmC1GJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZcTcjQAKCRDSWmvTvnYw kxgqD/9OMh55y/8CG9uEpPg4NQ2Xa4ZnVgCISNYgI6jzVxdmuO1yCTrfSBDVV7bJrTgNAOdd2Mo DV1peZ6MWhLmagQhOm1SfZARFeOYcNXtEi15Y662wtQdQxIDOQLWAYt+W7m40Jv5r3ZyXm3Qxfe 5/8z0VQcLXMWcQivshpAWF/dUGuypxlGjiWOCVwZbd+i+Q+2yLpIIw9rut17hrQD0XQybCg5PuW C4GfpmpebVGRuzFz8pzdL8d6fbPut935RZKlgF3af7JRDJjyHHFMBDBBPP9H8WU4YF6WugogIia EeSFqB13Kf8RDzuFYwZeTnhkaBT7NR2vIJR+0KFpOqoTB/ZUMBEP+5ZTcLKjWfvicOsUklqMIq9 f73UnzthNc1O3St/71eBdZtTqNhuD09xEdzLUKVyfqN8rcoHUTePyZ/+GyFObWprB9ZDiOAwiuv XGBOKJHBGjMSs8O/Y7Sdn0fFlD5BjWObTAA66e/vasSiYq5TVnDQH/vuiWgjJHb2jJfcw1SFLz7 7iQ2B8eSV2e0BBBrjjoQx5jDA2kjpOvrUzTB6RN+f3bf7EAlbJnM4RmGDIOGM4zRuh5Hu2TZsDO +DmU84NdtdqKT4/RGVkrViYNZdT95vf4izZ1wjMtezybht/TB4mNrpnd7QMemG8SIbNzKGXENhr 5azW5u176kcnjvQ== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 From: Kishon Vijay Abraham I Add overlay for PCIe (uses the second instance of PCIe in AM654x) and USB3.0 SERDES personality card The PCI3/USB3 card is provided with the AM65x GP EVM configurtion [1] so apply the overlay to k3-am654-gp-evm.dtb [1] https://www.ti.com/lit/ug/spruim7/spruim7.pdf Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Roger Quadros --- Changelog: v2: - drop PCIe endpoint settings as it no longer exists in base tree. v1: https://lore.kernel.org/all/20240126114530.40913-4-rogerq@kernel.org/ --- arch/arm64/boot/dts/ti/Makefile | 5 ++- arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso | 61 ++++++++++++++++++++++= ++++ 2 files changed, 65 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index f534c373c958..75033b6e8693 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -45,7 +45,9 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am64-tqma64xxl-mbax4xxl-sdc= ard.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo =20 # Boards with AM65x SoC -k3-am654-gp-evm-dtbs :=3D k3-am654-base-board.dtb k3-am654-base-board-rock= tech-rk101-panel.dtbo +k3-am654-gp-evm-dtbs :=3D k3-am654-base-board.dtb \ + k3-am654-base-board-rocktech-rk101-panel.dtbo \ + k3-am654-pcie-usb3.dtbo k3-am654-evm-dtbs :=3D k3-am654-base-board.dtb k3-am654-icssg2.dtbo k3-am654-idk-dtbs :=3D k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-us= b2.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am6528-iot2050-basic.dtb @@ -59,6 +61,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-evm.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-idk.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-base-board-rocktech-rk101-panel.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-pcie-usb2.dtbo +dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-pcie-usb3.dtbo =20 # Boards with J7200 SoC k3-j7200-evm-dtbs :=3D k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-po= rt-eth-exp.dtbo diff --git a/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso b/arch/arm64/bo= ot/dts/ti/k3-am654-pcie-usb3.dtso new file mode 100644 index 000000000000..e463163f2b7b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM65= 4 EVM + * + * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.= com/ + */ + +/dts-v1/; +/plugin/; +#include +#include +#include + +#include "k3-pinctrl.h" + +&serdes1 { + status =3D "okay"; +}; + +&pcie1_rc { + num-lanes =3D <1>; + phys =3D <&serdes1 PHY_TYPE_PCIE 0>; + phy-names =3D "pcie-phy0"; + reset-gpios =3D <&pca9555 5 GPIO_ACTIVE_HIGH>; + status =3D "okay"; +}; + +&main_pmx0 { + usb0_pins_default: usb0_pins_default { + pinctrl-single,pins =3D < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + }; +}; + +&serdes0 { + status =3D "okay"; + assigned-clocks =3D <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents =3D <&k3_clks 153 7>, <&k3_clks 153 4>; +}; + +&dwc3_0 { + status =3D "okay"; + assigned-clock-parents =3D <&k3_clks 151 4>, /* set REF_CLK to 20MHz= i.e. PER0_PLL/48 */ + <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ + phys =3D <&serdes0 PHY_TYPE_USB3 0>; + phy-names =3D "usb3-phy"; +}; + +&usb0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb0_pins_default>; + dr_mode =3D "host"; + maximum-speed =3D "super-speed"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; +}; + +&usb0_phy { + status =3D "okay"; +}; --=20 2.34.1