From nobody Sun Feb 8 02:56:05 2026 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4A24200B7; Wed, 7 Feb 2024 22:55:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346539; cv=none; b=A3iuUfVnIfmnlfbJ+6BViHGfZ195DPUOVLFpKM0NPk7FmX68U7OVj7uNvTfPvaZ4ZJTAj6rvHNCWOoev1MUoxkdGMKh0UhQwHiJZfry5cwXVLZIjAa+0W/tGoNW8DbAV1r7UxC/Bz8RgdYF/p9My/CwC7wfSXzfmyzC4wQ9OFR0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346539; c=relaxed/simple; bh=YOXmGuD6/jcIrqtJeIXapHB8zHPclkc7DkY1LKzLUgc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=G+A6tZBG6Zyvt/BQe0vuncD9P3TEJ8z0jQbQK4eDU8+dsRZF3O1tkL/EO5RfmJKeLW9hLPkVxqrsl6KWmkhQ4PLD8zNIEraVeYjXt7dS9sBi1jpWd9Eg8ZguK5kNJ05MYp4HRhmTpNWPswyD7BWwKJ8pQ8QErCzEius3rLKiGEw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=pNRfYOJ6; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="pNRfYOJ6" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 417MtRoq014812; Wed, 7 Feb 2024 16:55:27 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707346527; bh=f0ObBW14vGk6xzmyWDC9VW/YrN60QbE+TGAdLw92viY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pNRfYOJ6cYPPew15L6gGewdfrfoCmTH2ur7WgAlYpir4EuqkFepo0Rm/nhoVn5+E8 lpWJfsXlJVL/RPIprFFSVEvlfoD3zQ4xJ5V4i+pBUn9FPEe7ffdoHlQLf3hVzzAGEw DYkU1UINQnvOr2Lvn9n3LkDfd4ZHVbklFqrXAWS4= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 417MtRix082334 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Feb 2024 16:55:27 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 7 Feb 2024 16:55:26 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmU014027; Wed, 7 Feb 2024 16:55:26 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 1/9] arm64: dts: ti: k3-am62a-main: Add sdhci0 instance Date: Wed, 7 Feb 2024 16:55:18 -0600 Message-ID: <20240207225526.3953230-2-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" From: Nitin Yadav Add sdhci0 DT node in k3-am62a-main for eMMC support. Add otap/itap values according to the datasheet[0], refer to Table 7-79. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Nitin Yadav Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 972971159a62..ce5f278235a4 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -536,6 +536,24 @@ main_gpio1: gpio@601000 { status =3D "disabled"; }; =20 + sdhci0: mmc@fa10000 { + compatible =3D "ti,am62-sdhci"; + reg =3D <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; + interrupts =3D ; + power-domains =3D <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names =3D "clk_ahb", "clk_xin"; + assigned-clocks =3D <&k3_clks 57 6>; + assigned-clock-parents =3D <&k3_clks 57 8>; + bus-width =3D <8>; + mmc-hs200-1_8v; + ti,clkbuf-sel =3D <0x7>; + ti,otap-del-sel-legacy =3D <0x0>; + ti,otap-del-sel-mmc-hs =3D <0x0>; + ti,otap-del-sel-hs200 =3D <0x6>; + status =3D "disabled"; + }; + sdhci1: mmc@fa00000 { compatible =3D "ti,am62-sdhci"; reg =3D <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; --=20 2.43.0 From nobody Sun Feb 8 02:56:05 2026 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 622ED1CD3B; Wed, 7 Feb 2024 22:55:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346538; cv=none; b=AiVbS1MJ0hMPz1pgQ+ae8ZdBYvb1lbIXRv9SjUd4DZY5qB1FXDzYpZzBHu++1WA+He+g+Pva7Ubvyc5sbwGx8pevdLMNpFN04hWtd6i8KDPPV/dDnkKTNoeLNMOf0W+Z4tJyq3YA59sHPg8aekzxtYdS70ozy6G5/w/p7HufAbQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346538; c=relaxed/simple; bh=1k0cCcnPSIAEDeivS8TGmRqODSX3jEw9ruc/JVokoiQ=; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmV014027; Wed, 7 Feb 2024 16:55:26 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 2/9] arm64: dts: ti: k3-am62a-main: Add sdhci2 instance Date: Wed, 7 Feb 2024 16:55:19 -0600 Message-ID: <20240207225526.3953230-3-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Add sdhci2 DT node in k3-am62a-main for mmc2. Add otap/itap values according to the datasheet[0], Refer to Table 7-97. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index ce5f278235a4..6806288ec227 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -579,6 +579,30 @@ sdhci1: mmc@fa00000 { status =3D "disabled"; }; =20 + sdhci2: mmc@fa20000 { + compatible =3D "ti,am62-sdhci"; + reg =3D <0x00 0xfa20000 0x00 0x260>, <0x00 0xfa28000 0x00 0x134>; + interrupts =3D ; + power-domains =3D <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 184 5>, <&k3_clks 184 6>; + clock-names =3D "clk_ahb", "clk_xin"; + bus-width =3D <4>; + ti,clkbuf-sel =3D <0x7>; + ti,otap-del-sel-legacy =3D <0x0>; + ti,otap-del-sel-sd-hs =3D <0x0>; + ti,otap-del-sel-sdr12 =3D <0xf>; + ti,otap-del-sel-sdr25 =3D <0xf>; + ti,otap-del-sel-sdr50 =3D <0xc>; + ti,otap-del-sel-sdr104 =3D <0x6>; + ti,otap-del-sel-ddr50 =3D <0x9>; + ti,itap-del-sel-legacy =3D <0x0>; + ti,itap-del-sel-sd-hs =3D <0x0>; + ti,itap-del-sel-sdr12 =3D <0x0>; + ti,itap-del-sel-sdr25 =3D <0x0>; + no-1-8-v; + status =3D "disabled"; + }; + usbss0: dwc3-usb@f900000 { compatible =3D "ti,am62-usb"; reg =3D <0x00 0x0f900000 0x00 0x800>; --=20 2.43.0 From nobody Sun Feb 8 02:56:05 2026 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CAB520317; Wed, 7 Feb 2024 22:55:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346540; cv=none; b=ZePSG1zOxevwIFpSrinGHP/5+kmWsPVerb+r3rFy8nPJLIIXm3wD/W+CgXlQ/AVb7jnxF1glRLXmIaeprOoumoVgVwasoESXgrLy1PPcKHlYy+BlMNyxbcI1ojGaFCiLohPw6BMpS8fGFSw16fW/BRbvQJOSefUkTMoMqq9W2zs= ARC-Message-Signature: i=1; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmW014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 3/9] arm64: dts: ti: k3-am62a7-sk: Enable eMMC support Date: Wed, 7 Feb 2024 16:55:20 -0600 Message-ID: <20240207225526.3953230-4-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" From: Nitin Yadav Add support for 32GB eMMC card on AM62A7 SK. Includes adding mmc0 pins settings. Add mmc0 alias for sdhci0 in k3-am62a7-sk.dts. Signed-off-by: Nitin Yadav Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 26 +++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index f5ae91bf1bdb..c99b2e90f76d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -20,6 +20,7 @@ aliases { serial0 =3D &wkup_uart0; serial2 =3D &main_uart0; serial3 =3D &main_uart1; + mmc0 =3D &sdhci0; mmc1 =3D &sdhci1; }; =20 @@ -263,6 +264,22 @@ AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC= 0_CSn3.I2C2_SDA */ >; }; =20 + main_mmc0_pins_default: main-mmc0-default-pins { + pinctrl-single,pins =3D < + AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ + AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ + AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ + AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ + AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ + AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ + AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ + AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ + AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ + AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ + >; + }; + main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins =3D < AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ @@ -550,6 +567,15 @@ &main_i2c2 { clock-frequency =3D <400000>; }; =20 +&sdhci0 { + /* eMMC */ + status =3D "okay"; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_mmc0_pins_default>; + disable-wp; +}; + &sdhci1 { /* SD/MMC */ status =3D "okay"; --=20 2.43.0 From nobody Sun Feb 8 02:56:05 2026 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95FE1200DC; Wed, 7 Feb 2024 22:55:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346539; cv=none; b=JYZsuZJEw/vCGB0V2Og3sbBDJQ3ay2wxW3LF9dS60xvfLt1DQ+xVOQprThBjR8BbPtHQGLB+0cE/y0ahh8WEy5g9GKlKrGbTIr1pw3pFaQLFFvI3DJzQ5ooVEuIjTa7gQDztTCqyj4q3qqw9DEpZUFcd1f1WoAFjMD6EPru9gYQ= ARC-Message-Signature: i=1; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmX014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 4/9] arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMC Date: Wed, 7 Feb 2024 16:55:21 -0600 Message-ID: <20240207225526.3953230-5-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Update MMC0/MMC1 OTAP/ITAP values according to the datasheet [0], refer to Table 7-68 for MMC0 and Table 7-77 for MMC1. [0] https://www.ti.com/lit/ds/symlink/am6442.pdf Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC") Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index ddd382a0d735..9bfa0a969bfc 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -633,6 +633,9 @@ sdhci0: mmc@fa10000 { ti,otap-del-sel-mmc-hs =3D <0x0>; ti,otap-del-sel-ddr52 =3D <0x6>; ti,otap-del-sel-hs200 =3D <0x7>; + ti,itap-del-sel-legacy =3D <0x10>; + ti,itap-del-sel-mmc-hs =3D <0xa>; + ti,itap-del-sel-ddr52 =3D <0x3>; status =3D "disabled"; }; =20 @@ -645,12 +648,16 @@ sdhci1: mmc@fa00000 { clock-names =3D "clk_ahb", "clk_xin"; ti,trm-icp =3D <0x2>; ti,otap-del-sel-legacy =3D <0x0>; - ti,otap-del-sel-sd-hs =3D <0xf>; + ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0xf>; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmY014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 5/9] arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMC Date: Wed, 7 Feb 2024 16:55:22 -0600 Message-ID: <20240207225526.3953230-6-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Add OTAP/ITAP values to enable HS400 timing for MMC0 and SDR104 timing for MMC1/MMC2. Remove no-1-8-v property to enable the highest speed mode possible. Update MMC OTAP/ITAP values according to the datasheet [0], refer to Table 7-79 for MMC0 and Table 7-97 for MMC1/MMC2. [0] https://www.ti.com/lit/ds/symlink/am62p.pdf Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 44 +++++++++++++++++++++-- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 1 - 2 files changed, 41 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62p-main.dtsi index ef1c982a90d8..e43530beb79f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -534,7 +534,21 @@ sdhci0: mmc@fa10000 { clock-names =3D "clk_ahb", "clk_xin"; assigned-clocks =3D <&k3_clks 57 2>; assigned-clock-parents =3D <&k3_clks 57 4>; - ti,otap-del-sel-legacy =3D <0x0>; + bus-width =3D <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + ti,clkbuf-sel =3D <0x7>; + ti,strobe-sel =3D <0x77>; + ti,trm-icp =3D <0x8>; + ti,otap-del-sel-legacy =3D <0x1>; + ti,otap-del-sel-mmc-hs =3D <0x1>; + ti,otap-del-sel-ddr52 =3D <0x6>; + ti,otap-del-sel-hs200 =3D <0x8>; + ti,otap-del-sel-hs400 =3D <0x5>; + ti,itap-del-sel-legacy =3D <0x10>; + ti,itap-del-sel-mmc-hs =3D <0xa>; + ti,itap-del-sel-ddr52 =3D <0x3>; status =3D "disabled"; }; =20 @@ -545,7 +559,19 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; - ti,otap-del-sel-legacy =3D <0x8>; + bus-width =3D <4>; + ti,clkbuf-sel =3D <0x7>; + ti,otap-del-sel-legacy =3D <0x0>; + ti,otap-del-sel-sd-hs =3D <0x0>; + ti,otap-del-sel-sdr12 =3D <0xf>; + ti,otap-del-sel-sdr25 =3D <0xf>; + ti,otap-del-sel-sdr50 =3D <0xc>; + ti,otap-del-sel-ddr50 =3D <0x9>; + ti,otap-del-sel-sdr104 =3D <0x6>; + ti,itap-del-sel-legacy =3D <0x0>; + ti,itap-del-sel-sd-hs =3D <0x0>; + ti,itap-del-sel-sdr12 =3D <0x0>; + ti,itap-del-sel-sdr25 =3D <0x0>; status =3D "disabled"; }; =20 @@ -556,7 +582,19 @@ sdhci2: mmc@fa20000 { power-domains =3D <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names =3D "clk_ahb", "clk_xin"; - ti,otap-del-sel-legacy =3D <0x8>; + bus-width =3D <4>; + ti,clkbuf-sel =3D <0x7>; + ti,otap-del-sel-legacy =3D <0x0>; + ti,otap-del-sel-sd-hs =3D <0x0>; + ti,otap-del-sel-sdr12 =3D <0xf>; + ti,otap-del-sel-sdr25 =3D <0xf>; + ti,otap-del-sel-sdr50 =3D <0xc>; + ti,otap-del-sel-ddr50 =3D <0x9>; + ti,otap-del-sel-sdr104 =3D <0x6>; + ti,itap-del-sel-legacy =3D <0x0>; + ti,itap-del-sel-sd-hs =3D <0x0>; + ti,itap-del-sel-sdr12 =3D <0x0>; + ti,itap-del-sel-sdr25 =3D <0x0>; status =3D "disabled"; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62p5-sk.dts index 95a0146279b1..8c73587b0b62 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -424,7 +424,6 @@ &sdhci1 { pinctrl-0 =3D <&main_mmc1_pins_default>; ti,driver-strength-ohm =3D <50>; disable-wp; - no-1-8-v; bootph-all; }; =20 --=20 2.43.0 From nobody Sun Feb 8 02:56:05 2026 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96017200DD; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 7 Feb 2024 16:55:26 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmZ014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 6/9] arm64: dts: ti: k3-am6*: Remove DLL properties for soft PHYs Date: Wed, 7 Feb 2024 16:55:23 -0600 Message-ID: <20240207225526.3953230-7-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Remove DLL properties which are not applicable for soft PHYs since these PHYs do not have a DLL to enable. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 3 --- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 3 --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 1 - arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 1 - arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 1 - arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 -- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 - arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 - arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 - 9 files changed, 14 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am62-main.dtsi index fe0cc4a9a501..79ed5cbbbda1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -561,7 +561,6 @@ sdhci0: mmc@fa10000 { assigned-clock-parents =3D <&k3_clks 57 8>; mmc-ddr-1_8v; mmc-hs200-1_8v; - ti,trm-icp =3D <0x2>; bus-width =3D <8>; ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x0>; @@ -580,7 +579,6 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; - ti,trm-icp =3D <0x2>; ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0x0>; @@ -604,7 +602,6 @@ sdhci2: mmc@fa20000 { power-domains =3D <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names =3D "clk_ahb", "clk_xin"; - ti,trm-icp =3D <0x2>; ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0x0>; diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/bo= ot/dts/ti/k3-am625-beagleplay.dts index 3b4246ce49de..bb6a5837bcb3 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -819,7 +819,6 @@ &sdhci0 { bootph-all; pinctrl-names =3D "default"; pinctrl-0 =3D <&emmc_pins_default>; - ti,driver-strength-ohm =3D <50>; disable-wp; status =3D "okay"; }; @@ -832,7 +831,6 @@ &sdhci1 { =20 vmmc-supply =3D <&vdd_3v3_sd>; vqmmc-supply =3D <&vdd_sd_dv>; - ti,driver-strength-ohm =3D <50>; disable-wp; cd-gpios =3D <&main_gpio1 48 GPIO_ACTIVE_LOW>; cd-debounce-delay-ms =3D <100>; @@ -849,7 +847,6 @@ &sdhci2 { ti,fails-without-test-cd; cap-power-off-card; keep-power-in-suspend; - ti,driver-strength-ohm =3D <50>; assigned-clocks =3D <&k3_clks 157 158>; assigned-clock-parents =3D <&k3_clks 157 160>; #address-cells =3D <1>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 6806288ec227..f283777d54b4 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -561,7 +561,6 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; - ti,trm-icp =3D <0x2>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0xf>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index c99b2e90f76d..f241637a5642 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -582,7 +582,6 @@ &sdhci1 { vmmc-supply =3D <&vdd_mmc1>; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_mmc1_pins_default>; - ti,driver-strength-ohm =3D <50>; disable-wp; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62p5-sk.dts index 8c73587b0b62..5c9b73726ebd 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -422,7 +422,6 @@ &sdhci1 { vqmmc-supply =3D <&vddshv_sdio>; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_mmc1_pins_default>; - ti,driver-strength-ohm =3D <50>; disable-wp; bootph-all; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/bo= ot/dts/ti/k3-am62x-sk-common.dtsi index 6dd496cd459a..3c45782ab2b7 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -411,7 +411,6 @@ &sdhci0 { status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_mmc0_pins_default>; - ti,driver-strength-ohm =3D <50>; disable-wp; }; =20 @@ -421,7 +420,6 @@ &sdhci1 { status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_mmc1_pins_default>; - ti,driver-strength-ohm =3D <50>; disable-wp; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index 9bfa0a969bfc..a29847735c6e 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -646,7 +646,6 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 3>, <&k3_clks 58 4>; clock-names =3D "clk_ahb", "clk_xin"; - ti,trm-icp =3D <0x2>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0xf>; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/= ti/k3-am642-evm.dts index 5c546ae76d3e..f308076d608a 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -508,7 +508,6 @@ &sdhci1 { pinctrl-names =3D "default"; bus-width =3D <4>; pinctrl-0 =3D <&main_mmc1_pins_default>; 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Wed, 7 Feb 2024 16:55:27 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQma014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 7/9] arm64: dts: ti: k3-am6*: Fix ti,clkbuf-sel property in MMC nodes Date: Wed, 7 Feb 2024 16:55:24 -0600 Message-ID: <20240207225526.3953230-8-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Move ti,clkbuf-sel property above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if ti,clkbuf-sel is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing ti,clkbuf-sel for MMC0 in k3-am64-main. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 ++-- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 3 ++- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am62-main.dtsi index 79ed5cbbbda1..410b390ce5d5 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -579,6 +579,7 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; + ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0x0>; @@ -590,7 +591,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs =3D <0x1>; ti,itap-del-sel-sdr12 =3D <0xa>; ti,itap-del-sel-sdr25 =3D <0x1>; - ti,clkbuf-sel =3D <0x7>; bus-width =3D <4>; status =3D "disabled"; }; @@ -602,6 +602,7 @@ sdhci2: mmc@fa20000 { power-domains =3D <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names =3D "clk_ahb", "clk_xin"; + ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0x0>; @@ -613,7 +614,6 @@ sdhci2: mmc@fa20000 { ti,itap-del-sel-sd-hs =3D <0xa>; ti,itap-del-sel-sdr12 =3D <0xa>; ti,itap-del-sel-sdr25 =3D <0x1>; - ti,clkbuf-sel =3D <0x7>; status =3D "disabled"; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index f283777d54b4..ddb76cd66f88 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -561,6 +561,7 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; + ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0xf>; @@ -572,7 +573,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs =3D <0x0>; ti,itap-del-sel-sdr12 =3D <0x0>; ti,itap-del-sel-sdr25 =3D <0x0>; - ti,clkbuf-sel =3D <0x7>; bus-width =3D <4>; no-1-8-v; status =3D "disabled"; diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index a29847735c6e..bea05be7cb48 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -628,6 +628,7 @@ sdhci0: mmc@fa10000 { clock-names =3D "clk_ahb", "clk_xin"; mmc-ddr-1_8v; mmc-hs200-1_8v; + ti,clkbuf-sel =3D <0x7>; ti,trm-icp =3D <0x2>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-mmc-hs =3D <0x0>; @@ -646,6 +647,7 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 3>, <&k3_clks 58 4>; clock-names =3D "clk_ahb", "clk_xin"; + ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-sd-hs =3D <0x0>; ti,otap-del-sel-sdr12 =3D <0xf>; @@ -657,7 +659,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs =3D <0x0>; ti,itap-del-sel-sdr12 =3D <0x0>; ti,itap-del-sel-sdr25 =3D <0x0>; - ti,clkbuf-sel =3D <0x7>; status =3D "disabled"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 02:56:05 2026 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA2801DFEB; Wed, 7 Feb 2024 22:55:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346538; cv=none; b=eUZxEuLxA1ERw0SYrIOXfzLLHCuaxxYscJOFGnmzr+Yy7qXhQH0aC8hlrB71111cLm6vy6raEcEMlxCk57BCLALMzq7wkpC+q5q7Q2P34EDU7LuiSV7iSuD2Ce5bs1aa+1ONXVYSrfy7/MqN+P8YciOZEsV/WfE+ZzeMfrSkMp8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707346538; c=relaxed/simple; bh=nDXzUoWI6HydVGvZzvT5I/307J/pqVcb15PihDGPVyo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 8/9] arm64: dts: ti: k3-am6*: Fix bus-width property in MMC nodes Date: Wed, 7 Feb 2024 16:55:25 -0600 Message-ID: <20240207225526.3953230-9-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Move bus-width property to *main.dtsi, above the OTAP/ITAP delay values. While there is no error with where it is currently at, it is easier to read the MMC node if the bus-width property is located above the OTAP/ITAP delay values consistently across MMC nodes. Add missing bus-width for MMC2 in k3-am62-main. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 1 - arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 -- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 1 - 6 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am62-main.dtsi index 410b390ce5d5..55420eb1c620 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -559,9 +559,9 @@ sdhci0: mmc@fa10000 { clock-names =3D "clk_ahb", "clk_xin"; assigned-clocks =3D <&k3_clks 57 6>; assigned-clock-parents =3D <&k3_clks 57 8>; + bus-width =3D <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; - bus-width =3D <8>; ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-mmc-hs =3D <0x0>; @@ -579,6 +579,7 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; + bus-width =3D <4>; ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; @@ -591,7 +592,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs =3D <0x1>; ti,itap-del-sel-sdr12 =3D <0xa>; ti,itap-del-sel-sdr25 =3D <0x1>; - bus-width =3D <4>; status =3D "disabled"; }; =20 @@ -602,6 +602,7 @@ sdhci2: mmc@fa20000 { power-domains =3D <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names =3D "clk_ahb", "clk_xin"; + bus-width =3D <4>; ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x8>; ti,otap-del-sel-sd-hs =3D <0x0>; diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/bo= ot/dts/ti/k3-am625-beagleplay.dts index bb6a5837bcb3..a34e0df2ab86 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -842,7 +842,6 @@ &sdhci2 { vmmc-supply =3D <&wlan_en>; pinctrl-names =3D "default"; pinctrl-0 =3D <&wifi_pins_default>, <&wifi_32k_clk>; - bus-width =3D <4>; non-removable; ti,fails-without-test-cd; cap-power-off-card; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index ddb76cd66f88..253c1857eedf 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -561,6 +561,7 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names =3D "clk_ahb", "clk_xin"; + bus-width =3D <4>; ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-sd-hs =3D <0x0>; @@ -573,7 +574,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs =3D <0x0>; ti,itap-del-sel-sdr12 =3D <0x0>; ti,itap-del-sel-sdr25 =3D <0x0>; - bus-width =3D <4>; no-1-8-v; status =3D "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index bea05be7cb48..bc9c9ff993e6 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -626,6 +626,7 @@ sdhci0: mmc@fa10000 { power-domains =3D <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 57 0>, <&k3_clks 57 1>; clock-names =3D "clk_ahb", "clk_xin"; + bus-width =3D <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; ti,clkbuf-sel =3D <0x7>; @@ -647,6 +648,7 @@ sdhci1: mmc@fa00000 { power-domains =3D <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 58 3>, <&k3_clks 58 4>; clock-names =3D "clk_ahb", "clk_xin"; + bus-width =3D <4>; ti,clkbuf-sel =3D <0x7>; ti,otap-del-sel-legacy =3D <0x0>; ti,otap-del-sel-sd-hs =3D <0x0>; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/= ti/k3-am642-evm.dts index f308076d608a..83f2b00726b5 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -494,7 +494,6 @@ eeprom@0 { /* eMMC */ &sdhci0 { status =3D "okay"; - bus-width =3D <8>; non-removable; ti,driver-strength-ohm =3D <50>; disable-wp; @@ -506,7 +505,6 @@ &sdhci1 { status =3D "okay"; vmmc-supply =3D <&vdd_mmc1>; pinctrl-names =3D "default"; - bus-width =3D <4>; pinctrl-0 =3D <&main_mmc1_pins_default>; disable-wp; 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Wed, 7 Feb 2024 16:55:26 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 417MtQmc014027; Wed, 7 Feb 2024 16:55:27 -0600 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , , , Subject: [PATCH v1 9/9] arm64: dts: ti: k3-am6*: Fix bootph-all property in MMC node Date: Wed, 7 Feb 2024 16:55:26 -0600 Message-ID: <20240207225526.3953230-10-jm@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207225526.3953230-1-jm@ti.com> References: <20240207225526.3953230-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Add missing bootph-all property for AM62p MMC0 and AM64x MMC0 nodes. Move the location of bootph-all property in MMC1 for k3-am62p5-sk to match Sitara board files. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 3 ++- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62p5-sk.dts index 5c9b73726ebd..17c6c2fc0e09 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -410,6 +410,7 @@ &main_i2c2 { }; =20 &sdhci0 { + bootph-all; status =3D "okay"; ti,driver-strength-ohm =3D <50>; disable-wp; @@ -417,13 +418,13 @@ &sdhci0 { =20 &sdhci1 { /* SD/MMC */ + bootph-all; status =3D "okay"; vmmc-supply =3D <&vdd_mmc1>; vqmmc-supply =3D <&vddshv_sdio>; pinctrl-names =3D "default"; pinctrl-0 =3D <&main_mmc1_pins_default>; disable-wp; - bootph-all; }; =20 &cpsw3g { diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/= ti/k3-am642-evm.dts index 83f2b00726b5..84619782e52d 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -493,6 +493,7 @@ eeprom@0 { =20 /* eMMC */ &sdhci0 { + bootph-all; status =3D "okay"; non-removable; ti,driver-strength-ohm =3D <50>; --=20 2.43.0