From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17FA3131740; Tue, 6 Feb 2024 12:03:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221023; cv=none; b=C1Gl14/Bq7TBmUSfpQLrwIuMhQRG2JZuEBqr4IUDCGUq/ApDMN41e4AEofnFocw1Sv6IWhb2EsmuJRKBbZJxcp78qCxbrkUWvr0Ax5vLFhyWy5y0OLEyjhBBoImjz7gtSEEvVPzV4/J8wYIn3RUrRN7sfI2qAVC1WTdr3hTeMXI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221023; c=relaxed/simple; bh=VmwScpVHyOuzrgR8x+aZIK2YdHWWkhRqBsdSL/vjAe8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=GhJgi8YcQ30AyBgRymQrYDZWlEaRL4XmGHIJXCrn+mrIohgiQouMTzkKOULWSBsWJ2XyShGEhRRqAv+YbJRueh02n0TIQOvcRV3SFP+pHDXLm9LFtVDBy/E2TOcqOaz8I08dxSUtcfLkbgOGwLIeYG0fW3PCYxaWfIsN+QKdgq8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=SsFesPqG; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="SsFesPqG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221022; x=1738757022; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VmwScpVHyOuzrgR8x+aZIK2YdHWWkhRqBsdSL/vjAe8=; b=SsFesPqGV/7Q8o38d+Vn5XtIzNpuyKbvloR8DY6GbD4Zzg+JyCWqkJ4N y/Uo5Gy/bkW5jlhjdpW8XQHRB4h35+M+2iwSZnfgNj6eLHhBhPSNH8VAQ DXKUeNcLMz/GT+gm5VPyIkSiuxIxUNeCf/vT3Zgnis20siBU0O/ZQs1ug XJ8+O1YmMKPX83l14QC9J6PeTx4dYQoBItJ3AVZfrVW5dCKTlVXEapWIH eFsmoCwq5rIkjcdLQYd4ut6IoTcp/BUym/3OWJLXA0eE+Ebh6AbdC4RaO gd4AayM5a3mm82f20rsI/dGjLDyfYU6qrK5+K0WL5mWdejlGrnxi+6k+H Q==; X-CSE-ConnectionGUID: yTxsI0ESSbahg8PzMhJ7Cg== X-CSE-MsgGUID: A3M+K6MoTJ2txepBP4p0iw== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="183097593" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:33 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:32 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:30 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 1/8] ARM: dts: microchip: sam9x60_curiosity: Add power-supply properties for sdmmc nodes Date: Tue, 6 Feb 2024 14:03:15 +0200 Message-ID: <20240206120322.88907-2-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAM9X60 MPU doesn't support the IO voltage signaling/switching required by the UHS sd-card. In order to use the sd high-speed mode, keep vqmmc at 3V3. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts b/arch/= arm/boot/dts/microchip/at91-sam9x60_curiosity.dts index c6fbdd29019f..457c54dde0b7 100644 --- a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts @@ -452,6 +452,8 @@ &sdmmc0 { pinctrl-0 =3D <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>; cd-gpios =3D <&pioA 25 GPIO_ACTIVE_LOW>; disable-wp; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; status =3D "okay"; }; =20 @@ -460,6 +462,8 @@ &sdmmc1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc1_default>; disable-wp; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0FDA1131E4E; Tue, 6 Feb 2024 12:03:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221040; cv=none; b=HgfjE/vUz0DmdxIfwNK/kRdJSDWEQd/Hzv9nMuGELf3qMsgvi9cf/sQY7CXCCuvLzdDlnOIkBqaUtsT5KWZuRzfmGAu3KkXQEdvjyQ3v/ZeJAH862Try7/1+fuj/v7nrF2J4C+hCld2tQKyDT9r+b2Vd3oeZgmwDPmYSMZ1INfk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221040; c=relaxed/simple; bh=F41G1+RQ5nTNqvMXTxeVA04ZwCfN78WPkAzyLOV9cds=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mn4rELP+SkExWOw/OO40MVBre/vGmBzZkvySnvHWcRK5ENt5bLdVlaOOPpoT+AzbA8D0xNoOWjA4Fu/n+ihFL8svONqF47Xb5DqSpvYJQLPoAH2e9nNuFQTx7HJV9VR49AtWULvSQBDd0L4DYDqMj3ViDj5/FhAx3LvfkbmXBZI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=Fd7raDkZ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="Fd7raDkZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221039; x=1738757039; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=F41G1+RQ5nTNqvMXTxeVA04ZwCfN78WPkAzyLOV9cds=; b=Fd7raDkZrqMsh9ojCzrbAM36HPc9T4zPAceE28TJbQf1wgTlUgp9oh0x ModpVSDaoyjbojsItrDgX1F7SrEKWHX6pzKkSEt2aEHqSczRQutQEZrB9 74knbHSG3BxYXwz8joSjRC+18LZRwy4j07dJfo1rTMnKdogx1TGqf424J kdiHjitfMUDiRRPrd9wjH8fGpF7nyyonD5R+dAlkY71b2IBh8e5a9Q0+W 7jveERDA1ZRpc4yJudPoSg8CrLzofHQmeoTraQmk+75v74+3EplwSkKMS iOLLWz3daXwGs+KYncsHKohreY680m1Y+oaACJSerGnEtNl3K2H3BZQdP Q==; X-CSE-ConnectionGUID: F8QfY3NGSPaWmFcnYFQ4zw== X-CSE-MsgGUID: kBnP/YNoQvymYWbm+zoYjw== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="15843151" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:57 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:35 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:33 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 2/8] ARM: dts: microchip: sam9x60ek: Add power-supply properties for sdmmc nodes Date: Tue, 6 Feb 2024 14:03:16 +0200 Message-ID: <20240206120322.88907-3-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAM9X60 MPU doesn't support the IO voltage signaling/switching required by the UHS sd-card. In order to use the sd high-speed mode, keep vqmmc at 3V3. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sam9x60ek.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts b/arch/arm/boot= /dts/microchip/at91-sam9x60ek.dts index f3cbb675cea4..b19a0956dc97 100644 --- a/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts @@ -560,6 +560,8 @@ &sdmmc0 { status =3D "okay"; cd-gpios =3D <&pioA 23 GPIO_ACTIVE_LOW>; disable-wp; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; }; =20 &sdmmc1 { @@ -568,6 +570,8 @@ &sdmmc1 { pinctrl-0 =3D <&pinctrl_sdmmc1_default>; no-1-8-v; non-removable; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; status =3D "disabled"; /* Conflict with flx4. */ }; =20 --=20 2.43.0 From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52B14132488; Tue, 6 Feb 2024 12:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221045; cv=none; b=pOigkDyE/onZRnP5QUrdT4Z0e3ez4lwUE2jDUprWCKKb8HqQP7ZsqSEJFc4iBbbKa5zgtJgVntfBAwdbS+yQ1AKPMYZO7J10kDfVKImXyJFidbZqDxmzaNsYxYUgSp7F38ZOIvZmJDkHdbfiQKqRH2ExwoOQRtF22SLBflel7/g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221045; c=relaxed/simple; bh=X6l5+Qs2evycJatv5Ixx/LdwhPihrwxN901yvlO4cdY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=p/4t2dSvDXO80tpSzFWmwoXEQ3V9r9sZEEPGidg47OHm4p+v0wfFmmpae7zSys6QeO//NJL1HQ9Oguxb06260KrWR+1RWt1lEvnMRHfKf3b5EugAuWKik4Q1L0nCHxe+xpY665uyzCnpJdWGcf0at7hs/4qeyIKz4GAnMlPhfh8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=CnNI9GrH; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="CnNI9GrH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221044; x=1738757044; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X6l5+Qs2evycJatv5Ixx/LdwhPihrwxN901yvlO4cdY=; b=CnNI9GrHRYVi6d7QdXifmDZfrRcyEOnt7J/2wWNVrNB6xPuihOpRXWVk Qkbi8D3xtCbLgHwr+GjLyhBrHk6qpgZF0+B2MJf8MBweZbF188fG+6iHM 24vjK9lVusxoPQ7+FYQKGVV5Nn18NA4KwKLw9IcSFuDUW+TNqY1nI6TFt xWlvtGX6FX16hkQIZTWwOhjHnJD3yhyKrokC2M0b7xI31b9qWkcUxUjw7 mQpbH9dqdurOXFs8rX+w/vr6rDstSafS3B3uchz4kaIpH+l95oKTdcWs9 COGJEgVlvDrzAhtj8loOvNw1NbY6zwVc/g2p49NoZsye0/V0eng7K7gkj w==; X-CSE-ConnectionGUID: /iuDP2QxSliEsbGRCUpaQw== X-CSE-MsgGUID: +2VvTXRxSHWcLM3TzXxUtA== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="17200237" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:57 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:37 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:35 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 3/8] ARM: dts: microchip: sama5d27_som1_ek: Add power-supply properties for sdmmc nodes Date: Tue, 6 Feb 2024 14:03:17 +0200 Message-ID: <20240206120322.88907-4-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts b/arch/a= rm/boot/dts/microchip/at91-sama5d27_som1_ek.dts index f3ffb8f01d8a..255ee0640133 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts @@ -56,6 +56,8 @@ sdmmc0: sdio-host@a0000000 { bus-width =3D <8>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; + vmmc-supply =3D <&vddin_3v3>; + vqmmc-supply =3D <&vddin_3v3>; status =3D "okay"; }; =20 @@ -63,6 +65,8 @@ sdmmc1: sdio-host@b0000000 { bus-width =3D <4>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc1_default>; + vmmc-supply =3D <&vddin_3v3>; + vqmmc-supply =3D <&vddin_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D655F132489; Tue, 6 Feb 2024 12:04:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221047; cv=none; b=JFYPQ5sGSCJYn1X/ODfvGQf8pbFemLuVEh62dg8GfHr1CVPYwDqT2F/cU4phAY7nFOdFYbt3QozwpTFiayNHSbLQoRMD5hWthA4RSsOsYn/lMy7Ar6N4LLuIrl4MDNNLSmhhYfPaTw7pJQrye1tbnB6VsWdFoKWQ2r/iWtNkM2I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221047; c=relaxed/simple; bh=EiKdr/c9u9JrjmRxZthlmQfwVXETFnQKLUqxsjuilV0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=llkTbHR3sRnwO8ISIEjXfXiMN0oxNmXMm5e45MeCDRddHF1fSjFHOaQoirL9DLsUpjtSs6eDSDGEMo3jBCx9NrEA4whtqoNlMmeDHzQti9QAA98SxFLZ9kBjuUsbz8D0rJsbbFd9qsO4LDFCY2/aXVCi+iJR96OkcbLiwHwbE2c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=EQ5Sh+fJ; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="EQ5Sh+fJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221045; x=1738757045; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EiKdr/c9u9JrjmRxZthlmQfwVXETFnQKLUqxsjuilV0=; b=EQ5Sh+fJZrqFpLaN/7z7D6St+zNk7XEyrXkDxggYJ659dV6gnxxP9JhF 8m4ItOkqzRD4jk43DAvBKaocaqj23IFe2BRzN2RlBY8YDyEdEDXFQnhJQ vTHJBaJ+R4n1npID2SS2M5VB7uZ5LOOiquOUxzIV8ja/rnBhO65pP0hDM Xd+t8u7JKb1Ji19BkBx658pIMS9yxfVEiY4bUm2FJCjVdu3sL/UN+SlHE TixFhlGKObirkOLkcT6Ni5cnQUsWVWCBxwp2qKqSYLTlhY1FsvhU/ObGh G8xo+x6sSfP6HGDgvaOv6JIvjT6sJkMyvyz+rPWQ6SOwXqbBTYooJkJZb g==; X-CSE-ConnectionGUID: /iuDP2QxSliEsbGRCUpaQw== X-CSE-MsgGUID: v3sBQFHaQxKUz4RPHrKjVw== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="17200240" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:57 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:40 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:38 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 4/8] ARM: dts: microchip: sama5d27_wlsom1: Add power-supply property for sdmmc1 node Date: Tue, 6 Feb 2024 14:03:18 +0200 Message-ID: <20240206120322.88907-5-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc1 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi b/arch/a= rm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi index 4617805c7748..96819ea24cbd 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi @@ -368,6 +368,8 @@ &sdmmc1 { no-1-8-v; non-removable; bus-width =3D <4>; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; =20 wilc: wifi@0 { --=20 2.43.0 From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65069131E4E; Tue, 6 Feb 2024 12:04:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221047; cv=none; b=LnTpiiSzVzu7i4FoAbFhUw8DGPozu2ysyS7o8iqSE+NX0Z+sD9r0M5rw/Q6q0hgWufev7p0FLbZ/I4WqZpwsj1rlGtwDunjJjcoPxZ4msoWdel/T1hLdS1kAlsoaRAYT1Pb9ZSgQZkUKCPlBoAF1qtoNkReJBHwqzKG3uvItvZA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221047; c=relaxed/simple; bh=uuhzD7h2SKOvmlK9PXKVWDeAFZG64lM+lbWLD+e9xpQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QaUbiyZIf1jkJmPzi4F30LFklXeOg2ZIHr59s+SGr0mRmajMsmgtsSeMifuZX35t8qG02LqabiFF2ZeKHd5xLcPqAuOpopNupNyfTReUl1mbvGZyc+dxDug06revZEVZcpPE8z8sTCu8Kqcsq/lXWwj4pppph5tghP/zvlL5cK0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=YZxahTgh; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="YZxahTgh" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221046; x=1738757046; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uuhzD7h2SKOvmlK9PXKVWDeAFZG64lM+lbWLD+e9xpQ=; b=YZxahTghDOG9+0Ox+jRyWZ3YAdIiSs6XscO0y/NPlFtp1e7Vkqn54k5Y g3I25LwI4gaFcOkXvTE2lgIr6rPiz+IvNWhXRvCrDZOdlwHlct09rjN5f 0i/lSGY9Kw9B02GVYpF4e/636wjy/RzcS0ClPU0m79G1piivnYUHzmzqc 6EPkD0sWsLYEQPLvdhrRq0JHrYPPchrQEVk9wD4Hi5N3iGKveJazM+E1o /OoHsCV0ICU0NrH8EFSzhpdKLBGb4t5moH1cg8Q1ij+y/Dht4caLdCYZ1 Ki6SYFGT1pZvGawkEOyeLlNeL5EgftsPje23B1mn+w9/QVct1yb4gREJb Q==; X-CSE-ConnectionGUID: /iuDP2QxSliEsbGRCUpaQw== X-CSE-MsgGUID: aqlGfhU5TlGcsgRLZZ5F4w== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="17200241" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:43 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:40 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 5/8] ARM: dts: microchip: sama5d27_wlsom1_ek: Add power-supply property for sdmmc0 node Date: Tue, 6 Feb 2024 14:03:19 +0200 Message-ID: <20240206120322.88907-6-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc0 node. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts b/arch= /arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts index 15239834d886..7b36e1970bb7 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts @@ -199,6 +199,8 @@ &sdmmc0 { bus-width =3D <4>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FB7C132C06; Tue, 6 Feb 2024 12:04:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221049; cv=none; b=BJgBj6H6sCDjQ4UaqnEZHR7wJ/B6KgZhigo4VBBRiTvchzb/jO/P9dcNCKLeyhm4Q9J1Qhi0IwU6cEhg0VrMRlUevruwfiMSVD6Al4+DZwHof9A85SRmpW/+jvbI4FeGniIAlJ37334PL6A2XvbIw4vwbQJPzQ4JxQjqiDdFjhg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221049; c=relaxed/simple; bh=GGCBkxCfAvpFW+a8iffFgSgfa1wQsNkoc0aZBARmSME=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aW/l3zVcxwtckc2MeFHmO0h1CLtBdzYhKl5qan5F+UMJKeXBimDBhzpJ03hMO9VQnoDhHQS+WIjrzOKqkXIAJZqrTdcL9C0vA38RpPVp6Ez1ykvsGVmytvFz2c5NmEEDCR9beiXqFBi1a9AuqTD5RtZ9v6PrTW0Mi4v0u1oYuTI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=tImqvR3c; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="tImqvR3c" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221047; x=1738757047; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GGCBkxCfAvpFW+a8iffFgSgfa1wQsNkoc0aZBARmSME=; b=tImqvR3c4N7nfRxgHiiI0H7X1gyt5AzmZzzsoGl+DIlAXlczr7q/wY5g 3QnjD0bg0Xxl5SBs6Wejpz1qab/2U5q7PbQWpEoA9riG3tmi004pFtJpF 8xc/UD+Hgg5192/9DO/zIvZX6CmzspdqLCPMANbWq7vgwuiO5AnVNbqLO VMvDFxJgc18rFUM+6BHRpE26TU6Vw0sUCMOLjABUn6OWtFitgcAeUoVQQ grMAx6nMr+dul4aY7yir22H7iA5nSV88u1cDQjKMB/5pVYSrKrNq4sXmH oYKP3Y6m8vgtl6/EerWJPihKHn7y6XKYu9rpM3w2DenQzmu8urcAVMNBQ A==; X-CSE-ConnectionGUID: /iuDP2QxSliEsbGRCUpaQw== X-CSE-MsgGUID: 1EZtQPkgTx6jL2+GtY03YQ== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="17200242" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:45 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:43 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 6/8] ARM: dts: microchip: sama5d29_curiosity: Add power-supply properties for sdmmc nodes Date: Tue, 6 Feb 2024 14:03:20 +0200 Message-ID: <20240206120322.88907-7-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts b/arch= /arm/boot/dts/microchip/at91-sama5d29_curiosity.dts index 6b02b7bcfd49..4a86597d089a 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts @@ -504,6 +504,8 @@ &sdmmc0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; disable-wp; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; }; =20 @@ -512,6 +514,8 @@ &sdmmc1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc1_default>; disable-wp; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C2C4132C1B; Tue, 6 Feb 2024 12:04:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221049; cv=none; b=EV6FteGLJi/2mErs/h9bn/mtb/oWYintKkSNONnh1/tjNjyRB4iAUZzHqBSOcD+8RqEtUp1nEJp5xptoEwTo60qMAbStzcZsS9Fj5NELMPWmFPXeEiucrvfY7EsNkVs6aJU9ptiAcJRC1bex5/p3EfRNkTlXNzXZFpNz1CQubEY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221049; c=relaxed/simple; bh=gxp0aYbQ2ugpPKEyUXMzSsLLT/uKXw4HcUWO4ZTthg0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UCFMHSBBgG95yP/OiaPOxTGXeNpoNhvusdg7qVYUquo6rjzAqMrSpmDzUYmDcApt14CZY3yFsYJjxp7Q3A6hvU0pDOmFyxFLzuw4tdZbjXa0hrQS42oxwnSo8EA9HCBNTm4YxrtQPxAHVt4isL+so5DpNPGeBTNCFYrMs7EuiRU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=FKGaskRL; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="FKGaskRL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221047; x=1738757047; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gxp0aYbQ2ugpPKEyUXMzSsLLT/uKXw4HcUWO4ZTthg0=; b=FKGaskRLlCi5dZ6p0l0ayQBpx8W3VS4ipooE2TLbcs9q75aqWPZXwMvb N+4FIEkokILXtObRRhoswTOWsjnHa8ouugSvHCPBITRiLPo3XGl4RHaFM 4nEaPUco1wGdSsTfg8IvtH8BHYNF1Gi8cA5FweB0c4HK0Si6HzYpgykB/ /5sjC7DhaKtWP67T8b+oRWImuMILLYx2x21ddb0/tHqPbOwOdVsAp0sF5 4tRnlQf88LJQPZqyyjljoTem0iLObzPZsRDtKUYH3BmNu/H3rpqvDQC1N pNEvIUseCLU4YvH90NgdclaDdofK/dUvhEA81D5fazKVZlaatuCFTB3cw Q==; X-CSE-ConnectionGUID: /iuDP2QxSliEsbGRCUpaQw== X-CSE-MsgGUID: x2dTOowiTDySOs3/yErIIg== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="17200244" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:48 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:46 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 7/8] ARM: dts: microchip: sama5d2_icp: Add power-supply property for sdmmc0 node Date: Tue, 6 Feb 2024 14:03:21 +0200 Message-ID: <20240206120322.88907-8-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc0 node. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts b/arch/arm/bo= ot/dts/microchip/at91-sama5d2_icp.dts index 999adeca6f33..adcb3240e5f5 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts @@ -712,6 +712,8 @@ &sdmmc0 { bus-width =3D <4>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; + vmmc-supply =3D <&vdd_io_reg>; // 3.3V + vqmmc-supply =3D <&vdd_io_reg>; // 3.3V status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 06:22:49 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 152DD132C15; Tue, 6 Feb 2024 12:04:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221049; cv=none; b=cpaau7KReZROtRFgxmxE0P15WAeB57zrMYQRuk3/MML5Ya/mEhI+gwrvFUwucQdY2PRio2g70ulO+ve9Ecr3sKf8GK5xK7382XLAG/zucnSA/Tta5EJqwDzXJSzKknDIm7bujomMgG/nlZ0AEd30VpaRigJa9ithatQ2M0oMiRc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707221049; c=relaxed/simple; bh=q5AQrYWB5lwDHhGNPklEX9DOip1NJmdov5PmWLB1Rm4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=badzPTVTtnySBdxB8/PTJN7G2vWT5GHz97xT9s4zjtH5bXkYA6mYCX4GQKuwV4UbcCcsjazjPfHWvOzgqAnKPp9yc2Jj+kD1n+UUkzUnF6AiZcg1+LpHyQ4504JuAUgt7NLRKTU59vDxyjnAcuv5li4qfpJ4H+pC1GuOCkyo/JM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=NdWmnjNW; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="NdWmnjNW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707221047; x=1738757047; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=q5AQrYWB5lwDHhGNPklEX9DOip1NJmdov5PmWLB1Rm4=; b=NdWmnjNWOcEqLI766G5BC87BxFkxC4Akqw7Og+R4f2XlYNIUUpSmWDzo uSdcPhm4iXj4Hi4gvMzSkCRwG6eokrHKH6o0WEkZqLPmhLvKP+hYy+1Hf JnsnoIQ9T340M0k51cimPykOEB01b+6bpjLH4RsfKZzS76Uyxek7Pqhm1 KNR/qlR/Aa6DuV8JgRJGpeYC+qxTs0YiKl/q07dVz76GIIxE9lINZuCWv hV4CAT0KQ/eXoM9trgfcancVP0qJC1C/wZg9yI26ml5bFU02BZjEiI+VD ogWrFjOVjoTppBllxzF2qjnmByGLuV1RNwwCqSPvpsExha12p4Z0Kzv1D Q==; X-CSE-ConnectionGUID: /iuDP2QxSliEsbGRCUpaQw== X-CSE-MsgGUID: uLKTaMpvRyWh4wCyip561Q== X-IronPort-AV: E=Sophos;i="6.05,247,1701154800"; d="scan'208";a="17200246" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 Feb 2024 05:03:59 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 6 Feb 2024 05:03:51 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 6 Feb 2024 05:03:48 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v3 8/8] ARM: dts: microchip: sama5d2_xplained: Add power-supply property for sdmmc0 node Date: Tue, 6 Feb 2024 14:03:22 +0200 Message-ID: <20240206120322.88907-9-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206120322.88907-1-mihai.sain@microchip.com> References: <20240206120322.88907-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc0 node. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts b/arch/a= rm/boot/dts/microchip/at91-sama5d2_xplained.dts index 6680031387e8..9b7e56790a5a 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts @@ -67,6 +67,8 @@ sdmmc0: sdio-host@a0000000 { pinctrl-0 =3D <&pinctrl_sdmmc0_default>; non-removable; mmc-ddr-3_3v; + vmmc-supply =3D <&vdd_3v3_reg>; + vqmmc-supply =3D <&vdd_3v3_reg>; status =3D "okay"; }; =20 --=20 2.43.0