From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC6CE1118F; Mon, 5 Feb 2024 08:04:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120255; cv=none; b=JRlnDvlMw+jao8cMQfsFu7mbsr+dnJrs1WoBO4jm3aloKqn+ag6cbSKrtTjgmRWcMP+mV4QPHFZTEmVwy6fjTb/Fj6+dN+q5qzLXSZpKEeOXDUyEgfPCoth1biPEL78Iv8ve7gvRdThCxE1pjAe0wKsfdUhGgw5ox8MUgbss4Vs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120255; c=relaxed/simple; bh=0G42BUGboCGoo34pO1Db6WnsOP+8JX9KsFZBc11vQE4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=p/g+84xT3aTPHL+PDMpT6M31VfUxQI7tfs6UVRp6wz2vaxpZ6Bv8vT8QkEBPK9sKfh5l8rGJIYQhfEuQEYVbNyaRRA2bdj2t9jSmCh5g/Fhx+vBEktdE/fOkPad3ylYUR5QIcdAN3ywWbV9sRMfPfWGMT1DjRGmKPz55oExE//Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=LVz6LSBS; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="LVz6LSBS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120253; x=1738656253; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0G42BUGboCGoo34pO1Db6WnsOP+8JX9KsFZBc11vQE4=; b=LVz6LSBSXR3sv9rWH65q2KMwPib75cF5Q5l5+soureR6UjwJkOQ+0aJH 8p4lhApkT0nB6dDI7Am5K65qROW2OzCKHAs8MFeiYTrwYu84zzuqRHLw9 Z2G1llWoDSa7zTQ5gSHz0m5/x/EvcchX4XO58Xx8Wh2jP1t9/oCtx1mvk wqqd5IG+mMimnAuWLjGnqbYERvwKw887FUm9psxN5Tu7PTVRmQ+XWQAsh 4LM5AF7MGDcJcSF2UO2jTsyJd9l9cbjSqM4sypnzO6pWu9lYk4KkJvUP9 LqkUJi2V2sCN63cPqKHrcPZPUj6X6v2ami5z6omPGZeAzos2ZJcBA6MxE A==; X-CSE-ConnectionGUID: /sWzmiszTQ2ztYFgEFabog== X-CSE-MsgGUID: XMXmmH8QTtuZ15kYF9VAMg== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278226" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:00:58 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:34 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:32 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 1/8] ARM: dts: microchip: sam9x60_curiosity: Add power-supply properties for sdmmc nodes Date: Mon, 5 Feb 2024 10:00:19 +0200 Message-ID: <20240205080027.4565-2-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAM9X60 MPU doesn't support the IO voltage signal= ing/switching required by the UHS sd-card. In order to use the sd high-speed mode, keep vqmmc at 3V3. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts b/arch/= arm/boot/dts/microchip/at91-sam9x60_curiosity.dts index c6fbdd29019f..457c54dde0b7 100644 --- a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts @@ -452,6 +452,8 @@ &sdmmc0 { pinctrl-0 =3D <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>; cd-gpios =3D <&pioA 25 GPIO_ACTIVE_LOW>; disable-wp; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; status =3D "okay"; }; =20 @@ -460,6 +462,8 @@ &sdmmc1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc1_default>; disable-wp; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 705BA10A33; Mon, 5 Feb 2024 08:04:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120256; cv=none; b=DKSFdHbfHfjsJyRZY7jLaYgMi+6oHneNdFaGRqt931plSPdvRTu7VbJsPRPevG3RYV38rQRQubBZRgjG5z75VDcc45H/Ork89YQJ8zUYByJK+bsWS0E/GED2kj+qvhWJAkF/k9QYorlnYa3C99fw3p24FPKZuC8TBS81E2jQFHA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120256; c=relaxed/simple; bh=mW4lJXfZ3GmL/xcsOJOLADEGnDCtICQQeKtW5OlqpsQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=n7RuXdj4cxrdesRP/gb4/KJHBkkYtP3UtV3OX+ySjbiC3jm6xTnOE9T/E+rVt/BWkjX7VDkhib7DkDOVE96oGUvxRbw1Dq0L6FKyuy7xDvkoERR+c94q4nEY/2zi2vliNXdzTKK5JUEvr3Gi0OSwQXkU/gEXBUr03EJ8mPypink= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=RmxCIWub; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="RmxCIWub" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120255; x=1738656255; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mW4lJXfZ3GmL/xcsOJOLADEGnDCtICQQeKtW5OlqpsQ=; b=RmxCIWubNXKhhkL0ujk/QtJqljC3A78q79YEvX2qIrEKg13P1wH7Ay8o /5GjTDg8O3nAVi4/tVtOCu+Zh3t/AWEeAMjmv6876xJj5T+3/tqI6Ssr8 bYBiL8gE+m3gGxd6GtXhLH0I0ZP+IO8PuOycEKtzdkLcEOG/0mFvj4DsS ApZPt62HLbH97wX40HExbCxI/XUsfVswPe/Ul4DSQh+uuCFrd54BY01f2 ZnmMJdiLMiJ3W0og8nOe2WXsbGvpSWEgzUmTYWi0FiBvix5SZfPd2VuID r7sonog4L8AijjWtQ0xGN7xHZmpcG7vkyVDu5OwrHA3VWLQ77cIMPvcUG A==; X-CSE-ConnectionGUID: /sWzmiszTQ2ztYFgEFabog== X-CSE-MsgGUID: NbmStGl9RWWTzgTuMZjRLg== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278232" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:00:59 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:37 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:35 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 2/8] ARM: dts: microchip: sam9x60ek: Add power-supply properties for sdmmc nodes Date: Mon, 5 Feb 2024 10:00:20 +0200 Message-ID: <20240205080027.4565-3-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAM9X60 MPU doesn't support the IO voltage signal= ing/switching required by the UHS sd-card. In order to use the sd high-speed mode, keep vqmmc at 3V3. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sam9x60ek.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts b/arch/arm/boot= /dts/microchip/at91-sam9x60ek.dts index f3cbb675cea4..b19a0956dc97 100644 --- a/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sam9x60ek.dts @@ -560,6 +560,8 @@ &sdmmc0 { status =3D "okay"; cd-gpios =3D <&pioA 23 GPIO_ACTIVE_LOW>; disable-wp; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; }; =20 &sdmmc1 { @@ -568,6 +570,8 @@ &sdmmc1 { pinctrl-0 =3D <&pinctrl_sdmmc1_default>; no-1-8-v; non-removable; + vmmc-supply =3D <&vdd1_3v3>; + vqmmc-supply =3D <&vdd1_3v3>; status =3D "disabled"; /* Conflict with flx4. */ }; =20 --=20 2.43.0 From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0469C1119B; Mon, 5 Feb 2024 08:04:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120257; cv=none; b=BKAKaDoK3pRj1w+8k981ZEWnJZyIOznrw3zUsp0l9sjUhCRW34/Xjfg7NyLxWNptVyZkMaO9n2Kub+lcpjtOIZt+RWi2qN6KQOBg+G5PeVcwrDDSaPIICw6wB0HIfDnnThmBzvSskqRKdW5HuPUnK+Kmbwzn5xHTKON0hPemr6o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120257; c=relaxed/simple; bh=b8LBr+HkRiGbiofvmfhN7/Z+LuPQPfSgtATjkS2qEdA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=h9QZW1RE/XWpzIqjvav0w5QpfHTCDxgQrRV8YbIODG0bWxD2zLtE0oSOv1SdPAAoESLbFuXqeYlmfbwR+/rXOR3TEljLy/2z3a46gPcdx+61nvr4H9M8Ck5Ykk4vJ0oBbpj8T+GMy3lnAzenwiNF3IZUe51BXPPVqoYYQ5sB2ok= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=ofqlXtQk; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="ofqlXtQk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120256; x=1738656256; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=b8LBr+HkRiGbiofvmfhN7/Z+LuPQPfSgtATjkS2qEdA=; b=ofqlXtQk4Rco57oLqYPbGp0wC1LEdgyHTyHTeVM36oiWayfvElmzHCRC z3ZnH5+TGaHf7gaRhyQ91algJpdkqvVc5JZ+mStvXaHGCE0uIqGxPWVZQ 6K9Wea1q8eypD/ojKsP5NQCrYFKloYWCQD0xi3w0kVL0fwWvycE9JFCsd l1z1T2W+U+L7RRdebEOtcDBJZDEQMZxMarq548/7biB7duqi0d8Zcj6jY imvBUxc54QMOgjTWLWVkQ/dX5Cu4+73R9P9i/r1+DhK8V3KpR5NrPKrPK dKgukiI+u6EN5wMsEA0EHt+dLwGCAv+hViz8cHN8MbooB2C1V8Ayp3rnK g==; X-CSE-ConnectionGUID: /sWzmiszTQ2ztYFgEFabog== X-CSE-MsgGUID: O4rHOnRGQkCrExiFbwDAxQ== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278233" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:01:00 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:39 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:37 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 3/8] ARM: dts: microchip: sama5d27_som1_ek: Add power-supply properties for sdmmc nodes Date: Mon, 5 Feb 2024 10:00:21 +0200 Message-ID: <20240205080027.4565-4-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/= switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS = cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts b/arch/a= rm/boot/dts/microchip/at91-sama5d27_som1_ek.dts index f3ffb8f01d8a..255ee0640133 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts @@ -56,6 +56,8 @@ sdmmc0: sdio-host@a0000000 { bus-width =3D <8>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; + vmmc-supply =3D <&vddin_3v3>; + vqmmc-supply =3D <&vddin_3v3>; status =3D "okay"; }; =20 @@ -63,6 +65,8 @@ sdmmc1: sdio-host@b0000000 { bus-width =3D <4>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc1_default>; + vmmc-supply =3D <&vddin_3v3>; + vqmmc-supply =3D <&vddin_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BB30111BC; Mon, 5 Feb 2024 08:04:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120258; cv=none; b=OkRyYYyfJ44niAwH5PY0UdWxo/O8+nhEByFq6HQ1oSkuL/2gRoIxxHSieuhgOv2FbEYa8TlMj7VgYlk6l515sHFJRa1P2867xmXsaCwsnEQP9DWc8d46rhu66IG+MxVpSQCHP80m+ThkkS535HJGCRUvJTMujZiiVqWTgKe3Vbg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120258; c=relaxed/simple; bh=HrSglZUZ2hoVlELPp8le9uE4ed0TrBfvyUw3oAEEASY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Z4vvYaAIMgbeU4ieLa+wi2VOXiBISg+tL5CdOF/SmgDf5fmnvskR4uc6d7FfHm+zs954T+SZomWFjK7sdZqEeIV9L+IHN6uxYiJ5aUZdoVo/+kvKnWUMrmjTuITurlhUpbH2BGso0oozUDQ0YYcSXmMrJsx5h/BoS85mAfueZK0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=I3LbQct9; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="I3LbQct9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120257; x=1738656257; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HrSglZUZ2hoVlELPp8le9uE4ed0TrBfvyUw3oAEEASY=; b=I3LbQct9gHSHXzyfkV/inXLfdffpnzzQxmABJl53KFA73MuXPYmzTJHc EXhI5I75+ZDMjhy874ZjdmcLGE28DYsbE/2ScUZEps8U/by9y/tXeMGNC 4bjMx986FrcTrXkIh0TyMcJJ+cO3K2ixJFdOn5cCTXZl6TTjO2yF5lJ5m K7qVjhfodyOo1I9vFtOJRdl99pb1GlPOk+HhQCcv/9dkL6watS+44qEh2 yv93hYbAr1L0+3RJl1kVoh+vaWiGDM7sjCsO4miJpK0CTU3FxSVc6ub6s ZI/HSAi2JS6WSnEn/FVu0M3WSTcBTmnPhF5/Zm8llBXmYHJs29H31sMkm g==; X-CSE-ConnectionGUID: /sWzmiszTQ2ztYFgEFabog== X-CSE-MsgGUID: gizGeysATd2xk8Y1tVVfYg== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278234" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:01:00 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:42 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:40 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 4/8] ARM: dts: microchip: sama5d27_wlsom1: Add power-supply property for sdmmc1 node Date: Mon, 5 Feb 2024 10:00:22 +0200 Message-ID: <20240205080027.4565-5-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc1 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc1 node. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/= switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS = cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi b/arch/a= rm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi index 4617805c7748..96819ea24cbd 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi @@ -368,6 +368,8 @@ &sdmmc1 { no-1-8-v; non-removable; bus-width =3D <4>; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; =20 wilc: wifi@0 { --=20 2.43.0 From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A595311716; Mon, 5 Feb 2024 08:04:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120259; cv=none; b=A1W72dO1mlhE3rXiiulDgdIMoOkYITKu5Z/PV+FkD62f94GkB3PwpcSvKK9VhFTh6YaHBGcBbadITKEb7NNe3kp84qgKf+3CuY2UeV33T0EOEgxXCLxDgVw5h4ERKFtWyzopyMuBEAU+jHxq9a6+O5/OHy3YaOG8pOwCOcQL4vk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120259; c=relaxed/simple; bh=wHJZoqIwYywtidkx1yfqKVvRCuC5bsMb4/F4Nf1VpF0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=U4bknvGmMEiFMXL4nE5VcqGR8deJw2K//XVt5eoOz+ia1fhq0tpR/BPKkfeIcCLX7VMiZREBef7MxvbcNeLSERh10IHtk8l1X+eyQlxeI4/7u4O+C4gi7GcXtvL/1NCE1OA2uvk+EszqYxjYwRlNYj9J+rjDM8iGJaNf4les61w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=USsfFyb9; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="USsfFyb9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120257; x=1738656257; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wHJZoqIwYywtidkx1yfqKVvRCuC5bsMb4/F4Nf1VpF0=; b=USsfFyb9bUF+ICK/y8uDZC6zFMAzDmJqZ696AtJtYA3GmIfPS7RofaTx KbMNchlW7bIWKMa0C28C7XzeRMrRQhYo4vGKrm7pg+84piIMLExEz4iMm J07qE+4VRTgug3yv4dQCF9+OwVJmhOL83iHmNRngV88/ZHi1FH+qRvUt9 ErSZSpx5rocpX8p/TBNfj29vIln9tmESaHjJZZiLeg0P1GhaGCiVmEbnP sywt4R9EenULbuS4AG31cBynN5QNQ9azEMJOUpaBXxqJ4l805M6IKDFaA X2okFnXRVSM5IgWGLFOByC44KbMwS9toQpC31o+F1iEAH5/zNkDLZsWGo w==; X-CSE-ConnectionGUID: /sWzmiszTQ2ztYFgEFabog== X-CSE-MsgGUID: Mu8PqQLmSz6ZXDJ29R+fmw== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278235" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:01:00 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:45 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:42 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 5/8] ARM: dts: microchip: sama5d27_wlsom1_ek: Add power-supply property for sdmmc0 node Date: Mon, 5 Feb 2024 10:00:23 +0200 Message-ID: <20240205080027.4565-6-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc0 node. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/= switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS = cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts b/arch= /arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts index 15239834d886..7b36e1970bb7 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts @@ -199,6 +199,8 @@ &sdmmc0 { bus-width =3D <4>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E85610A2E; Mon, 5 Feb 2024 08:01:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120071; cv=none; b=FJC3Q/KCRurrWznuRpX57UNSf+qiFzpQ7lCMRU7/evN0o5WroYDvcj9vwLRXeg2J+AciZCKlcvIthnk6/ErYfXIE5w8T4ySjBGpRf+4FD5x5b2YJCVHS7geGM1C+IUORJrZ0Ix6LuuXfb/S+vjk9Vueb6XsIKDemN72KXWVMuXI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120071; c=relaxed/simple; bh=p+Uj34kCikvUIdbvpZfE2Fe1DJXGR4Kpf8PdpkBdJMQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=U/77xmtwc9WHm0I4rdYalhJ5XPLhqVdr7Hlrb3HwC8kglJwOHTHcVnK+HDRgR76ypyKf0bRiFsiWP3Iue20CxoKlLiqauYwk0CwPW7kCp60nGx1Z2fFHPTju/zLqC3QebluiCkwPjTB/ConIOM1FFKfCH+51gPBl2z0QNovF//M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=nIzwYrGx; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="nIzwYrGx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120070; x=1738656070; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p+Uj34kCikvUIdbvpZfE2Fe1DJXGR4Kpf8PdpkBdJMQ=; b=nIzwYrGxwyaCzWk2b4nLNJKzUHeP5G/dd1JN5jXOIASoDt0Oc49zcqY8 KX51TCBBQq93Cfngo7rtjoTm+oR8LekD6J21nTqJEr9ZUQXEOZGsRnWfc vH6QR6FsNUlVsRWLbpwEp7fX0MVNIBwu1POTPVgqHHKwU7iFYFAztxUvT /XJCr1Xvq+H28IRnYbeaJa3DhoR8/yJNyBx0uKr3eyAHmbH1ZALqGdH9p w1UVnzeN39eZV1dN0kh2et1Dj6ZNmJmD2yFNFnFARmZrqHjCS3Xnd/k/w oYOr44jUngS56QfHMHpnhTvD6nhOEoC7YvNzaUrvA6VaYCgiPWYMuRmT/ Q==; X-CSE-ConnectionGUID: /sWzmiszTQ2ztYFgEFabog== X-CSE-MsgGUID: yUJNFHmJSSe5k+KN7KP6gg== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278236" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:01:00 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:47 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:45 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 6/8] ARM: dts: microchip: sama5d29_curiosity: Add power-supply properties for sdmmc nodes Date: Mon, 5 Feb 2024 10:00:24 +0200 Message-ID: <20240205080027.4565-7-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 and sdmmc1 controllers are powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc nodes. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/= switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS = cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts b/arch= /arm/boot/dts/microchip/at91-sama5d29_curiosity.dts index 6b02b7bcfd49..4a86597d089a 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dts @@ -504,6 +504,8 @@ &sdmmc0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; disable-wp; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; }; =20 @@ -512,6 +514,8 @@ &sdmmc1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc1_default>; disable-wp; + vmmc-supply =3D <&vdd_3v3>; + vqmmc-supply =3D <&vdd_3v3>; status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B512C11197; Mon, 5 Feb 2024 08:01:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120074; cv=none; b=oK2d98XFzSavBPGYBIwMEmFly5+GPxFD0cXdemVD4WzsSgshI543K4ajavHXm38ER5ohaimtp6tvnh+nS8WaYnSnStuR9yrOeTvmAPLOGuoP1Bbye2d+tBVRj8950GPL/1VVdJ99qdD2ROd7ea1wpTRTkLVTSu3LkTUoXq1CjVs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120074; c=relaxed/simple; bh=520kbFokQfIobK/X/hSbAVFhFZ2E7Qd+bcOJ67BSKjQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kdudzmX42yB0L/yIC/BcyBTdHteGNQbSgsMV69pucUcltCzu6EwaehhyriwPU50gpMsTHzqDbEwQ8ahhDYxIgXbbD02HkZjAipoyp/f7IUA2rttEqBOnL7fPjio6Z1lh5dHzTMU6yqXncDiN+/aFpukLX92GG+JQXub8cTpt6Ok= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=LHRGZhjJ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="LHRGZhjJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120072; x=1738656072; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=520kbFokQfIobK/X/hSbAVFhFZ2E7Qd+bcOJ67BSKjQ=; b=LHRGZhjJEzewHdupdPef+mWdI8xVZ0vuYudEbsNwKtzv3ZIITG6g9Xhn qDOYSfjzl5JZWrOkF0k47Xj2vmVFCPaS6GeyE2Ubs2Aq69em6TFxdG+Ub bec//65TGJ0J43PTPm0nVZCE8LXtKwkRZzOB78LcQ+UojZ/KxQ7/uS09J yFyuxqCLSUrhk/9kIt8pjmKrGM51rVVDGtz6HcI5Sfhkrh7th/fwJmgzA L0eca150jtUNS1iFwFGNwYm+2rJT30aNLznh8ncZLhIHEFY3PF/vMjtwV JnhxXWw1Hy1veWel5TZO51gYByuXDpkd9Tkg+NQJTOFSGJFfvP0IyCB2u g==; X-CSE-ConnectionGUID: z0tAOx4kRimGrwt021s81A== X-CSE-MsgGUID: 8lxLQdceQHiS+2N39cTx4Q== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278248" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:01:08 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:50 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:47 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 7/8] ARM: dts: microchip: sama5d2_icp: Add power-supply property for sdmmc0 node Date: Mon, 5 Feb 2024 10:00:25 +0200 Message-ID: <20240205080027.4565-8-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc0 node. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/= switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS = cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts b/arch/arm/bo= ot/dts/microchip/at91-sama5d2_icp.dts index 999adeca6f33..adcb3240e5f5 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts @@ -712,6 +712,8 @@ &sdmmc0 { bus-width =3D <4>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_sdmmc0_default>; + vmmc-supply =3D <&vdd_io_reg>; // 3.3V + vqmmc-supply =3D <&vdd_io_reg>; // 3.3V status =3D "okay"; }; =20 --=20 2.43.0 From nobody Sun Feb 8 18:30:16 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDD8710A2B; Mon, 5 Feb 2024 08:01:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120073; cv=none; b=BEsMCz7NI+d9kJWXHFWWUkop9zYFUdX2shFy/evzSH36EWzQmITsmW5QH10ps2F/DwybPnHx4IW527n7bTrXg8QZ0leo96F5UgZyVQFBr8X5pFtQI0DiwgM56eJhZsE3/8UWFYN7YqXNiceqr7T2epUamnkPPAPiYsBsluDh8fU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707120073; c=relaxed/simple; bh=7Q4k+KbMYr9qx5BQXuGDcYEmnW+RWhVIOI4IF3WHU+k=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=M1S0AI+5ltAe3iCuhZ3DsO/eGtOKmIa+CJc9ZNNC1q2b956Bnu6TeECdXSj/UetAjKX+l0r8md6fDIH+6N201P4YZC7R4z8VS/QL+bxIxFTU9dOHtpgkGxsQesfeeeKsq6V5kxYL4gdTwMGNhHyZ1g4DlY3qR2+ql6Nv2UMazQc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=1W6pGmk3; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="1W6pGmk3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1707120071; x=1738656071; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7Q4k+KbMYr9qx5BQXuGDcYEmnW+RWhVIOI4IF3WHU+k=; b=1W6pGmk3/pTu/V7E8qzRYlo/lNIjs3hHaWDxfyI6oEZCfNYDv5oiZ1NX eWhp4QLjwUy0fGfup9nTH61+4is19HQvLYIOaXvKSRyNckNCklBqP9Ui/ 9Q+9eGsxfLvr759KGOKLnWJGjEciRjsT3ocDQGKQi+6yzAcDFls9tU3A/ nmgLTmR8tNZPwqTChNDZKXNlmstk9LXFZ0PWE0FkMsIYKuyFE3zyQh/l0 bDq4Cwa/fI38cRiAJbzws1Feq3/ezMJQW7KunHAniFDpCxsEa8jcLOlUB V8MhkAMXykztAUtUbXQ3o+KD6LW2mFgfOtKj2PVL/U3iJ+xWODZUwL/Bk w==; X-CSE-ConnectionGUID: x3dk9xvgTIiMUicoXpbX8Q== X-CSE-MsgGUID: C9DbyUXCTfSuqARtpeRZng== X-IronPort-AV: E=Sophos;i="6.05,242,1701154800"; d="scan'208";a="16278250" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 05 Feb 2024 01:01:08 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 5 Feb 2024 01:00:52 -0700 Received: from virtualbox.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 5 Feb 2024 01:00:50 -0700 From: Mihai Sain To: , , , , , , , , CC: Mihai Sain Subject: [PATCH v2 8/8] ARM: dts: microchip: sama5d2_xplained: Add power-supply property for sdmmc0 node Date: Mon, 5 Feb 2024 10:00:26 +0200 Message-ID: <20240205080027.4565-9-mihai.sain@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240205080027.4565-1-mihai.sain@microchip.com> References: <20240205080027.4565-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sdmmc0 controller is powered from 3.3V regulator. Add vmmc-supply and vqmmc-supply properties to sdmmc0 node. The sdmmc controller from SAMA5D2 MPU has support for IO voltage signaling/= switching required by the UHS sd-card. In order to avoid the issues from the tuning procedure required by the UHS = cards, keep the vqmmc at 3V3 to use the sd high-speed mode. Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts b/arch/a= rm/boot/dts/microchip/at91-sama5d2_xplained.dts index 6680031387e8..9b7e56790a5a 100644 --- a/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/microchip/at91-sama5d2_xplained.dts @@ -67,6 +67,8 @@ sdmmc0: sdio-host@a0000000 { pinctrl-0 =3D <&pinctrl_sdmmc0_default>; non-removable; mmc-ddr-3_3v; + vmmc-supply =3D <&vdd_3v3_reg>; + vqmmc-supply =3D <&vdd_3v3_reg>; status =3D "okay"; }; =20 --=20 2.43.0