From nobody Tue Dec 23 18:11:08 2025 Received: from mail-yb1-f201.google.com (mail-yb1-f201.google.com [209.85.219.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C46C12F38C for ; Fri, 2 Feb 2024 23:41:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706917279; cv=none; b=pk3MTd45rgugQ9fhcGdXovx4sj0A6qFMJWjkrWaNNmDQQyW7jCJJejMR4r2YSeugPb7b6uezDBuUSzWoVaYw1X3Gg+S0hoQdT4VL8Q0t5Jd0K4Pw2mW6pW9O8ynokroqj5JOope+1oF0zQbpWzVEQYPoC4Yv+GqliZAHhOlzRXI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706917279; c=relaxed/simple; bh=2CEX69l8jHviwD08AVVrjec2O+3gxN5VKnRqORpifeQ=; h=Date:In-Reply-To:Message-Id:Mime-Version:References:Subject:From: To:Content-Type; b=MchgCXk4d5rH746gdBKdg3fffxDUwGToXCKlX4dQTr5BNkv6N4gkNUsfF0xTAaDLjKze5BUAY7ZwaB4ceYErVbBBqEq2L/FQFhMQaR/FEqkiS9sVOPX9FZsbtuRCo2QDrmFSDudyY1WDZg940dgOQcCysszO0+KtrCxyFBUWwJM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=Q2SurpQR; arc=none smtp.client-ip=209.85.219.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="Q2SurpQR" Received: by mail-yb1-f201.google.com with SMTP id 3f1490d57ef6-dc3645a6790so4709056276.0 for ; Fri, 02 Feb 2024 15:41:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1706917276; x=1707522076; darn=vger.kernel.org; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=Xzvhj+a0qyhqfnlkJlD6nNip1T9+Dz0mvAMEktGGdDs=; b=Q2SurpQRaQR+Y1ACtUW51Dydq5v+1OzPqkkPVLGHwTb717kWrZcZfvskPLtNK/MhLU n1o+FZ5aOx9PFmqJBzmUBKJBCU9L1XQtaZg7mkx+CWCD9R2uzO4Jx7Ck+xvCkq3na/EY h9eBZQtGcZjsCWJ7HF2HFeteZTucJ++HtL79fNMqU5JdcZnij8i/wUqB44at2bvUzJVx BQ5eptnmMoCBQmlC7XR+o+o1WcaGq2/6ppJh8Xg07JNteT0AA/wYWKwhfhnc1PEM+mG5 Z1l/L2AKBdjdg3r4Y52zKLvSeT43gSbNGqfB3LBmbKU2CCLWwEVjPjt+LS/M/+H2HMmF Igng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706917276; x=1707522076; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Xzvhj+a0qyhqfnlkJlD6nNip1T9+Dz0mvAMEktGGdDs=; b=xMJmc5Gg0MA55go3kSY5IzUgUcAuu3jMVzGSafP9WAUIcKivdYO4W5j57htncMe+ws 7CiK9zD98HpLbbCTsQ8FddLO7ooyTJSwqUxW1nONAz18U+bL/YRo2P/mrRc0zSx1Y4zG 3QpV+dL3VatdD1UJVeNvLKN/JnzqYMXOmW3GtdEQUkoWSWvMw4xjK7iwX3DnYI0lrA4P ex6++djptYlSL8pdOC/1ARb8WZsTWSYtu4AS5H8ylpWYH3hWryyYl8FAM5njlikjZPVE sEsNqlYkhBh9hWlzJTe70obquTGcb2kJy1qAmATFxGiyODnHAhpPwv9vXqDnF8fCZCAH JBEQ== X-Gm-Message-State: AOJu0Yw2wXozvnJ7/TOAOQ5tpXccCv09Q+pqxh1VaynXicg0R/r8e99E 8h/olUSFM/jlnU/TA38pWzRzPd20TwBvFA9mrd3HxONj5xt7oPWLXN97PxLRWV7JIOwSSiwEBTZ VMq4XFA== X-Google-Smtp-Source: AGHT+IH1P3pzKL0QWpOjxn7DF+fg6zdcOTDx/JJDNSMOI0pZaXnlYiFdp7LpbTqNMeVndnj73uZ3TS4lpO3f X-Received: from irogers.svl.corp.google.com ([2620:15c:2a3:200:7732:d863:503:f53d]) (user=irogers job=sendgmr) by 2002:a05:6902:138e:b0:dc2:1cd6:346e with SMTP id x14-20020a056902138e00b00dc21cd6346emr2454938ybu.8.1706917276279; Fri, 02 Feb 2024 15:41:16 -0800 (PST) Date: Fri, 2 Feb 2024 15:40:52 -0800 In-Reply-To: <20240202234057.2085863-1-irogers@google.com> Message-Id: <20240202234057.2085863-4-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240202234057.2085863-1-irogers@google.com> X-Mailer: git-send-email 2.43.0.594.gd9cf4e227d-goog Subject: [PATCH v3 3/8] perf arm-spe/cs-etm: Directly iterate CPU maps From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Adrian Hunter , Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , John Garry , Will Deacon , Thomas Gleixner , Darren Hart , Davidlohr Bueso , "=?UTF-8?q?Andr=C3=A9=20Almeida?=" , Kan Liang , K Prateek Nayak , Sean Christopherson , Paolo Bonzini , Kajol Jain , Athira Rajeev , Andrew Jones , Alexandre Ghiti , Atish Patra , "Steinar H. Gunderson" , Yang Jihong , Yang Li , Changbin Du , Sandipan Das , Ravi Bangoria , Paran Lee , Nick Desaulniers , Huacai Chen , Yanteng Si , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rather than iterate all CPUs and see if they are in CPU maps, directly iterate the CPU map. Similarly make use of the intersect function taking care for when "any" CPU is specified. Switch perf_cpu_map__has_any_cpu_or_is_empty to more appropriate alternatives. Signed-off-by: Ian Rogers Reviewed-by: James Clark --- tools/perf/arch/arm/util/cs-etm.c | 114 ++++++++++++--------------- tools/perf/arch/arm64/util/arm-spe.c | 4 +- 2 files changed, 51 insertions(+), 67 deletions(-) diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/c= s-etm.c index 77e6663c1703..07be32d99805 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -197,38 +197,37 @@ static int cs_etm_validate_timestamp(struct auxtrace_= record *itr, static int cs_etm_validate_config(struct auxtrace_record *itr, struct evsel *evsel) { - int i, err =3D -EINVAL; + int idx, err =3D 0; struct perf_cpu_map *event_cpus =3D evsel->evlist->core.user_requested_cp= us; - struct perf_cpu_map *online_cpus =3D perf_cpu_map__new_online_cpus(); - - /* Set option of each CPU we have */ - for (i =3D 0; i < cpu__max_cpu().cpu; i++) { - struct perf_cpu cpu =3D { .cpu =3D i, }; + struct perf_cpu_map *intersect_cpus; + struct perf_cpu cpu; =20 - /* - * In per-cpu case, do the validation for CPUs to work with. - * In per-thread case, the CPU map is empty. Since the traced - * program can run on any CPUs in this case, thus don't skip - * validation. - */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(event_cpus) && - !perf_cpu_map__has(event_cpus, cpu)) - continue; + /* + * Set option of each CPU we have. In per-cpu case, do the validation + * for CPUs to work with. In per-thread case, the CPU map has the "any" + * CPU value. Since the traced program can run on any CPUs in this case, + * thus don't skip validation. + */ + if (!perf_cpu_map__has_any_cpu(event_cpus)) { + struct perf_cpu_map *online_cpus =3D perf_cpu_map__new_online_cpus(); =20 - if (!perf_cpu_map__has(online_cpus, cpu)) - continue; + intersect_cpus =3D perf_cpu_map__intersect(event_cpus, online_cpus); + perf_cpu_map__put(online_cpus); + } else { + intersect_cpus =3D perf_cpu_map__new_online_cpus(); + } =20 - err =3D cs_etm_validate_context_id(itr, evsel, i); + perf_cpu_map__for_each_cpu_skip_any(cpu, idx, intersect_cpus) { + err =3D cs_etm_validate_context_id(itr, evsel, cpu.cpu); if (err) - goto out; - err =3D cs_etm_validate_timestamp(itr, evsel, i); + break; + + err =3D cs_etm_validate_timestamp(itr, evsel, cpu.cpu); if (err) - goto out; + break; } =20 - err =3D 0; -out: - perf_cpu_map__put(online_cpus); + perf_cpu_map__put(intersect_cpus); return err; } =20 @@ -435,7 +434,7 @@ static int cs_etm_recording_options(struct auxtrace_rec= ord *itr, * Also the case of per-cpu mmaps, need the contextID in order to be noti= fied * when a context switch happened. */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(cpus)) { + if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) { evsel__set_config_if_unset(cs_etm_pmu, cs_etm_evsel, "timestamp", 1); evsel__set_config_if_unset(cs_etm_pmu, cs_etm_evsel, @@ -461,7 +460,7 @@ static int cs_etm_recording_options(struct auxtrace_rec= ord *itr, evsel->core.attr.sample_period =3D 1; =20 /* In per-cpu case, always need the time of mmap events etc */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(cpus)) + if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) evsel__set_sample_bit(evsel, TIME); =20 err =3D cs_etm_validate_config(itr, cs_etm_evsel); @@ -533,45 +532,31 @@ static size_t cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused, struct evlist *evlist __maybe_unused) { - int i; + int idx; int etmv3 =3D 0, etmv4 =3D 0, ete =3D 0; struct perf_cpu_map *event_cpus =3D evlist->core.user_requested_cpus; - struct perf_cpu_map *online_cpus =3D perf_cpu_map__new_online_cpus(); - - /* cpu map is not empty, we have specific CPUs to work with */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(event_cpus)) { - for (i =3D 0; i < cpu__max_cpu().cpu; i++) { - struct perf_cpu cpu =3D { .cpu =3D i, }; + struct perf_cpu_map *intersect_cpus; + struct perf_cpu cpu; =20 - if (!perf_cpu_map__has(event_cpus, cpu) || - !perf_cpu_map__has(online_cpus, cpu)) - continue; + if (!perf_cpu_map__has_any_cpu(event_cpus)) { + /* cpu map is not "any" CPU , we have specific CPUs to work with */ + struct perf_cpu_map *online_cpus =3D perf_cpu_map__new_online_cpus(); =20 - if (cs_etm_is_ete(itr, i)) - ete++; - else if (cs_etm_is_etmv4(itr, i)) - etmv4++; - else - etmv3++; - } + intersect_cpus =3D perf_cpu_map__intersect(event_cpus, online_cpus); + perf_cpu_map__put(online_cpus); } else { - /* get configuration for all CPUs in the system */ - for (i =3D 0; i < cpu__max_cpu().cpu; i++) { - struct perf_cpu cpu =3D { .cpu =3D i, }; - - if (!perf_cpu_map__has(online_cpus, cpu)) - continue; - - if (cs_etm_is_ete(itr, i)) - ete++; - else if (cs_etm_is_etmv4(itr, i)) - etmv4++; - else - etmv3++; - } + /* Event can be "any" CPU so count all online CPUs. */ + intersect_cpus =3D perf_cpu_map__new_online_cpus(); } - - perf_cpu_map__put(online_cpus); + perf_cpu_map__for_each_cpu_skip_any(cpu, idx, intersect_cpus) { + if (cs_etm_is_ete(itr, cpu.cpu)) + ete++; + else if (cs_etm_is_etmv4(itr, cpu.cpu)) + etmv4++; + else + etmv3++; + } + perf_cpu_map__put(intersect_cpus); =20 return (CS_ETM_HEADER_SIZE + (ete * CS_ETE_PRIV_SIZE) + @@ -813,16 +798,15 @@ static int cs_etm_info_fill(struct auxtrace_record *i= tr, if (!session->evlist->core.nr_mmaps) return -EINVAL; =20 - /* If the cpu_map is empty all online CPUs are involved */ - if (perf_cpu_map__has_any_cpu_or_is_empty(event_cpus)) { + /* If the cpu_map has the "any" CPU all online CPUs are involved */ + if (perf_cpu_map__has_any_cpu(event_cpus)) { cpu_map =3D online_cpus; } else { /* Make sure all specified CPUs are online */ - for (i =3D 0; i < perf_cpu_map__nr(event_cpus); i++) { - struct perf_cpu cpu =3D { .cpu =3D i, }; + struct perf_cpu cpu; =20 - if (perf_cpu_map__has(event_cpus, cpu) && - !perf_cpu_map__has(online_cpus, cpu)) + perf_cpu_map__for_each_cpu(cpu, i, event_cpus) { + if (!perf_cpu_map__has(online_cpus, cpu)) return -EINVAL; } =20 diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/u= til/arm-spe.c index 51ccbfd3d246..0b52e67edb3b 100644 --- a/tools/perf/arch/arm64/util/arm-spe.c +++ b/tools/perf/arch/arm64/util/arm-spe.c @@ -232,7 +232,7 @@ static int arm_spe_recording_options(struct auxtrace_re= cord *itr, * In the case of per-cpu mmaps, sample CPU for AUX event; * also enable the timestamp tracing for samples correlation. */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(cpus)) { + if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) { evsel__set_sample_bit(arm_spe_evsel, CPU); evsel__set_config_if_unset(arm_spe_pmu, arm_spe_evsel, "ts_enable", 1); @@ -265,7 +265,7 @@ static int arm_spe_recording_options(struct auxtrace_re= cord *itr, tracking_evsel->core.attr.sample_period =3D 1; =20 /* In per-cpu case, always need the time of mmap events etc */ - if (!perf_cpu_map__has_any_cpu_or_is_empty(cpus)) { + if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) { evsel__set_sample_bit(tracking_evsel, TIME); evsel__set_sample_bit(tracking_evsel, CPU); =20 --=20 2.43.0.594.gd9cf4e227d-goog