From nobody Sat Feb 7 08:54:58 2026 Received: from unicom145.biz-email.net (unicom145.biz-email.net [210.51.26.145]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74A8617998; Fri, 2 Feb 2024 07:22:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.51.26.145 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706858564; cv=none; b=eTAHO8pIpXoOvaHkfI9LrIHf1QF+gi45eYJ3DGHpfYEcmyDWUR1jFm2r5+nfUDdEfeh23cvchSm4szJVOjAXVEPbhn6g3LJeB+owqci/rKL92y1qsiuf6Pi1UjGoo7G7fV43VAeX/hFb4vzWUxUstbfBfNexfzuIFkRhp10CMVo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706858564; c=relaxed/simple; bh=VoQqbRu16rEJ8qlra3eB+muBUWplkAHGaTdPZMDU8RA=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=E/Cwvd8nHtf/eK2sKhLmLCftGQmLeZlEzSHzWZlJFAc3Ryiqo1vjuMi00QBN2iESTBHno3nHXAVjDxWkdAWrr3HMgoJIdNxVvkiwPzJWzkLQJ6YVnE+vDwF9ioAbfayBqbHP3koMP11oOFFDNHCXb8nolYCjeeHo+VQHNkq96xE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=inspur.com; spf=pass smtp.mailfrom=inspur.com; arc=none smtp.client-ip=210.51.26.145 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=inspur.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=inspur.com Received: from unicom145.biz-email.net by unicom145.biz-email.net ((D)) with ASMTP (SSL) id YZY00137; Fri, 02 Feb 2024 15:22:37 +0800 Received: from localhost.localdomain.com (10.73.45.222) by jtjnmail201605.home.langchao.com (10.100.2.5) with Microsoft SMTP Server id 15.1.2507.34; Fri, 2 Feb 2024 15:22:36 +0800 From: Bo Liu To: , CC: , , Bo Liu Subject: [PATCH] hwmon: (tmp401) convert to use maple tree register cache Date: Fri, 2 Feb 2024 02:22:35 -0500 Message-ID: <20240202072235.41614-1-liubo03@inspur.com> X-Mailer: git-send-email 2.18.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 tUid: 20242021522379caa3bd455eee71f31d339256167edeb X-Abuse-Reports-To: service@corp-email.com Abuse-Reports-To: service@corp-email.com X-Complaints-To: service@corp-email.com X-Report-Abuse-To: service@corp-email.com Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu --- drivers/hwmon/tmp401.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/tmp401.c b/drivers/hwmon/tmp401.c index 91f2314568cf..df1b45a62e80 100644 --- a/drivers/hwmon/tmp401.c +++ b/drivers/hwmon/tmp401.c @@ -256,7 +256,7 @@ static int tmp401_reg_write(void *context, unsigned int= reg, unsigned int val) static const struct regmap_config tmp401_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 16, - .cache_type =3D REGCACHE_RBTREE, + .cache_type =3D REGCACHE_MAPLE, .volatile_reg =3D tmp401_regmap_is_volatile, .reg_read =3D tmp401_reg_read, .reg_write =3D tmp401_reg_write, --=20 2.18.2