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Add corresponding SPI nodes to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko Reviewed-by: Tudor Ambarus Link: https://lore.kernel.org/r/20240125013858.3986-4-semen.protsenko@linar= o.org [krzysztof: order properties according to DTS coding style] Signed-off-by: Krzysztof Kozlowski --- Changes in v3: - Fix dtschema warnings by specifying "spi" as a first clock Changes in v2: - Sorted pinctrl properties properly arch/arm64/boot/dts/exynos/exynos850.dtsi | 54 +++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dt= s/exynos/exynos850.dtsi index e7e1171a3864..2ba67c3d0681 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -738,6 +738,24 @@ usi_spi_0: usi@139400c0 { <&cmu_peri CLK_GOUT_SPI0_IPCLK>; clock-names =3D "pclk", "ipclk"; status =3D "disabled"; + + spi_0: spi@13940000 { + compatible =3D "samsung,exynos850-spi"; + reg =3D <0x13940000 0x30>; + clocks =3D <&cmu_peri CLK_GOUT_SPI0_PCLK>, + <&cmu_peri CLK_GOUT_SPI0_IPCLK>; + clock-names =3D "spi", "spi_busclk0"; + dmas =3D <&pdma0 5>, <&pdma0 4>; + dma-names =3D "tx", "rx"; + interrupts =3D ; + pinctrl-0 =3D <&spi0_pins>; + pinctrl-names =3D "default"; + num-cs =3D <1>; + samsung,spi-src-clk =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 usi_cmgp0: usi@11d000c0 { @@ -779,6 +797,24 @@ serial_1: serial@11d00000 { clock-names =3D "uart", "clk_uart_baud0"; status =3D "disabled"; }; + + spi_1: spi@11d00000 { + compatible =3D "samsung,exynos850-spi"; + reg =3D <0x11d00000 0x30>; + clocks =3D <&cmu_cmgp CLK_GOUT_CMGP_USI0_PCLK>, + <&cmu_cmgp CLK_GOUT_CMGP_USI0_IPCLK>; + clock-names =3D "spi", "spi_busclk0"; + dmas =3D <&pdma0 12>, <&pdma0 13>; + dma-names =3D "tx", "rx"; + interrupts =3D ; + pinctrl-0 =3D <&spi1_pins>; + pinctrl-names =3D "default"; + num-cs =3D <1>; + samsung,spi-src-clk =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 usi_cmgp1: usi@11d200c0 { @@ -820,6 +856,24 @@ serial_2: serial@11d20000 { clock-names =3D "uart", "clk_uart_baud0"; status =3D "disabled"; }; + + spi_2: spi@11d20000 { + compatible =3D "samsung,exynos850-spi"; + reg =3D <0x11d20000 0x30>; + clocks =3D <&cmu_cmgp CLK_GOUT_CMGP_USI1_PCLK>, + <&cmu_cmgp CLK_GOUT_CMGP_USI1_IPCLK>; + clock-names =3D "spi", "spi_busclk0"; + dmas =3D <&pdma0 14>, <&pdma0 15>; + dma-names =3D "tx", "rx"; + interrupts =3D ; + pinctrl-0 =3D <&spi2_pins>; + pinctrl-names =3D "default"; + num-cs =3D <1>; + samsung,spi-src-clk =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; }; }; --=20 2.39.2