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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-1-8ec5b48eec05@phytec.de> References: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> In-Reply-To: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Catalin Marinas , Will Deacon CC: Primoz Fiser , , , , , , Yannic Moog X-Mailer: b4 0.12.3 X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA02SaUhUURiGPXfzOjR5Gyc8GikMWim4gcIhKiKCTvVDWySSTAe9qWg2jKZp VK6l19yCLCcxG0XMBspxGUdcSpTUcCHTwEwbNdxyiVxSMPM6RP57vvdb3vfHx5KyScqejYiO 5dXRyigFI6F0dha73Cxiq3nPrDEF6visJdBC+UOAdE09BNqsyyfR87YeGn1aXmCQacAXVT42 UihnykQi/fggjYT1lyTqbyhi0IuftRS6n1lOowXjEEAdgolGKY+ekCi9qc0SbRj0FKpYqwVo qsYWrTUUU6jmRz6NsuYPorRhn+N2WFesA7hppYTCRs1XS6yvzGTw8GAjg4s7z+HRrPcEri67 h3Oz0mi8uvyGxlXz9QTO3fDE+Y13cVnBAIOrP9zGv/QOflyA5EgoHxURx6s9jgVLwlMMfYyq kL3Vkd8FksA3RgAsCzlv2KWLF4CElXGlBMxbbKbNhQnAlpZpIAArluGc4PjUCC0yxTnDyXEt IbINFwhzhTxKZCm3B3YWTlDiUZJzga8bPESZ5ByhYa6INI9cgd1137d9ZVssjAeJaLV1JTnV TXSVcwIDZ/XdjHl1CUCtwVlkyNnAB9qhbVcZtx9O9WZbmnVHWNAzS5rZH9YuGYg8INPsCKT5 H0izI1AJICuB7HpESCSvjoh0V4UnxPIh7qG8HojPILeQ1IOcItwKCBa0AsiSCrnU26eKl0lD lQmJvPpGkPpmFB/TCvaxlMJW+irjAi/jwpSxfCTPq3j1vy7BWtknAdWZDGEw6qpXTfDZlXfT lR7h/U8NWjmVBPvGGvyDv8A/tZu/k06vppeXBs+v75VfHpWOHkh1iN89M3E08861SJ8N+u1h bE20Z190PTn3UbJ0wsHePzk3MPTQM796VYXbTJy0t8ZIjKo1i4UB1gu6Ed/2S+ebBCe5S6I+ rPmUaUZBxYQrvVxJdYzyL6ZfVfD6AgAA Add Emerging Display Technology Corp. etml1010g3dra 10.1" LCD-TFT LVDS panel compatible string. Signed-off-by: Yannic Moog Acked-by: Conor Dooley --- Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.y= aml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 11422af3477e..b6bbdb3dd2b2 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -139,6 +139,8 @@ properties: - edt,etm0700g0edh6 # Emerging Display Technology Corp. LVDS WSVGA TFT Display with ca= pacitive touch - edt,etml0700y5dha + # Emerging Display Technology Corp. 10.1" LVDS WXGA TFT Display wi= th capacitive touch + - edt,etml1010g3dra # Emerging Display Technology Corp. 5.7" VGA TFT LCD panel with # capacitive touch - edt,etmv570g2dhu --=20 2.34.1 From nobody Mon Feb 9 10:39:03 2026 Received: from mickerik.phytec.de (mickerik.phytec.de [91.26.50.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90D8F38DFE for ; Fri, 26 Jan 2024 08:57:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.26.50.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706259464; cv=none; b=kexUXNLGf0AcrLTfQV/cD9do3PtOr4l4MCCH07EzrOSss+lXznqEKzO4OXeePoIRZ0GkDZrmaWCtQ3CK1wjFlidZwV9WiBOVtFdRi9HGiYa4p2taGMzWVsoaiVfHQMoDBgpQC80OQY7uuujFGv+Vp06TiSiBYz/EZ7Cy0akVuq4= ARC-Message-Signature: i=1; a=rsa-sha256; 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Fri, 26 Jan 2024 09:57:36 +0100 From: Yannic Moog Date: Fri, 26 Jan 2024 09:57:24 +0100 Subject: [PATCH RFC for upstream 2/4] drm/panel: simple: Add EDT ETML1010G3DRA panel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-2-8ec5b48eec05@phytec.de> References: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> In-Reply-To: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Catalin Marinas , Will Deacon CC: Primoz Fiser , , , , , , Yannic Moog X-Mailer: b4 0.12.3 X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA02Sa0iTYRTHfd7bXlejtznwUTHBsht4CTSeD5r1IXqioKQSCkWHe72gmW3T NLPspjnvgoY2nG5mpkNzauqYGSKoiEbkJcQsm9TEy5C0UjDrTSO//c7//M85/w+HJaVfKVc2 LlHNKxPlCZ6MmDK6OOz0dlC38H6GZ36of1xPIHttHkDGrmECbbwsJpGud5hGIyt2Bk2PnkP1 pZ0UKrBNk8hkHaORZu05id6ZtQyqXmqjUFZOLY3snRMA9WumaXSv5DGJHnb1itB6u4lCdatt ANlandGquZJCrfPFNMpdPIAeTAYcd8HGSiPAXd+rKNxZ8UGETfU5DJ4cszC4ciAEf8ztI3BL zR1cmPuAxj9WXtC4ebGDwIXrfrjYchvXlI0yuGUwHX8z7TnPXREHKviEuBRe6XssUhyb/VNL JdVzqX1rJiITvJZogCMLOX/YZdGRGiBmpZyBgKXW0a1iGsDu7lkguBhuH7TapmgNYFmK84L2 nF2C7MSFQtvTEVJgCbcbDpTPUIKF5A7BJrOvIJOcB2xf0G5ZwuDaW9vfLdI/rLFGCOjIhcO7 972FozJOw8A50xCzOboMoL7dazOmE8zWTxACSzl3aHuTL9rUPWDZ8By5yZdg23I7UQSkFdsC VfwPVLEtUBUg64H0alxUPK+Mi/dJik1T81E+Ct4EhGeQOYg7QIEW9wCCBT0AsqSnTOIf0MxL JQp52k1eeS1CmZzAq3qAG0t5OksaHl3gpVyMXM3H83wSr/zXJVhH10zgsdf9fa3hdMCNIqqv 9PN+w/CTyiVF8trU5UHt4MXU+JFgdxRDNYbORi3X0avpO05qX82fapS52Q8Gnw3iS0IWdOvR 1SrUVxut0xvLncLOaC0Zy02q/BBRVV2KU17OUOCGWX20ucb8KZr90nBixjKeAeQgaDH1161w FHk9K8uTUsXKjxwmlSr5b7E0Aqn6AgAA From: Primoz Fiser Add support for the EDT ETML1010G3DRA 10.1" 1280x800 LVDS panel. Datasheet can be found at [1]. [1] https://www.glynshop.com/erp/owweb/Daten/DSS/EDT/Products/Specification= s/Active%20Displays/ETML1010G3DRA%20Ver.3-RoHS.pdf Signed-off-by: Primoz Fiser Signed-off-by: Yannic Moog Reviewed-by: Jessica Zhang --- drivers/gpu/drm/panel/panel-simple.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/p= anel-simple.c index 9367a4572dcf..662cf8d10a8a 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1920,6 +1920,33 @@ static const struct panel_desc edt_etml0700y5dha =3D= { .connector_type =3D DRM_MODE_CONNECTOR_LVDS, }; =20 +static const struct display_timing edt_etml1010g3dra_timing =3D { + .pixelclock =3D { 66300000, 72400000, 78900000 }, + .hactive =3D { 1280, 1280, 1280 }, + .hfront_porch =3D { 12, 72, 132 }, + .hback_porch =3D { 86, 86, 86 }, + .hsync_len =3D { 2, 2, 2 }, + .vactive =3D { 800, 800, 800 }, + .vfront_porch =3D { 1, 15, 49 }, + .vback_porch =3D { 21, 21, 21 }, + .vsync_len =3D { 2, 2, 2 }, + .flags =3D DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW | + DISPLAY_FLAGS_DE_HIGH, +}; + +static const struct panel_desc edt_etml1010g3dra =3D { + .timings =3D &edt_etml1010g3dra_timing, + .num_timings =3D 1, + .bpc =3D 8, + .size =3D { + .width =3D 216, + .height =3D 135, + }, + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .bus_flags =3D DRM_BUS_FLAG_DE_HIGH, + .connector_type =3D DRM_MODE_CONNECTOR_LVDS, +}; + static const struct drm_display_mode edt_etmv570g2dhu_mode =3D { .clock =3D 25175, .hdisplay =3D 640, @@ -4328,6 +4355,9 @@ static const struct of_device_id platform_of_match[] = =3D { }, { .compatible =3D "edt,etml0700y5dha", .data =3D &edt_etml0700y5dha, + }, { + .compatible =3D "edt,etml1010g3dra", + .data =3D &edt_etml1010g3dra, }, { .compatible =3D "edt,etmv570g2dhu", .data =3D &edt_etmv570g2dhu, --=20 2.34.1 From nobody Mon Feb 9 10:39:03 2026 Received: from mickerik.phytec.de (mickerik.phytec.de [91.26.50.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3EC0148FF2 for ; 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X-AuditID: ac14000a-fbefe7000000290d-bc-65b3740060f3 Received: from berlix.phytec.de (Unknown_Domain [172.25.0.12]) (using TLS with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 85.F9.10509.00473B56; Fri, 26 Jan 2024 09:57:36 +0100 (CET) Received: from lws-moog.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Fri, 26 Jan 2024 09:57:36 +0100 From: Yannic Moog Date: Fri, 26 Jan 2024 09:57:25 +0100 Subject: [PATCH RFC for upstream 3/4] arm64: dts: imx8mp-phyboard-pollux-rdk: add etml panel support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-3-8ec5b48eec05@phytec.de> References: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> In-Reply-To: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Catalin Marinas , Will Deacon CC: Primoz Fiser , , , , , , Yannic Moog X-Mailer: b4 0.12.3 X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA02SeyzVYRjHvb+bnxPt14/yYrFZZjXXxnq3zNTaeldWui1rNZ1444yk42RR q5NQjnKpJZ3Jnelkw3E5GDsbKjKsQkukQzPNLYsazcrPWct/n+f7fJ/n+f7x8LQ4yTjyilgV UcbKY1w5GVPlYGHtaaGqIz4drXtR14cSCs1X3Aeoqq2PQn8ac2hU2NnHooGleQ6ZBo8i3eNm BmVOmWiknxhikWblOY3et+RzqHihgUFp6RUsmm8eBqhLY2JR8sMnNEpt67REqwY9gyqXGwCa qrdHyy0FDKqfyWFRxpw7ShnxD3LAVQVVALf9LGJws3bUEut16RweGWrlcEH3MTyW8ZrCdWW3 cFZGCot/LdWwuHauicJZqz44p/UmLssd5HBdz3X8Q+8cIpyRBUSQGEUCUXoHnpdFzRRHxvXA ay9NGUAN+m01gOeh4AfTFoI1QMaLQikFh3+3AHNhAtBo/LZWWPGcsANOTH1mJWYEN7iarKMk thUuwq5PI+tsI2yB3U+/MtJSWtgJq1u8JZkWXKBhNp82W87CxncaVrKIa6yZCJPQSjgHb9/x lK7aCRoOTut7OfPoIoAlBjeJoWAL75YMr18She1wqv+BpVl3gbl907SZT8GGRQOVDUTthkDa /4G0GwIVAVoHxEuK8GiiVER7xUUlqki4VwTRA+kX7CxkTSAzH7cDigftAPK0q52Nn38tEW0i 5IlJRHk5THk1hsS3AyeecbW3eXHvBBGFSLmKRBMSR5T/uhRv5agGqcLB2T1+K85az5BAxnnA zTbY4Yg67a3Cad8rkvBlbLy4jX0zWhm2ySOpPGDyUeNhWF14oPZZWcIVY7JvzXyR7+5efjRI NR4QEfoxJq8S+HdmG7cdz9sqJpXXfa/puNCnsnZHeftvROk2N816HIoL9TOlcWpiPH3SWm1Q WZVOujLxUXLfXbQyXv4XFZ/FxvkCAAA= The imx8mp-phyboard-pollux has on-board lvds interface connections. An edt,etml1010g3dra panel is supported for this interface. Add device tree nodes for backlight and panel. Signed-off-by: Yannic Moog --- .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 74 ++++++++++++++++++= ++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b= /arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index c8640cac3edc..9e8afceba65e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -19,6 +19,30 @@ chosen { stdout-path =3D &uart1; }; =20 + backlight_lvds: backlight { + compatible =3D "pwm-backlight"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lvds1>; + brightness-levels =3D <0 4 8 16 32 64 128 255>; + default-brightness-level =3D <11>; + enable-gpios =3D <&gpio2 20 GPIO_ACTIVE_LOW>; + num-interpolated-steps =3D <2>; + power-supply =3D <®_lvds1_reg_en>; + pwms =3D <&pwm3 0 50000 0>; + }; + + panel1_lvds: panel-lvds { + compatible =3D "edt,etml1010g3dra"; + backlight =3D <&backlight_lvds>; + power-supply =3D <®_vcc_3v3_sw>; + + port { + panel1_in: endpoint { + remote-endpoint =3D <&ldb_lvds_ch1>; + }; + }; + }; + reg_can1_stby: regulator-can1-stby { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; @@ -39,6 +63,15 @@ reg_can2_stby: regulator-can2-stby { regulator-name =3D "can2-stby"; }; =20 + reg_lvds1_reg_en: regulator-lvds1 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio1 9 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt =3D <1200000>; + regulator-min-microvolt =3D <1200000>; + regulator-name =3D "lvds1_reg_en"; + }; + reg_usb1_vbus: regulator-usb1-vbus { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; @@ -61,6 +94,13 @@ reg_usdhc2_vmmc: regulator-usdhc2 { startup-delay-us =3D <100>; off-on-delay-us =3D <12000>; }; + + reg_vcc_3v3_sw: regulator-vcc-3v3-sw { + compatible =3D "regulator-fixed"; + regulator-name =3D "VCC_3V3_SW"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; }; =20 &eqos { @@ -135,10 +175,32 @@ led-3 { }; }; =20 +&lcdif2 { + status =3D "okay"; +}; + +&lvds_bridge { + status =3D "okay"; + + ports { + port@2 { + ldb_lvds_ch1: endpoint { + remote-endpoint =3D <&panel1_in>; + }; + }; + }; +}; + &snvs_pwrkey { status =3D "okay"; }; =20 +&pwm3 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm3>; +}; + /* debug console */ &uart1 { pinctrl-names =3D "default"; @@ -289,6 +351,18 @@ MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x1e2 >; }; =20 + pinctrl_lvds1: lvds1grp { + fsl,pins =3D < + MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x12 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins =3D < + MX8MP_IOMUXC_SPDIF_TX__PWM3_OUT 0x12 + >; + }; + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins =3D < MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 --=20 2.34.1 From nobody Mon Feb 9 10:39:03 2026 Received: from mickerik.phytec.de (mickerik.phytec.de [91.26.50.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9495D41C72 for ; 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X-AuditID: ac14000a-fbefe7000000290d-bd-65b37401dcb5 Received: from berlix.phytec.de (Unknown_Domain [172.25.0.12]) (using TLS with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 27.F9.10509.10473B56; Fri, 26 Jan 2024 09:57:37 +0100 (CET) Received: from lws-moog.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Fri, 26 Jan 2024 09:57:36 +0100 From: Yannic Moog Date: Fri, 26 Jan 2024 09:57:26 +0100 Subject: [PATCH RFC for upstream 4/4] arm64: defconfig: enable i.MX8MP ldb bridge Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-4-8ec5b48eec05@phytec.de> References: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> In-Reply-To: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Catalin Marinas , Will Deacon CC: Primoz Fiser , , , , , , Yannic Moog X-Mailer: b4 0.12.3 X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA02SbSyVYRjH3c+bx6nTnh7KTQsZ6c1LTXZ/qFattduXVOpDlumMezkjzo6j JVtFp+QQqaWRnRASGo6XwxnZRDmzWPNSeclMNS/FzNuI5Oms5dvv+l//67r+Hy6eFr8xjrwy SkPUUYpIV07GlDlYbfQEmirik6LdgNo+5lNoqigVoLLGDgqt1mbQ6FlLB4u656Y4NNwTgEoe 1zMobXSYRoaRXhbpll7SqMuUw6G86RoG3U0uYtFUfR9AbbphFiU+fEKjO40t1mjFaGBQ8WIN QKPV9mjRpGdQ9Y8MFqVMeiDtwMGjDrhMXwZw43wug+uzB62xoSSZwwO9DRzWm8/goZR3FK4q uInTU7QsXpirYHHlZB2F01d8cEbDDVyQ2cPhqvZ4PGNwOi0EyQ6FkUjlVaL2PnJJFq41VdKq FvbazCO3W2Cc0QEbHgq+8LNueY1lvCg8p2CS+a21pRgGsKlpDEguTnCDI6NfWB3geUZwh7++ H5dkWyEQ9mjNfxfJhc3QnPWVkSy0sBuWm7wlmRacofFnDi3JcuEiHHsdK6G4hrqREAlthGCY cNtTumkn6Dg4YXjPWSZnAcw3ultS2sKk/D5KYlHYDkc771tbdGeY2TFBW/g8rJk1Ug+AmL0u T/b/PNnr8uQCugSIV5ShEUStjPBShcdpSKhXGDEA6RXsrGR1IC0HNwOKB80A8rSrndz3YCUR 5WGKuOtEHR2ijo0kMc1gG8+42stL7wUSUbis0JAIQlRE/a9L8TaOt0Dq/HJFQnGwb+0+F6c8 uwt9LzY0xE76rAR4+C/VGNnfy8auVV3UicHozMKnxcd6HQLV43WtnfGiauZNoZC4I0Hf6K/a 2bopWraQpY0U2bP1+vyEglOm/iFmKOlV967+UqRXsgufiNmP4uwrptvLz6Xt/eAXtIVsPXnD 5fAcfcCViQlX7N9Dq2MUfwBl3OZO+AIAAA== Enable the i.MX8MP LDB driver used for display support of the i.MX8MP LVDS interface. Signed-off-by: Yannic Moog --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b60aa1f89343..acd71548cf29 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -850,6 +850,7 @@ CONFIG_DRM_PANEL_RAYDIUM_RM67191=3Dm CONFIG_DRM_PANEL_SITRONIX_ST7703=3Dm CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=3Dm CONFIG_DRM_PANEL_VISIONOX_VTDR6130=3Dm +CONFIG_DRM_FSL_LDB=3Dm CONFIG_DRM_LONTIUM_LT8912B=3Dm CONFIG_DRM_LONTIUM_LT9611=3Dm CONFIG_DRM_LONTIUM_LT9611UXC=3Dm --=20 2.34.1