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Peter Anvin" , Daniel Lezcano , Feng Tang , Peter Zijlstra , linux-kernel@vger.kernel.org Subject: [PATCH v2] clocksource: disable watchdog checks on TSC when TSC is watchdog Message-ID: <20240124144621.GA5998@incl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) X-Spam-Level: Authentication-Results: smtp-out1.suse.de; dkim=pass header.d=suse.de header.s=susede2_rsa header.b=qhX3uEJK; dkim=pass header.d=suse.de header.s=susede2_ed25519 header.b=NvH05ak7 X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-6.01 / 50.00]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; MIME_GOOD(-0.10)[text/plain]; DWL_DNSWL_MED(-2.00)[suse.de:dkim]; NEURAL_HAM_SHORT(-0.20)[-1.000]; RCVD_COUNT_THREE(0.00)[3]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; DKIM_TRACE(0.00)[suse.de:+]; MX_GOOD(-0.01)[]; RCPT_COUNT_TWELVE(0.00)[12]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:dkim,suse.de:email]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; MID_RHS_NOT_FQDN(0.50)[]; RCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from] X-Spam-Score: -6.01 X-Rspamd-Queue-Id: 51FB322308 X-Spam-Flag: NO Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Change the semantics of the tsc=3Dwatchdog option to always remove the CLOCK_SOURCE_MUST_VERIFY bit from the TSC clocksource so as to provide an alternative to the tsc=3Dnowatchdog option, which is used routinely to prevent switches to the HPET clocksource on machines with hardware issues. Currently, the TSC does not get checked on machines with a stable TSC (4 NUMA nodes or less, CONSTANT_TSC, NONSTOP_TSC and TSC_ADJUST), and the tsc=3Dwatchdog option allows one to have the PMTMR (acpi_pm) checked instead. There are production machines that do not quality for having the clocksource watchdog disabled (usually on account of having more than 4 NUMA nodes) and that also may have a malfunctioning CPU that causes a watchdog check failure in a few days after a reboot resulting in the current clocksource being switched to the HPET. Solving a hardware issue or replacing the machine may take an inordinate amount of time, while the production machine is still needed to do its job. It is possible to pass tsc=3Dnowatchdog to the kernel, which disables the clocksource watchdog on the TSC, effectively leaving the operator of the production machine blind to any clocksource malfunction. The sematics of the recently introduced tsc=3Dwatchdog option, 0051293c5330 ("clocksource: Enable TSC watchdog checking of HPET and PMTMR only when requested"), is changed by this patch so that the TSC does not get checked when tsc=3Dwatchdog is specified regardless of the TSC passing or not passing the criteria for being judged to be stable. This way, the TSC acts as a watchdog checking other clocksources (HPET, PMTMR) and a failed check does not result in the current clocksource (TSC) getting marked unstable. Passing tsc=3Dwatchdog has the advantange of the operator being informed that the machine may be experiencing clocksource issues. There is one side effect of the semantic change of tsc=3Dwatchdog - it fixes the HPET not having its CLOCK_SOURCE_MUST_VERIFY bit set as intended by efc8b329c7fd ("clocksource: Verify HPET and PMTMR when TSC unverified"). When the system is booting up, the HPET does not have its CLOCK_SOURCE_MUST_VERIFY bit set on account of the order in which clocksources are initialized in x86_late_time_init(). The HPET initialization and clocksource registration always comes before the TSC init function unsets the CLOCK_SOURCE_MUST_VERIFY bit. Fixes: efc8b329c7fd ("clocksource: Verify HPET and PMTMR when TSC unverifie= d") Signed-off-by: Jiri Wiesner --- v2: the changelog was updated to improve intelligibility Documentation/admin-guide/kernel-parameters.txt | 9 +++++---- arch/x86/include/asm/time.h | 2 +- arch/x86/kernel/hpet.c | 2 +- arch/x86/kernel/tsc.c | 7 +++---- drivers/clocksource/acpi_pm.c | 2 +- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index 31b3a25680d0..860896571c04 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6722,10 +6722,11 @@ obtained from HW or FW using either an MSR or CPUID(0x15). Warn if the difference is more than 500 ppm. [x86] watchdog: Use TSC as the watchdog clocksource with - which to check other HW timers (HPET or PM timer), but - only on systems where TSC has been deemed trustworthy. - This will be suppressed by an earlier tsc=3Dnowatchdog and - can be overridden by a later tsc=3Dnowatchdog. A console + which to check other HW timers (HPET or PM timer). + TSC is not checked by the watchdog, even on systems + where TSC has not been deemed trustworthy. This will be + suppressed by an earlier tsc=3Dnowatchdog and can be + overridden by a later tsc=3Dnowatchdog. A console message will flag any such suppression or overriding. =20 tsc_early_khz=3D [X86] Skip early TSC calibration and use the given diff --git a/arch/x86/include/asm/time.h b/arch/x86/include/asm/time.h index f360104ed172..c2364b74a318 100644 --- a/arch/x86/include/asm/time.h +++ b/arch/x86/include/asm/time.h @@ -7,7 +7,7 @@ =20 extern void hpet_time_init(void); extern bool pit_timer_init(void); -extern bool tsc_clocksource_watchdog_disabled(void); +extern bool tsc_clocksource_as_watchdog(void); =20 extern struct clock_event_device *global_clock_event; =20 diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index a38d0c93a66e..46f2b4ffdba7 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c @@ -1091,7 +1091,7 @@ int __init hpet_enable(void) if (!hpet_counting()) goto out_nohpet; =20 - if (tsc_clocksource_watchdog_disabled()) + if (tsc_clocksource_as_watchdog()) clocksource_hpet.flags |=3D CLOCK_SOURCE_MUST_VERIFY; clocksource_register_hz(&clocksource_hpet, (u32)hpet_freq); =20 diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 15f97c0abc9d..ec1860178ea1 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1221,10 +1221,9 @@ static void __init tsc_disable_clocksource_watchdog(= void) clocksource_tsc.flags &=3D ~CLOCK_SOURCE_MUST_VERIFY; } =20 -bool tsc_clocksource_watchdog_disabled(void) +bool tsc_clocksource_as_watchdog(void) { - return !(clocksource_tsc.flags & CLOCK_SOURCE_MUST_VERIFY) && - tsc_as_watchdog && !no_tsc_watchdog; + return tsc_as_watchdog && !no_tsc_watchdog; } =20 static void __init check_system_tsc_reliable(void) @@ -1609,7 +1608,7 @@ void __init tsc_init(void) return; } =20 - if (tsc_clocksource_reliable || no_tsc_watchdog) + if (tsc_clocksource_reliable || no_tsc_watchdog || tsc_as_watchdog) tsc_disable_clocksource_watchdog(); =20 clocksource_register_khz(&clocksource_tsc_early, tsc_khz); diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c index 82338773602c..9b5dad94713e 100644 --- a/drivers/clocksource/acpi_pm.c +++ b/drivers/clocksource/acpi_pm.c @@ -211,7 +211,7 @@ static int __init init_acpi_pm_clocksource(void) return -ENODEV; } =20 - if (tsc_clocksource_watchdog_disabled()) + if (tsc_clocksource_as_watchdog()) clocksource_acpi_pm.flags |=3D CLOCK_SOURCE_MUST_VERIFY; return clocksource_register_hz(&clocksource_acpi_pm, PMTMR_TICKS_PER_SEC); } --=20 2.35.3 --=20 Jiri Wiesner SUSE Labs