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[78.45.66.209]) by smtp.gmail.com with ESMTPSA id dj17-20020a05640231b100b00559bb146ecbsm9637914edb.6.2024.01.23.19.00.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jan 2024 19:00:14 -0800 (PST) From: Erico Nunes To: Qiang Yu , anarsoul@gmail.com, christian.koenig@amd.com, dri-devel@lists.freedesktop.org, lima@lists.freedesktop.org Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Sumit Semwal , linux-kernel@vger.kernel.org, Erico Nunes Subject: [PATCH v2 7/8] drm/lima: increase default job timeout to 10s Date: Wed, 24 Jan 2024 03:59:46 +0100 Message-ID: <20240124025947.2110659-8-nunes.erico@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240124025947.2110659-1-nunes.erico@gmail.com> References: <20240124025947.2110659-1-nunes.erico@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The previous 500ms default timeout was fairly optimistic and could be hit by real world applications. Many distributions targeting devices with a Mali-4xx already bumped this timeout to a higher limit. We can be generous here with a high value as 10s since this should mostly catch buggy jobs like infinite loop shaders, and these don't seem to happen very often in real applications. Signed-off-by: Erico Nunes --- drivers/gpu/drm/lima/lima_sched.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_= sched.c index c2e78605e43e..00b19adfc888 100644 --- a/drivers/gpu/drm/lima/lima_sched.c +++ b/drivers/gpu/drm/lima/lima_sched.c @@ -505,7 +505,7 @@ static void lima_sched_recover_work(struct work_struct = *work) int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name) { unsigned int timeout =3D lima_sched_timeout_ms > 0 ? - lima_sched_timeout_ms : 500; + lima_sched_timeout_ms : 10000; =20 pipe->fence_context =3D dma_fence_context_alloc(1); spin_lock_init(&pipe->fence_lock); --=20 2.43.0