From nobody Thu Dec 25 01:28:35 2025 Received: from eggs.gnu.org (eggs.gnu.org [209.51.188.92]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5E6339AF6; Mon, 22 Jan 2024 09:53:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.51.188.92 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705917217; cv=none; b=j+nsDb3TIWXBFk1T/34irSOn1BU16XhBZzSnWu8Xsr0DXhl02WPOv4228U5s+B0QxIBpDB8d0qwJIGlCk1vNrI92j15fHHiElwE/eS0itTT5AcbrY2r25qAh0VuxiglmVgP0uRN60QSD/AOtarV2fZWV77qRopQVV4sHw3i53Ho= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705917217; c=relaxed/simple; bh=kJVxuLKP5/Z88ANSM4+a7AaBGp1c1zLFsdwtovKAask=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QyHSVvtFvxehd45xDT5LDe7WOM9Veju1k6cZDcYJaBBl2+2mUGDM6z0+8AqGBPTdTgT04ciMV1UI1gnd4MXeSiDCDcC91yL2omX+o1Ta5pXxmA/RdeAwJYUjAgq8o1eVBF0AW4cbRYSSuZv4Uy1B7gnHEtj/stkG/MxfqAlz4Ik= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gnu.org; spf=pass smtp.mailfrom=gnu.org; dkim=pass (2048-bit key) header.d=gnu.org header.i=@gnu.org header.b=cqaWZGyA; arc=none smtp.client-ip=209.51.188.92 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gnu.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gnu.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gnu.org header.i=@gnu.org header.b="cqaWZGyA" Received: from fencepost.gnu.org ([2001:470:142:3::e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rRqzl-00047v-Aj; Mon, 22 Jan 2024 04:53:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=gnu.org; s=fencepost-gnu-org; h=MIME-Version:References:In-Reply-To:Date:Subject:To: From; bh=Nu73J2+itShKzZjYU3N4YG8o/iU7VMkly5/BSbm9Wwc=; b=cqaWZGyAV3q2Gh9pSSEV 04Pep/qRPrVSqFE6Xbl9MeucDfljVBU4OshfrdWqXkRxerzkRDxo5Jy38aVa37+H+sc1FTeBbpfvZ ktNRQrBfA6oz/dSpFENB+TncfA+3dDpb2nlyf1hn9RlmP5kSc0ZPESY0eWIOAMlUZV/McR2Hzryh3 OBoVOdlUG97+54yJU2XtTOhMrGtvZZ4m+KAD7oEQS2nTpDwfQmV25Pw/UrvvZksAq9d8qzURKbH0M gg11yj2GLpsq2c4F0R3l78RL7LfL0aIXn67X4S5LccGA8g5BrGl2j5Lj2rJi0gptuhxXO36Df9oV2 m+pi1ncqmgEdZA==; From: Mathieu Othacehe To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang , Primoz Fiser , Stefan Wahren , Christoph Stoidner , Wadim Egorov Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mathieu Othacehe , Conor Dooley Subject: [PATCH v4 1/3] dt-bindings: arm: fsl: Add phyBOARD-Segin-i.MX93 Date: Mon, 22 Jan 2024 10:53:04 +0100 Message-ID: <20240122095306.14084-2-othacehe@gnu.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240122095306.14084-1-othacehe@gnu.org> References: <20240122095306.14084-1-othacehe@gnu.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for phyBOARD-Segin-i.MX93 board. Acked-by: Conor Dooley Signed-off-by: Mathieu Othacehe --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 228dcc5c7d6f..b6c523d02d29 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1275,6 +1275,12 @@ properties: - const: tq,imx93-tqma9352 # TQ-Systems GmbH i.MX93 TQMa9= 3xxCA/LA SOM - const: fsl,imx93 =20 + - description: PHYTEC phyCORE-i.MX93 SoM based boards + items: + - const: phytec,imx93-phyboard-segin # phyBOARD-Segin with i.MX93 + - const: phytec,imx93-phycore-som # phyCORE-i.MX93 SoM + - const: fsl,imx93 + - description: Freescale Vybrid Platform Device Tree Bindings =20 --=20 2.41.0 From nobody Thu Dec 25 01:28:35 2025 Received: from eggs.gnu.org (eggs.gnu.org [209.51.188.92]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E85C39FC3; Mon, 22 Jan 2024 09:53:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.51.188.92 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705917217; cv=none; b=GgRPbmNqhG9XPUCViNRCGwWjhwk3VWUPQMwZdPZ2VgJNwx0UxTtK91w7wwdvKVnN932sri/RntzmaYab7CJr3WXpYq2dDQxWPsPVpQVO8LQTvT53iK48vq+J80LdTKVlcqWzdAZ6h2fzVkr2dWwnf2zEq29/fqQX/L64YSg+iII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705917217; c=relaxed/simple; bh=sfyh7/gLKYxxuboiK3zT/5XmqYjrJvczBUlpB/LH6q0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=guqx3ximy11B7NW7eJIZXxojFhiIt6pHIQLeSbCX8ZeWBNjFPsdZjayuu7ZNu61Nj4LHhQk4WB+FkwhOE14ql3+oeNxV2WqjYfHsx4XQ1Q781ofJmQ7DwQpFNmXOicLhC+PAHlIppBYpBx1RjU8qUglbrF+OcTTPaYUfUmsLaj4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gnu.org; spf=pass smtp.mailfrom=gnu.org; dkim=pass (2048-bit key) header.d=gnu.org header.i=@gnu.org header.b=Zw7wu0me; arc=none smtp.client-ip=209.51.188.92 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gnu.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gnu.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gnu.org header.i=@gnu.org header.b="Zw7wu0me" Received: from fencepost.gnu.org ([2001:470:142:3::e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rRqzn-00048O-8D; Mon, 22 Jan 2024 04:53:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=gnu.org; s=fencepost-gnu-org; h=MIME-Version:References:In-Reply-To:Date:Subject:To: From; bh=sMwcexRbUI9Js5cFPJsZsAgHJicXn+z+DkE8WWA9a/g=; b=Zw7wu0me4vCUwPXsjsVs YLBOyhkRe9C0I32Fqn02h4uOh5g9qknT9vbq7hqpOyquylOOUPqA2y79IrNcTK4oh+iMTb40DKijs bYaPXlpXKXpCvTpljk4WEuDlKGlCwwZk25H35m/Fc64yyqULm7t0nrBYMmGK4A4Iyj6rKBLNEHbCq 8AT87FQ6m/+pb2umrevBa/waWlt0plR9sGXchz+W8WLBCj+/LUUHIxx9LNKSitCzQDy17iIfxieu5 iCA002RJ7Ps+n2gWIKdLvRrUNLO+4HMEgn06Z589V/7vorrUe6GhU/Pj/+wCt1CHf7ByZtRL+zOEY BLO10UrVVFCC8g==; From: Mathieu Othacehe To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang , Primoz Fiser , Stefan Wahren , Christoph Stoidner , Wadim Egorov Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mathieu Othacehe Subject: [PATCH v4 2/3] dt-bindings: gpio: gpio-vf610: add gpio-line-names Date: Mon, 22 Jan 2024 10:53:05 +0100 Message-ID: <20240122095306.14084-3-othacehe@gnu.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240122095306.14084-1-othacehe@gnu.org> References: <20240122095306.14084-1-othacehe@gnu.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Describe common "gpio-line-names" property to fix dtbs_check warnings like: /home/mathieu/linux/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dtb: gpio@43830000: 'gpio-line-names' does not match any of the regexes: '^.+-hog(-[0-9]+)?$', 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/gpio/gpio-vf610.yaml# Signed-off-by: Mathieu Othacehe Acked-by: Conor Dooley --- Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Docum= entation/devicetree/bindings/gpio/gpio-vf610.yaml index a27f92950257..7230ba1a386a 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml @@ -50,6 +50,7 @@ properties: const: 2 =20 gpio-controller: true + gpio-line-names: true =20 clocks: items: --=20 2.41.0 From nobody Thu Dec 25 01:28:35 2025 Received: from eggs.gnu.org (eggs.gnu.org [209.51.188.92]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EB7439FF9; Mon, 22 Jan 2024 09:53:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.51.188.92 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705917220; cv=none; b=OVQtGkbPWTepzR0T5kN5bX5a9Ip51qkMrEGlmz/hjAoH8MzUSZqkbumCPRHs49YcAk0Dh177fRGtdE8jkkPQCMwq1yNx4VCNuvRfw4/QVuw38EbdzaipWaNi4d9B9Va5ZG36HI2im8AcveB2YxzHYj87fizpG/sTcYc8KGEYNyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705917220; c=relaxed/simple; bh=/4UYVWoRDV+kEO3U8Y1l39uRpYsiH1KNcPCNJ5mLcgE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XS54VqD6qsXNtmMasHWCLXXkyilTUHJNecPAhXAdf4/sm12RUjwgkPyKdlx0pO9YzSobTVZAX5iWCb7qlu0NvLQuPwVpjzQqBtuyzEn6aUOg59fVMmqLCYUbYW9KSdeHTCyel/vrpX0a3w5zErRPgOYLFyo9/Fy9rFvCrVaXuSc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gnu.org; spf=pass smtp.mailfrom=gnu.org; dkim=pass (2048-bit key) header.d=gnu.org header.i=@gnu.org header.b=oqpnkX0U; arc=none smtp.client-ip=209.51.188.92 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gnu.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gnu.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gnu.org header.i=@gnu.org header.b="oqpnkX0U" Received: from fencepost.gnu.org ([2001:470:142:3::e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rRqzp-00048s-Id; Mon, 22 Jan 2024 04:53:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=gnu.org; s=fencepost-gnu-org; h=MIME-Version:References:In-Reply-To:Date:Subject:To: From; bh=nrund9baS9Vmb7CoYoNskY55PsEFb9lHldK7YlvotBA=; b=oqpnkX0UfNsYYvWB5tXK +SQyipP69BPvstoBgNagTLpltYVqgO1LZiYQCRFkl5bazV8A77eiFm+gTOLvdujq2Latp1K6hOj05 7k3lp2rszUIHqTGUOD7EmZfU52L/Kyqz8RUAgbGk5SIKf4OgipRpjaLvhPJd1uumUcXpP4TLUJ0Fp 72Ukh1b0XU4dNmKTtH2wDTgPU9YoAu6dhIRb109CJwZh0/lA1XwzqQaTCYI2q7+8UnuyioDc9kGFN 8p4btZkeHc59gvOkFW1RwJzjdNkIZqGVZwlzgUYGQoofdwcZ6NNaqVp0OJHdTcmws6cMPeI0d1UOA sFuhGWpCpe9Ayg==; From: Mathieu Othacehe To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang , Primoz Fiser , Stefan Wahren , Christoph Stoidner , Wadim Egorov Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mathieu Othacehe Subject: [PATCH v4 3/3] arm64: dts: imx93: Add phyBOARD-Segin-i.MX93 support Date: Mon, 22 Jan 2024 10:53:06 +0100 Message-ID: <20240122095306.14084-4-othacehe@gnu.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240122095306.14084-1-othacehe@gnu.org> References: <20240122095306.14084-1-othacehe@gnu.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add basic support for phyBOARD-Segin-i.MX93. Main features are: * eMMC * Ethernet * SD-Card * UART Signed-off-by: Mathieu Othacehe Tested-by: Primoz Fiser --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx93-phyboard-segin.dts | 141 ++++++++++++++++++ .../boot/dts/freescale/imx93-phycore-som.dtsi | 127 ++++++++++++++++ 3 files changed, 269 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 2e027675d7bb..65db918c821c 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -201,6 +201,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-iris-v2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-mek.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8ulp-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-11x11-evk.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxca.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxla.dtb =20 diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/= arm64/boot/dts/freescale/imx93-phyboard-segin.dts new file mode 100644 index 000000000000..5433c33d1322 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 PHYTEC Messtechnik GmbH + * Author: Wadim Egorov , Christoph Stoidner + * Copyright (C) 2024 Mathieu Othacehe + * + * Product homepage: + * phyBOARD-Segin carrier board is reused for the i.MX93 design. + * https://www.phytec.de/produkte/single-board-computer/phyboard-segin-imx= 6ul/ + */ + +#include "imx93-phycore-som.dtsi" + +/{ + model =3D "PHYTEC phyBOARD-Segin-i.MX93"; + compatible =3D "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som", + "fsl,imx93"; + + chosen { + stdout-path =3D &lpuart1; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_reg_usdhc2_vmmc>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "VCC_SD"; + }; +}; + +/* GPIOs */ +&gpio1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio1>; + gpio-line-names =3D "X_GPIO1_3"; +}; + +&gpio4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio4>; + gpio-line-names =3D "", "", "", "", "", "", "", "X_GPIO5_9"; +}; + +/* Console */ +&lpuart1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart1>; + status =3D "okay"; +}; + +/* eMMC */ +&usdhc1 { + no-1-8-v; +}; + +/* SD-Card */ +&usdhc2 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc2_default>, <&pinctrl_usdhc2_cd>; + pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>; + pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>; + bus-width =3D <4>; + cd-gpios =3D <&gpio3 0 GPIO_ACTIVE_LOW>; + no-mmc; + no-sdio; + vmmc-supply =3D <®_usdhc2_vmmc>; + status =3D "okay"; +}; + +&iomuxc { + pinctrl_gpio1: gpio1grp { + fsl,pins =3D < + MX93_PAD_I2C1_SCL__GPIO1_IO00 0x10 + >; + }; + + pinctrl_gpio4: gpio4grp { + fsl,pins =3D < + MX93_PAD_ENET1_TXC__GPIO4_IO07 0x10 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins =3D < + MX93_PAD_UART1_RXD__LPUART1_RX 0x31e + MX93_PAD_UART1_TXD__LPUART1_TX 0x30e + >; + }; + + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { + fsl,pins =3D < + MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e + >; + }; + + pinctrl_usdhc2_cd: usdhc2cdgrp { + fsl,pins =3D < + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e + >; + }; + + pinctrl_usdhc2_default: usdhc2grp { + fsl,pins =3D < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp { + fsl,pins =3D < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp { + fsl,pins =3D < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x178e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/ar= m64/boot/dts/freescale/imx93-phycore-som.dtsi new file mode 100644 index 000000000000..439ea4176f8c --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 PHYTEC Messtechnik GmbH + * Author: Wadim Egorov , Christoph Stoidner + * Copyright (C) 2024 Mathieu Othacehe + * + * Product homepage: + * https://www.phytec.de/produkte/system-on-modules/phycore-imx-91-93/ + */ +/dts-v1/; + +#include + +#include "imx93.dtsi" + +/{ + model =3D "PHYTEC phyCORE-i.MX93"; + compatible =3D "phytec,imx93-phycore-som", "fsl,imx93"; + + reserved-memory { + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + + linux,cma { + compatible =3D "shared-dma-pool"; + reusable; + alloc-ranges =3D <0 0x80000000 0 0x40000000>; + size =3D <0 0x10000000>; + linux,cma-default; + }; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_leds>; + + led-0 { + color =3D ; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio1 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; +}; + +/* Ethernet */ +&fec { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_fec>; + phy-mode =3D "rmii"; + phy-handle =3D <ðphy1>; + fsl,magic-packet; + assigned-clocks =3D <&clk IMX93_CLK_ENET_TIMER1>, + <&clk IMX93_CLK_ENET_REF>, + <&clk IMX93_CLK_ENET_REF_PHY>; + assigned-clock-parents =3D <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>, + <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>, + <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates =3D <100000000>, <50000000>, <50000000>; + status =3D "okay"; + + mdio: mdio { + clock-frequency =3D <5000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + ethphy1: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <1>; + }; + }; +}; + +/* eMMC */ +&usdhc1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usdhc1>; + bus-width =3D <8>; + non-removable; + status =3D "okay"; +}; + +/* Watchdog */ +&wdog3 { + status =3D "okay"; +}; + +&iomuxc { + pinctrl_fec: fecgrp { + fsl,pins =3D < + MX93_PAD_ENET2_MDC__ENET1_MDC 0x50e + MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x502 + MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e + MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e + MX93_PAD_ENET2_RXC__ENET1_RX_ER 0x5fe + MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e + MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x50e + MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x50e + MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x50e + MX93_PAD_ENET2_TD2__ENET1_TX_CLK 0x4000050e + >; + }; + + pinctrl_leds: ledsgrp { + fsl,pins =3D < + MX93_PAD_I2C1_SDA__GPIO1_IO01 0x31e + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins =3D < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x179e + MX93_PAD_SD1_CMD__USDHC1_CMD 0x1386 + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x1386 + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x138e + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x1386 + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x1386 + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x1386 + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x1386 + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x1386 + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + >; + }; +}; --=20 2.41.0