From nobody Thu Dec 25 03:19:46 2025 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 063CE364D5 for ; Mon, 22 Jan 2024 08:47:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705913245; cv=none; b=pCPmDUkZ8HiqbzmIsxqenZolYq+gybPnPNRWr0H893+Qx6glV8/OhUwgBEC3j92RaidNsD+cg5KkyEC3u+6W/omyziQy3icTIoyXLYS4yJ6cwwDcETdD/7wTpwMSjVWiU84Sby6LmJDeyxbvvKmlU7B+LEEr/PMeBvnsRUjVpsw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705913245; c=relaxed/simple; bh=7tUdhB5Hjq9r5i/bI7pjQefXP4gx7LfsrRrId2oYhB4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Vl5y7U/pEUiWhSrOn35hlx6+s1whYyfcoYJeLOyP8qlKbKcjBTGmX1brp5A7sLivBVMFQEMIQvHB0Fy6/FNu+aoMxTr58WnuElfA8r2OlOfQLe1fu95YFCQMh8474ObrDQQUlA5i2Q5IXA35rNDhJ9rub66hkarai5LRZjhSJpk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=UIRNbueL; arc=none smtp.client-ip=209.85.218.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="UIRNbueL" Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-a3082d450adso19453766b.1 for ; Mon, 22 Jan 2024 00:47:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705913242; x=1706518042; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pGozEijrd2enh9tKEhmSTYLHZEfP085NRkmYnjnJTF4=; b=UIRNbueL1doiIfMd2q2A+2Lu2m4care/KTAklDtQZtKyYIey7A8Q1Mh6bMcwLcyttV F4rdqEki/C5jqMpdOGWx0zQ77UnsPzOYrf7Mj04l6UIst2hX6o9+RFR6KUTuaG3RB5PY WY3U8IA7UKyCGOzouMbE5zPw7LIptermJOJGQJxY6IxiUsp0+2YtB4f3NqvqQ+JrP1Iy 2r7Afyq9OUb6t9bAs9O/nCzU/F6tcoKEUjHTV507/4MuE5tm+t6uwoBIXs/cgs1SuOd4 YW3h/Rx6A/CzbkeHmHulc0SZVlBTQ+MgD2u4sgUvdtBiEu5N/5ojl/v2x/QH6P2G0i9p 5kLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705913242; x=1706518042; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pGozEijrd2enh9tKEhmSTYLHZEfP085NRkmYnjnJTF4=; b=IqoId9Gk2Bla9iWZ/dDXzVEuBCxeWpf/u4/p7M+lj5T3gRQOfWf64pp4+DKpYxNLQY 7TeSs7ozke5vl0KXs4K201XXz0lmiIl7clvm6P5hnA9mYUJ2N0c8c1QG9Fi/CzeGXNat dqi538ofM6t4lcbxpWZ8uX80mSxMoDfedBxcpKthIVAwai9UzN3DSP5JZAhJmk0ioECS TIA1nuh3xnibWNd4deirnHe2CeiI4hafcvtGi+DGKRIfuh9bslt1cBJvDtfwpIAkgAK0 xJJiWNPi3YOyV4cskNUjHtGN3ERWJoXbkNwOhMzZU2vclnCxIHmjcdi+WDsgTBYEM5Bf pdjg== X-Gm-Message-State: AOJu0Yz3pjdHK3OOCufP7RUBB7oA/DTpezvxSzcpyoPpCvcJNag7eCuV SwLonnLc8CHmeiOGDA8aZa8MB2wBVtQoC7azTrm/+xW9OuYe5P9tJW4MZf5Xcdg= X-Google-Smtp-Source: AGHT+IFVDm8CN995I0lrqyfm+4wxfcm+CrrDfUW7HOJYqkqQ993/J3bNWzJtsiDseke/grFBtkXYkA== X-Received: by 2002:a17:907:c249:b0:a30:6016:89da with SMTP id tj9-20020a170907c24900b00a30601689damr409761ejc.45.1705913242247; Mon, 22 Jan 2024 00:47:22 -0800 (PST) Received: from [127.0.1.1] ([79.115.23.25]) by smtp.gmail.com with ESMTPSA id b21-20020a17090630d500b00a2c4c23cd12sm13075462ejb.217.2024.01.22.00.47.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 00:47:21 -0800 (PST) From: Abel Vesa Date: Mon, 22 Jan 2024 10:47:01 +0200 Subject: [PATCH v4 1/5] PM: domains: Allow devices attached to genpd to be managed by HW Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240122-gdsc-hwctrl-v4-1-9061e8a7aa07@linaro.org> References: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> In-Reply-To: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> To: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , Pavel Machek , Len Brown , Greg Kroah-Hartman , Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , Taniya Das , Jagadeesh Kona , Dmitry Baryshkov Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org, Abel Vesa X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=5610; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=awkvV2DdUJnYuJXVb0EJKbDlz6Jjymy9CH2d16MF0H4=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBlriuPJ/oKq/9J/hlzle55QekASipW8hs2YpQ+H imOfR4YMd+JAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZa4rjwAKCRAbX0TJAJUV Vs9NEACe5dQjlAid71quApVBhRd9B4iOugaAxcj9GPY+LeWqTDt0KDK/qbbLV0GaNNzWYxv1u3/ bOaSpBp9aHgEAjaPqfi1tSwY2VHXPrXmNqqgPDBxDR9N0Loze53ninXGRNY1JEvwjPoxjlu9JQS 05HO1F76KHGcHQwqEtxzG74/v0CPhA1Lvt2N1/l/rNZ5N21RWXt0MyPQW7hfxQyTTc8HDLOtZ0r tCrqvFLxzkqe8P/OQNptL9GpZUf+qEkZPmiO2a4lFd8FNdt4aEz15+7YgOWCXqMWuNaI4o6I5d3 lQDd9ujLjB9W1HioRxjEZNy2WABZFh6ElSeqi9B7ZRSi0PSGjYctQt+givczmEMTMR3czU1m3wG Sp8csl0XRrmeY6gUsHRlMw9H3SEeYJtihCtpZjSdNEA6R1Tw7vPusZooGYf98UqYJHQbSMgk2Of nyvdYY9BXNCOqjz9WcetU0thWuqD7LhUlPI81BxKrydih6qzeqrvGV9CVgnR8fUXydeGUALqzxs L3ymluVGtrjX+ve1nidD4ogvsB6xM2V+Se0mpFoTEX3X7fLe06CTmDIKC+B8Ru4ioO9GCPSRJMc jP/hgqI0RmidUOiKeIKjl9ymLlzOuw5wELoL+fiuen3ihLJQFwJ39L/BdhlK+K/dflCANH2t/YY G8ObFj6XBuOxUPQ== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE From: Ulf Hansson Some power-domains may be capable of relying on the HW to control the power for a device that's hooked up to it. Typically, for these kinds of configurations the consumer driver should be able to change the behavior of power domain at runtime, control the power domain in SW mode for certain configurations and handover the control to HW mode for other usecases. To allow a consumer driver to change the behaviour of the PM domain for its device, let's provide a new function, dev_pm_genpd_set_hwmode(). Moreover, let's add a corresponding optional genpd callback, ->set_hwmode_dev(), which the genpd provider should implement if it can support switching between HW controlled mode and SW controlled mode. Similarly, add the dev_pm_genpd_get_hwmode() to allow consumers to read the current mode and its corresponding optional genpd callback, ->get_hwmode_dev(), which the genpd provider can also implement for reading back the mode from the hardware. Signed-off-by: Ulf Hansson Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov --- drivers/pmdomain/core.c | 69 +++++++++++++++++++++++++++++++++++++++++++= ++++ include/linux/pm_domain.h | 17 ++++++++++++ 2 files changed, 86 insertions(+) diff --git a/drivers/pmdomain/core.c b/drivers/pmdomain/core.c index a1f6cba3ae6c..41b6411d0ef5 100644 --- a/drivers/pmdomain/core.c +++ b/drivers/pmdomain/core.c @@ -548,6 +548,75 @@ void dev_pm_genpd_synced_poweroff(struct device *dev) } EXPORT_SYMBOL_GPL(dev_pm_genpd_synced_poweroff); =20 +/** + * dev_pm_genpd_set_hwmode - Set the HW mode for the device and its PM dom= ain. + * + * @dev: Device for which the HW-mode should be changed. + * @enable: Value to set or unset the HW-mode. + * + * Some PM domains can rely on HW signals to control the power for a devic= e. To + * allow a consumer driver to switch the behaviour for its device in runti= me, + * which may be beneficial from a latency or energy point of view, this fu= nction + * may be called. + * + * It is assumed that the users guarantee that the genpd wouldn't be detac= hed + * while this routine is getting called. + * + * Returns 0 on success and negative error values on failures. + */ +int dev_pm_genpd_set_hwmode(struct device *dev, bool enable) +{ + struct generic_pm_domain *genpd; + int ret =3D 0; + + genpd =3D dev_to_genpd_safe(dev); + if (!genpd) + return -ENODEV; + + if (!genpd->set_hwmode_dev) + return -EOPNOTSUPP; + + genpd_lock(genpd); + + if (dev_gpd_data(dev)->hw_mode =3D=3D enable) + goto out; + + ret =3D genpd->set_hwmode_dev(genpd, dev, enable); + if (!ret) + dev_gpd_data(dev)->hw_mode =3D enable; + +out: + genpd_unlock(genpd); + return ret; +} +EXPORT_SYMBOL_GPL(dev_pm_genpd_set_hwmode); + +/** + * dev_pm_genpd_get_hwmode - Get the HW mode setting for the device. + * + * @dev: Device for which the current HW-mode setting should be fetched. + * + * This helper function allows consumer drivers to fetch the current HW mo= de + * setting of its the device. + * + * It is assumed that the users guarantee that the genpd wouldn't be detac= hed + * while this routine is getting called. + */ +bool dev_pm_genpd_get_hwmode(struct device *dev) +{ + struct generic_pm_domain *genpd; + + genpd =3D dev_to_genpd_safe(dev); + if (!genpd) + return false; + + if (genpd->get_hwmode_dev) + return genpd->get_hwmode_dev(genpd, dev); + + return dev_gpd_data(dev)->hw_mode; +} +EXPORT_SYMBOL_GPL(dev_pm_genpd_get_hwmode); + static int _genpd_power_on(struct generic_pm_domain *genpd, bool timed) { unsigned int state_idx =3D genpd->state_idx; diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index b97c5e9820f9..5a26423a7ee1 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -148,6 +148,10 @@ struct generic_pm_domain { int (*set_performance_state)(struct generic_pm_domain *genpd, unsigned int state); struct gpd_dev_ops dev_ops; + int (*set_hwmode_dev)(struct generic_pm_domain *domain, + struct device *dev, bool enable); + bool (*get_hwmode_dev)(struct generic_pm_domain *domain, + struct device *dev); int (*attach_dev)(struct generic_pm_domain *domain, struct device *dev); void (*detach_dev)(struct generic_pm_domain *domain, @@ -210,6 +214,7 @@ struct generic_pm_domain_data { unsigned int performance_state; unsigned int default_pstate; unsigned int rpm_pstate; + bool hw_mode; void *data; }; =20 @@ -239,6 +244,8 @@ int dev_pm_genpd_remove_notifier(struct device *dev); void dev_pm_genpd_set_next_wakeup(struct device *dev, ktime_t next); ktime_t dev_pm_genpd_get_next_hrtimer(struct device *dev); void dev_pm_genpd_synced_poweroff(struct device *dev); +int dev_pm_genpd_set_hwmode(struct device *dev, bool enable); +bool dev_pm_genpd_get_hwmode(struct device *dev); =20 extern struct dev_power_governor simple_qos_governor; extern struct dev_power_governor pm_domain_always_on_gov; @@ -307,6 +314,16 @@ static inline ktime_t dev_pm_genpd_get_next_hrtimer(st= ruct device *dev) static inline void dev_pm_genpd_synced_poweroff(struct device *dev) { } =20 +static inline int dev_pm_genpd_set_hwmode(struct device *dev, bool enable) +{ + return -EOPNOTSUPP; +} + +static inline bool dev_pm_genpd_get_hwmode(struct device *dev) +{ + return false; +} + #define simple_qos_governor (*(struct dev_power_governor *)(NULL)) #define pm_domain_always_on_gov (*(struct dev_power_governor *)(NULL)) #endif --=20 2.34.1 From nobody Thu Dec 25 03:19:46 2025 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDEB43B287 for ; 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Mon, 22 Jan 2024 00:47:24 -0800 (PST) Received: from [127.0.1.1] ([79.115.23.25]) by smtp.gmail.com with ESMTPSA id b21-20020a17090630d500b00a2c4c23cd12sm13075462ejb.217.2024.01.22.00.47.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 00:47:23 -0800 (PST) From: Abel Vesa Date: Mon, 22 Jan 2024 10:47:02 +0200 Subject: [PATCH v4 2/5] PM: domains: Add the domain HW-managed mode to the summary Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240122-gdsc-hwctrl-v4-2-9061e8a7aa07@linaro.org> References: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> In-Reply-To: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> To: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , Pavel Machek , Len Brown , Greg Kroah-Hartman , Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , Taniya Das , Jagadeesh Kona , Dmitry Baryshkov Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org, Abel Vesa X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2247; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=9SSOqOK0Lej5rqz0TF7e31lFUOaMw4aoR6sqSlIKxlM=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBlriuQcy6GvAlKv75yWNiL+5SW0RsJUO6/56kgP JidJnlZ3WSJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZa4rkAAKCRAbX0TJAJUV VpP9EADKWrlShjfOHeZMBqfEIYmnGs9ZDExFZPKyfsVQhcKvr6coiF2QWKf6+wuMuqH5iY4nKMx nv9qy6yV0iOWi+DwMYZT/PvHti9yebGXkOhah/nOYwhC+6HfZYHCUrfxi7uhKOEaXOJhCHnG4rt L/QrICOeo58RbuYwE6DllCq2r6FmkDVFfM+0TQ3c0YBRn0uhmkMU9Yl3utWBZ2ZNwAabi9vqGIw VowRsXDLPin8pATypm/WGG1AS77x10VV7n4Du+kDPgrrNU+s0Eog1hk2hxBOcJg/hoysGPevgxM s7kbbvrC7+vARF82wj/0S5SwLYQhkMtA6ldpOuURnpCIQwiZQJGXihzLZJ/9kWPSWWU6pLbGu2w 7SIyTWaTe5Qf3W2XKr8y2l/81KOoeg4eujaB9EaAmQRA2nyE8RYtrgGIloLZeMN1etit0EUw0Bh PaZ/vGdLEwbvWr3Qw9bPAhgbraBokx7GxgsVBZjkpR9ak2+bCB87+8IUjVTf+7qZSgoq5s/ePno x9y/abt+Ka55T9QC8yHAEKJDJ8MAwF27UJmvs64kAbfmMNBTnBu4YeA5B1rwVZxfn6fNTi1WXV6 0NvJflRNpfKFiM8657hoHU8h9UCrGJQZpcnNu0rjMP9MtuY1vSAcsa3GnYqkd7YaqCg7O+gp76B d3aWRxBJUNxpGHA== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Now that genpd supports dynamically switching the control for an attached device between hardware- and software-mode, let's add this information to the genpd summary in debugfs. Suggested-by: Taniya Das Signed-off-by: Abel Vesa Reviewed-by: Ulf Hansson Reviewed-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- drivers/pmdomain/core.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/pmdomain/core.c b/drivers/pmdomain/core.c index 41b6411d0ef5..841fde9e9f87 100644 --- a/drivers/pmdomain/core.c +++ b/drivers/pmdomain/core.c @@ -3147,6 +3147,15 @@ static void rtpm_status_str(struct seq_file *s, stru= ct device *dev) seq_printf(s, "%-25s ", p); } =20 +static void mode_status_str(struct seq_file *s, struct device *dev) +{ + struct generic_pm_domain_data *gpd_data; + + gpd_data =3D to_gpd_data(dev->power.subsys_data->domain_data); + + seq_printf(s, "%20s", gpd_data->hw_mode ? "HW" : "SW"); +} + static void perf_status_str(struct seq_file *s, struct device *dev) { struct generic_pm_domain_data *gpd_data; @@ -3205,6 +3214,7 @@ static int genpd_summary_one(struct seq_file *s, seq_printf(s, "\n %-50s ", kobj_path); rtpm_status_str(s, pm_data->dev); perf_status_str(s, pm_data->dev); + mode_status_str(s, pm_data->dev); kfree(kobj_path); } =20 @@ -3221,8 +3231,8 @@ static int summary_show(struct seq_file *s, void *dat= a) int ret =3D 0; =20 seq_puts(s, "domain status children = performance\n"); - seq_puts(s, " /device runt= ime status\n"); - seq_puts(s, "------------------------------------------------------------= ----------------------------------\n"); + seq_puts(s, " /device runt= ime status managed by\n"); + seq_puts(s, "------------------------------------------------------------= ------------------------------------------------\n"); =20 ret =3D mutex_lock_interruptible(&gpd_list_lock); if (ret) --=20 2.34.1 From nobody Thu Dec 25 03:19:46 2025 Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D9603B795 for ; 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Mon, 22 Jan 2024 00:47:25 -0800 (PST) Received: from [127.0.1.1] ([79.115.23.25]) by smtp.gmail.com with ESMTPSA id b21-20020a17090630d500b00a2c4c23cd12sm13075462ejb.217.2024.01.22.00.47.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 00:47:25 -0800 (PST) From: Abel Vesa Date: Mon, 22 Jan 2024 10:47:03 +0200 Subject: [PATCH v4 3/5] clk: qcom: gdsc: Add set and get hwmode callbacks to switch GDSC mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240122-gdsc-hwctrl-v4-3-9061e8a7aa07@linaro.org> References: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> In-Reply-To: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> To: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , Pavel Machek , Len Brown , Greg Kroah-Hartman , Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , Taniya Das , Jagadeesh Kona , Dmitry Baryshkov Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org, Abel Vesa X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3441; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=yFQug82ouDh7n9fo6dz4SaANMbWja9vZYjYKARImC8I=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBlriuSQCCTGaF/pibhxYWO74SJJuCHfzr0HrkOn I/X3EewY96JAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZa4rkgAKCRAbX0TJAJUV VlvjD/sGWHCathvHXRq0Py3o28RU3KmbxNBAQgGF6R1ucKEF4rXyU+u9djEnWK6kx+RLwUrfW4O jlp559Xhrg7toBjLrDu0bo6rvEobnOCtkLtUpWyfS/cfI8xKE+rqkyNaRGkDJ8d8ZywRzI0qpad OtLANlXACdfcDskAaDZUyDoeZKOuOzu+6Bz9+L+RfMz3LwqOBL5hMM1ZbFsqyKMmh5figAUpo7+ dZJQA0kkDqGOIiAFZLDCTPb85/QGuFnNEcHVBnT1qhVMyQFNtTwT6h0tJ1pwkmrJQRiPP51PW+T 9pbueC0r3s/53En7uakqgvQ4z1bUyPzA0nkLhoRqy+k/9xnbwhiG2QEYyH70lx1k7Mo2gc9x/AJ cptH000+sowRAOKm2X8o95/mfkrb0SLOH/VzMLN7occryxVTEhDrhBIcdqPnADgrz0FL2WS1iBv ZoTyQ6hFD4x28HncVLs0G8wrO6WZePeWoni+wuMlO58laFlD1/DwEFbXHRbClnMzNvZNQ65BryH cwMfnmiep7BA3S9Rmh2t73ph34MWQgT8vY8/jWC5phozpmZJuVos40orf4O+rztEeoInDFm4AA3 1JW5ftuUiavXGbTdZ0khgUSF/yfAF2rn6K9RiQ43yHQBwj8mOU7c41Lk8fLAm3+xBxjuiEjzsWG s8NGjP0PBZhGzgw== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE From: Jagadeesh Kona Add support for set and get hwmode callbacks to switch the GDSC between SW and HW modes. Currently, the GDSC is moved to HW control mode using HW_CTRL flag and if this flag is present, GDSC is moved to HW mode as part of GDSC enable itself. The intention is to keep the HW_CTRL flag functionality as is, since many older chipsets still use this flag. But consumer drivers also require the GDSC mode to be switched dynamically at runtime based on requirement for certain usecases. Some of these usecases are switching the GDSC to SW mode to keep it ON during the enablement of clocks that are dependent on GDSC and while programming certain configurations that require GDSC to be ON. Introduce a new HW_CTRL_TRIGGER flag to register the set_hwmode_dev and get_hwmode_dev callbacks which allows the consumer drivers to switch the GDSC back and forth between HW/SW modes dynamically at runtime using new dev_pm_genpd_set_hwmode API. Signed-off-by: Jagadeesh Kona Signed-off-by: Abel Vesa --- drivers/clk/qcom/gdsc.c | 54 +++++++++++++++++++++++++++++++++++++++++++++= ++++ drivers/clk/qcom/gdsc.h | 1 + 2 files changed, 55 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 5358e28122ab..71626eb20101 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -363,6 +363,56 @@ static int gdsc_disable(struct generic_pm_domain *doma= in) return 0; } =20 +static int gdsc_set_hwmode(struct generic_pm_domain *domain, struct device= *dev, bool mode) +{ + struct gdsc *sc =3D domain_to_gdsc(domain); + u32 val; + int ret; + + if (sc->rsupply && !regulator_is_enabled(sc->rsupply)) { + pr_err("Cannot set mode while parent is disabled\n"); + return -EIO; + } + + ret =3D gdsc_hwctrl(sc, mode); + if (ret) + return ret; + + /* Wait for 1usec for mode transition to properly complete */ + udelay(1); + + if (!mode) { + ret =3D regmap_read(sc->regmap, sc->gdscr, &val); + if (ret) + return ret; + + /* + * While switching from HW to SW mode, if GDSC is in enabled + * state, poll for GDSC to complete the power up. + */ + if (!(val & SW_COLLAPSE_MASK)) + return gdsc_poll_status(sc, GDSC_ON); + } + + return 0; +} + +static bool gdsc_get_hwmode(struct generic_pm_domain *domain, struct devic= e *dev) +{ + struct gdsc *sc =3D domain_to_gdsc(domain); + u32 val; + int ret; + + ret =3D regmap_read(sc->regmap, sc->gdscr, &val); + if (ret) + return ret; + + if (val & HW_CONTROL_MASK) + return true; + + return false; +} + static int gdsc_init(struct gdsc *sc) { u32 mask, val; @@ -451,6 +501,10 @@ static int gdsc_init(struct gdsc *sc) sc->pd.power_off =3D gdsc_disable; if (!sc->pd.power_on) sc->pd.power_on =3D gdsc_enable; + if (sc->flags & HW_CTRL_TRIGGER) { + sc->pd.set_hwmode_dev =3D gdsc_set_hwmode; + sc->pd.get_hwmode_dev =3D gdsc_get_hwmode; + } =20 ret =3D pm_genpd_init(&sc->pd, NULL, !on); if (ret) diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 803512688336..1e2779b823d1 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -67,6 +67,7 @@ struct gdsc { #define ALWAYS_ON BIT(6) #define RETAIN_FF_ENABLE BIT(7) #define NO_RET_PERIPH BIT(8) +#define HW_CTRL_TRIGGER BIT(9) struct reset_controller_dev *rcdev; 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Mon, 22 Jan 2024 00:47:27 -0800 (PST) Received: from [127.0.1.1] ([79.115.23.25]) by smtp.gmail.com with ESMTPSA id b21-20020a17090630d500b00a2c4c23cd12sm13075462ejb.217.2024.01.22.00.47.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 00:47:27 -0800 (PST) From: Abel Vesa Date: Mon, 22 Jan 2024 10:47:04 +0200 Subject: [PATCH v4 4/5] clk: qcom: Use HW_CTRL_TRIGGER flag to switch video GDSC to HW mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240122-gdsc-hwctrl-v4-4-9061e8a7aa07@linaro.org> References: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> In-Reply-To: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> To: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , Pavel Machek , Len Brown , Greg Kroah-Hartman , Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , Taniya Das , Jagadeesh Kona , Dmitry Baryshkov Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org, Abel Vesa X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1921; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=6YCTgAGeGVs43KDgKfImSE+xArUbcRShc9pkDKKCCac=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBlriuThQApLjd1pjc0SdaYfQW02n40AeD/XJR+z EpLTRfM6lSJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZa4rkwAKCRAbX0TJAJUV VuO0D/9bQL9I/1mXOi9y2EWRygpuPvCo8p5viVHdlpIlMLffd033I+1m1se6bQFzuE3XqUHRnG6 N61rhS/f7QSFl1jIDuLx7vpPG7K8woM/Hv9pLQtwKiXL4eF+kriPmghr4n3rwQcHWL34LE7Rx7E VkcFcGMU39MW1hlDQcZJ7/QDLr+hYzci2WOa1hEwBGDSuNH2PlS/KpgHp6PCoENc1mOECqUEfXt pwArCw2vNk3isDW2nSjRFzlPWi7PuHsu+tVDlCfdo/BJ8jlhdWYIkZYHKtkDYAgvqbr4wWk9eq7 BPDmuaheBI1tzurdSqotPdLvp8MT4L0w5tqXkeGtAcEzIK3r5v56lv/e+l71QVdGR8eMJTx43UY gi6FQsVEDCiCoCuG3H2FEi9bqHmrUjuAUsUCf5lF6j6LILX4vjxQIrwNUqh8s4N18kJFqtNUUgu rskjr98Kj2YI8FbEB4OTAxSVeov9u5uhAgmwLLYNhMRv1/uqI/lr5vnFRaoc+2iAhopnduwESy0 hSNJfrOu/ClI1dK2aMkP9QpN+/CEvuUxRq385IWt0mgnUuAH8q1YzbeMbTxVBwzFsQF8xvWVNFd BGU3F0ZIvXeHHkWqPYAezxuHN797gpX5V1nfW3T9uRmjlRZ85cL4uiMwHmpVU/U52Rzebq93bek 5V7vYbPOWxgsl1A== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE From: Jagadeesh Kona The current HW_CTRL flag switches the video GDSC to HW control mode as part of GDSC enable itself, and HW can disable the GDSC right after the GDSC is moved to HW mode. This can lead to subsequent video clock enable failures that are dependent on the GDSC if GDSC is collapsed by HW. Also, while few video hardware registers are being programmed by TZ, GDSC should be in non collapsed state which can be achieved by keeping it in SW mode. Use HW_CTRL_TRIGGER flag instead which allows consumer drivers to switch the video GDSC to HW/SW control modes at runtime using dev_pm_genpd_set_hwmode API as per the requirement. Signed-off-by: Jagadeesh Kona Signed-off-by: Abel Vesa --- drivers/clk/qcom/videocc-sc7280.c | 2 +- drivers/clk/qcom/videocc-sm8250.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/videocc-sc7280.c b/drivers/clk/qcom/videocc-s= c7280.c index 615695d82319..3d07b1e95986 100644 --- a/drivers/clk/qcom/videocc-sc7280.c +++ b/drivers/clk/qcom/videocc-sc7280.c @@ -236,7 +236,7 @@ static struct gdsc mvs0_gdsc =3D { .name =3D "mvs0_gdsc", }, .pwrsts =3D PWRSTS_OFF_ON, - .flags =3D HW_CTRL | RETAIN_FF_ENABLE, + .flags =3D HW_CTRL_TRIGGER | RETAIN_FF_ENABLE, }; =20 static struct gdsc mvsc_gdsc =3D { diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-s= m8250.c index ad46c4014a40..c1b73d852f1c 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -293,7 +293,7 @@ static struct gdsc mvs0_gdsc =3D { .pd =3D { .name =3D "mvs0_gdsc", }, - .flags =3D HW_CTRL, + .flags =3D HW_CTRL_TRIGGER, .pwrsts =3D PWRSTS_OFF_ON, }; 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Mon, 22 Jan 2024 00:47:29 -0800 (PST) Received: from [127.0.1.1] ([79.115.23.25]) by smtp.gmail.com with ESMTPSA id b21-20020a17090630d500b00a2c4c23cd12sm13075462ejb.217.2024.01.22.00.47.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 00:47:29 -0800 (PST) From: Abel Vesa Date: Mon, 22 Jan 2024 10:47:05 +0200 Subject: [PATCH v4 5/5] venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240122-gdsc-hwctrl-v4-5-9061e8a7aa07@linaro.org> References: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> In-Reply-To: <20240122-gdsc-hwctrl-v4-0-9061e8a7aa07@linaro.org> To: "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , Pavel Machek , Len Brown , Greg Kroah-Hartman , Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , Taniya Das , Jagadeesh Kona , Dmitry Baryshkov Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-media@vger.kernel.org, Abel Vesa X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2921; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=Vk/itDO+Lfx/2A5RsJFS6owpFqpo96HTGoEN2vQw4oo=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBlriuVGw/R23nM4ftPZR0CdvkJ4dv64Da6oA9WK 96wepF1DsqJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZa4rlQAKCRAbX0TJAJUV VidJD/4zyhZuJ7ZOsHBa4UU8Jq/BAiGJv1LeEHcRLK8S9ZKuYLOC9/Oin9OJxSzdUK9hob033FN 6+wwyXsCYKCgbsV99dAVITZ2UDpYYWkOaoGT8ajmqcdkgNBLE/sfA+aqDXTZfSOAg7df6NMdYyE oek/aEmXsrHDDJDc/dQpDQ701/Eo9CUiEOauVx0eTcuwYTfHKnZSP6v6XBoMus/m/hUbSIRx57a pcW8lH+USq6Il8oWkcV3H2kj90564ElJKkkTRBjfYttfkYWb5n2i0uni6P9HSYA9QrTRWBtGBOi M1nuAYyD4skwVE6wHcycYEKrNQGqcsEVLgHTGGw9t7xNu9ow2YLTubM/xHl5kAUrMbEvxAadkZH FCXULcoCvKsgYJwaKN79UHY4X8KzhC1m7hC5SVmiG+9tUAEmLnDQ3U7+De+vT+C0vpJn1vMyOwo foXCgzrKi6zr48YnPdcMeSH43ge+pCRQ+xH5qr93sIr13dsA6CakHCRKdBsoLL4dxRx9F904/D4 Z2e1UlE5aHb7HSE14qE14q5bfAyLJ+GNEd8aH7IFnzbozhLZKUe9pXdf4GW1iqb8SSQKO27R546 3QC0px+i8lCBfow12dLlcmRWVpYq7V25U2oZLmqu4BzuBkA48sLOatafpnihxYSzI77GFbZ0XN6 vxYCs+6rFpyF0TQ== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE From: Jagadeesh Kona Use dev_pm_genpd_set_hwmode API to switch the vcodec gdsc to SW/HW modes at runtime based on requirement for venus V6 variants. Before the GDSC HWCTL was available to the consumer, the venus driver needed to somehow keep the power from collapsing while under the driver control. The only way to do that was to clear the CORE_PWR_DISABLE bit (in wrapper POWER_CONTROL register) and, respectively, set it back after the driver control was completed. Now, that there is a way to switch the GDSC HW/SW control back and forth, the CORE_PWR_DISABLE toggling in vcodec_control_v4() can be dropped for V6 variants. With newer implementation, the mode of vcodec gdsc gets switched only in set_hwmode API and the GDSC should not be switched to HW control mode before turning off the GDSC, else subsequent GDSC enable may fail, hence add check to avoid switching the GDSC to HW mode before powering off the GDSC on V6 variants. Signed-off-by: Jagadeesh Kona Signed-off-by: Abel Vesa --- drivers/media/platform/qcom/venus/pm_helpers.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media= /platform/qcom/venus/pm_helpers.c index a1b127caa90a..55e8ec3f4ee9 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -412,10 +412,9 @@ static int vcodec_control_v4(struct venus_core *core, = u32 coreid, bool enable) u32 val; int ret; =20 - if (IS_V6(core)) { - ctrl =3D core->wrapper_base + WRAPPER_CORE_POWER_CONTROL_V6; - stat =3D core->wrapper_base + WRAPPER_CORE_POWER_STATUS_V6; - } else if (coreid =3D=3D VIDC_CORE_ID_1) { + if (IS_V6(core)) + return dev_pm_genpd_set_hwmode(core->pmdomains[coreid], !enable); + else if (coreid =3D=3D VIDC_CORE_ID_1) { ctrl =3D core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; stat =3D core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; } else { @@ -451,9 +450,11 @@ static int poweroff_coreid(struct venus_core *core, un= signed int coreid_mask) =20 vcodec_clks_disable(core, core->vcodec0_clks); =20 - ret =3D vcodec_control_v4(core, VIDC_CORE_ID_1, false); - if (ret) - return ret; + if (!IS_V6(core)) { + ret =3D vcodec_control_v4(core, VIDC_CORE_ID_1, false); + if (ret) + return ret; + } =20 ret =3D pm_runtime_put_sync(core->pmdomains[1]); if (ret < 0) @@ -467,9 +468,11 @@ static int poweroff_coreid(struct venus_core *core, un= signed int coreid_mask) =20 vcodec_clks_disable(core, core->vcodec1_clks); =20 - ret =3D vcodec_control_v4(core, VIDC_CORE_ID_2, false); - if (ret) - return ret; + if (!IS_V6(core)) { + ret =3D vcodec_control_v4(core, VIDC_CORE_ID_2, false); + if (ret) + return ret; + } =20 ret =3D pm_runtime_put_sync(core->pmdomains[2]); if (ret < 0) --=20 2.34.1