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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 1/9] arm64: dts: qcom: qrb5165-rb5: describe the WLAN module of QCA6390 Date: Wed, 17 Jan 2024 17:07:40 +0100 Message-Id: <20240117160748.37682-2-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Describe the ath11k WLAN on-board the QCA6390 module. Include the relevant regulators and the enable GPIO. Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 29 ++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 ++++++++ 2 files changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts= /qcom/qrb5165-rb5.dts index cd0db4f31d4a..35a5d1ee45e5 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -734,6 +734,27 @@ &pcie0_phy { vdda-pll-supply =3D <&vreg_l9a_1p2>; }; =20 +&pcieport0 { + wifi@0 { + compatible =3D "pci17cb,1101"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wlan_en_state>; + + enable-gpios =3D <&tlmm 20 GPIO_ACTIVE_HIGH>; + + vddio-supply =3D <&vreg_s4a_1p8>; + vddaon-supply =3D <&vreg_s6a_0p95>; + vddpmu-supply =3D <&vreg_s2f_0p95>; + vddrfa1-supply =3D <&vreg_s2f_0p95>; + vddrfa2-supply =3D <&vreg_s8c_1p3>; + vddrfa3-supply =3D <&vreg_s5a_1p9>; + vddpcie1-supply =3D <&vreg_s8c_1p3>; + vddpcie2-supply =3D <&vreg_s5a_1p9>; + }; +}; + &pcie1 { status =3D "okay"; }; @@ -1303,6 +1324,14 @@ sdc2_card_det_n: sd-card-det-n-state { function =3D "gpio"; bias-pull-up; }; + + wlan_en_state: wlan-default-state { + pins =3D "gpio20"; + function =3D "gpio"; + drive-strength =3D <16>; + output-low; + bias-pull-up; + }; }; =20 &uart6 { diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index 760501c1301a..fef9c314ce55 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2197,6 +2197,16 @@ pcie0: pcie@1c00000 { dma-coherent; =20 status =3D "disabled"; + + pcieport0: pcie@0 { + device_type =3D "pci"; + reg =3D <0x0 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + bus-range =3D <0x01 0xff>; + }; }; =20 pcie0_phy: phy@1c06000 { --=20 2.40.1 From nobody Thu Dec 25 10:30:01 2025 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A20A8224C9 for ; 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Wed, 17 Jan 2024 08:08:29 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:d0b5:43ec:48:baad]) by smtp.gmail.com with ESMTPSA id t10-20020a5d6a4a000000b00337b0374a3dsm1972092wrw.57.2024.01.17.08.08.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jan 2024 08:08:29 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 2/9] arm64: dts: qcom: sm8550-qrd: add Wifi nodes Date: Wed, 17 Jan 2024 17:07:41 +0100 Message-Id: <20240117160748.37682-3-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Neil Armstrong Describe the ath12k WLAN on-board the WCN7850 module present on the board. Signed-off-by: Neil Armstrong [Bartosz: - move the pcieport0 node into the .dtsi - make regulator naming consistent with existing DT code - add commit message] Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 37 +++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 +++++++ 2 files changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/= qcom/sm8550-qrd.dts index d401d63e5c4d..c07e2ea1c95c 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -813,6 +813,25 @@ &pcie0 { status =3D "okay"; }; =20 +&pcieport0 { + wifi@0 { + compatible =3D "pci17cb,1107"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wlan_en>, <&pmk8550_sleep_clk>; + + enable-gpios =3D <&tlmm 80 GPIO_ACTIVE_HIGH>; + + vddio-supply =3D <&vreg_l15b_1p8>; + vdd-supply =3D <&vreg_s5g_0p85>; + vddaon-supply =3D <&vreg_s2g_0p85>; + vdddig-supply =3D <&vreg_s4e_0p95>; + vddrfa1-supply =3D <&vreg_s6g_1p86>; + vddrfa2-supply =3D <&vreg_s4g_1p25>; + }; +}; + &pcie0_phy { vdda-phy-supply =3D <&vreg_l1e_0p88>; vdda-pll-supply =3D <&vreg_l3e_1p2>; @@ -900,6 +919,17 @@ &pcie_1_phy_aux_clk { clock-frequency =3D <1000>; }; =20 +&pmk8550_gpios { + pmk8550_sleep_clk: sleep-clk-state { + pins =3D "gpio3"; + function =3D "func1"; + input-disable; + output-enable; + bias-disable; + power-source =3D <0>; + }; +}; + &qupv3_id_0 { status =3D "okay"; }; @@ -1035,6 +1065,13 @@ wcd_default: wcd-reset-n-active-state { bias-disable; output-low; }; + + wlan_en: wlan-en-state { + pins =3D "gpio80"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-pull-down; + }; }; =20 &uart7 { diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index ee1ba5a8c8fc..1f2dd4262eb9 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1754,6 +1754,16 @@ pcie0: pcie@1c00000 { phy-names =3D "pciephy"; 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Wed, 17 Jan 2024 08:08:31 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 3/9] arm64: dts: qcom: sm8650-qrd: add Wifi nodes Date: Wed, 17 Jan 2024 17:07:42 +0100 Message-Id: <20240117160748.37682-4-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Neil Armstrong Describe the ath12k WLAN on-board the WCN7850 module present on the board. Signed-off-by: Neil Armstrong [Bartosz: - move the pcieport0 node into the .dtsi - make regulator naming consistent with existing DT code - add commit message] Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 29 +++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8650.dtsi | 10 +++++++++ 2 files changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/= qcom/sm8650-qrd.dts index 592a67a47c78..5f960d90e7d2 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -513,6 +513,28 @@ &pcie0 { status =3D "okay"; }; =20 +&pcieport0 { + wifi@0 { + compatible =3D "pci17cb,1107"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wlan_en>; + + enable-gpios =3D <&tlmm 16 GPIO_ACTIVE_HIGH>; + + vddio12-supply =3D <&vreg_l3c_1p2>; + vddio-supply =3D <&vreg_l15b_1p8>; + vdd-supply =3D <&vreg_s4i_0p85>; + vddaon-supply =3D <&vreg_s2c_0p8>; + vdddig-supply =3D <&vreg_s3c_0p9>; + vddrfa1-supply =3D <&vreg_s6c_1p8>; + vddrfa2-supply =3D <&vreg_s1c_1p2>; + + clocks =3D <&rpmhcc RPMH_RF_CLK1>; + }; +}; + &pcie0_phy { vdda-phy-supply =3D <&vreg_l1i_0p88>; vdda-pll-supply =3D <&vreg_l3i_1p2>; @@ -718,6 +740,13 @@ ts_reset: ts-reset-state { drive-strength =3D <8>; bias-pull-up; }; + + wlan_en: wlan-en-state { + pins =3D "gpio16"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-pull-down; + }; }; =20 &uart14 { diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 2df77123a8c7..1da8b7844224 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2270,6 +2270,16 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, dma-coherent; =20 status =3D "disabled"; + + pcieport0: pcie@0 { + device_type =3D "pci"; + reg =3D <0x0 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; 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Wed, 17 Jan 2024 08:08:33 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:d0b5:43ec:48:baad]) by smtp.gmail.com with ESMTPSA id t10-20020a5d6a4a000000b00337b0374a3dsm1972092wrw.57.2024.01.17.08.08.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jan 2024 08:08:32 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 4/9] PCI: create platform devices for child OF nodes of the port node Date: Wed, 17 Jan 2024 17:07:43 +0100 Message-Id: <20240117160748.37682-5-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski In order to introduce PCI power-sequencing, we need to create platform devices for child nodes of the port node. They will get matched against the pwrseq drivers (if one exists) and then the actual PCI device will reuse the node once it's detected on the bus. Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- drivers/pci/bus.c | 9 ++++++++- drivers/pci/remove.c | 3 ++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 9c2137dae429..8ab07f711834 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include =20 @@ -342,8 +343,14 @@ void pci_bus_add_device(struct pci_dev *dev) */ pcibios_bus_add_device(dev); pci_fixup_device(pci_fixup_final, dev); - if (pci_is_bridge(dev)) + if (pci_is_bridge(dev)) { of_pci_make_dev_node(dev); + retval =3D of_platform_populate(dev->dev.of_node, NULL, NULL, + &dev->dev); + if (retval) + pci_err(dev, "failed to populate child OF nodes (%d)\n", + retval); + } pci_create_sysfs_dev_files(dev); pci_proc_attach_device(dev); pci_bridge_d3_update(dev); diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c index d749ea8250d6..77be0630b7b3 100644 --- a/drivers/pci/remove.c +++ b/drivers/pci/remove.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include #include +#include #include "pci.h" =20 static void pci_free_resources(struct pci_dev *dev) @@ -18,11 +19,11 @@ static void pci_stop_dev(struct pci_dev *dev) pci_pme_active(dev, false); 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Wed, 17 Jan 2024 08:08:34 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 5/9] PCI: hold the rescan mutex when scanning for the first time Date: Wed, 17 Jan 2024 17:07:44 +0100 Message-Id: <20240117160748.37682-6-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski With the introduction of the power sequencing drivers that will be able to trigger the port rescan, we need to hold the rescan mutex during the initial pci_host_probe() too or the two could get in each other's way. Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- drivers/pci/probe.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index b7335be56008..957f7afee7ba 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -3122,7 +3122,9 @@ int pci_host_probe(struct pci_host_bridge *bridge) struct pci_bus *bus, *child; int ret; =20 + pci_lock_rescan_remove(); ret =3D pci_scan_root_bus_bridge(bridge); + pci_unlock_rescan_remove(); if (ret < 0) { dev_err(bridge->dev.parent, "Scanning root bridge failed"); return ret; --=20 2.40.1 From nobody Thu Dec 25 10:30:01 2025 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED0C124215 for ; Wed, 17 Jan 2024 16:08:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705507719; cv=none; b=YWW5oDSjlbxksO14zYbfnwOx/9oMhZu0Cz63+ftQEgJ5SjICUqbjy6lpp3zOjRlTZUkpiSOXAR6k3GbtRxmAXPvnQowsQU8j4vLKF5trQVhGOpZKi8TF7biNqBCsS7EVN8HXlMdtsbs+Zqd+VrTpxv52jo5oY9bL9tjWmp+W9FI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705507719; c=relaxed/simple; bh=9hVgr52oxfJN+f3DPqCGtdW3fcs9H31q8sHIag5dqM8=; h=Received:DKIM-Signature:X-Google-DKIM-Signature: X-Gm-Message-State:X-Google-Smtp-Source:X-Received:Received:From: To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding; b=XLHdMRjvB8vCft9KtlDBnCYVYMd2CYj/lU9A/XTavSlkDv/wdXA0Y8CCZhdnxa1x+s94KcFZSbroZMG08/9/GyDEu4ihY9HPtKPOu1XIL8bIlOi6uy/hY8dTFt1YKf0JMDhDB15hQjPTkNHq1yF9NpaBlz6Q7+A3Le6Vumi2Mzc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=bgdev.pl; spf=none smtp.mailfrom=bgdev.pl; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b=NQI68Rmp; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=bgdev.pl Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=bgdev.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="NQI68Rmp" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-40e72a567eeso36608415e9.0 for ; Wed, 17 Jan 2024 08:08:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1705507716; x=1706112516; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hmDMXWqDYRqbLZRDqVGsRFlI5kpmWEXG2UggM6BWIdg=; b=NQI68RmpObOV7v4qXphEqbzrqq71ej5IP6s3cSP2RqmUAX2ez5T5bDVAMcm/wmSDdA N00s3oYgoh0kBrcDqeaZk7iPXChzHTb/Ti9THgjllPRh9Gr2kdBddZoP6xd1jOzBwwlC +YaViHQ7NRc4kswd74xTFcClogeNcPmD0ukHn9wDtVz166unMzTonxvYG6DFuLH/AvhA Ezf1SUoq+ffBRsRNNdiEU0H2rMfXC1/qelP1nCncJSXfuYvtbJc4c/rfd3sqEa4C/YHg 5Ep91FMjlo++5R6K6UZvtByd15Anp8c0wc3SYWWwJ6lWVenjJrKGYFy2473L+AtJgeAD oPpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705507716; x=1706112516; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hmDMXWqDYRqbLZRDqVGsRFlI5kpmWEXG2UggM6BWIdg=; b=TkrIdFOoWLBPmsW5Ct5l55/y3pTAYz0lcwC+5U/1vYNCLXBQXF6aV3KUHdIk63OtxR kMtisJaXxQYqhxrt1Zy6xp8nd1DGMyeo3RTWE8/qynKfbEN7O+1wezPWtgcmmBdMXZ4q QBaYipuS4l5jJVStXA08+DYj3AG0/YLy4h/ScnNtU0l7Nd7bF6D73gtAxh4Qn1WgYcOt gKgSmYDipPyp43WaKVnJ/VwThuPJzLsAHQHNJmzZVIoLx3X3oQxeQCM6PiIBRtnouMBq OGXweAb/7Og+n9ssMhQhhY+usapqg0Uqbdd9q/pjYKQSPXQpdftsaw1nLzViuzliNArn viOw== X-Gm-Message-State: AOJu0YzDdnAy3TS4SUtoSyDSp8nACTziFdL07OlNWCM+09Z+jk5zPpSk UFeIVc6B4N6YEfX2pIr9mKVwceZnQMjpaw== X-Google-Smtp-Source: AGHT+IFjYcQdh7FZrRxxGNsX7G0G4hhDvyEqEiUFIygsmYmwACq1eG6JZb5KYfiYxR9GWoVqka6UfQ== X-Received: by 2002:a05:600c:4452:b0:40d:8954:a735 with SMTP id v18-20020a05600c445200b0040d8954a735mr2818810wmn.156.1705507716318; Wed, 17 Jan 2024 08:08:36 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:d0b5:43ec:48:baad]) by smtp.gmail.com with ESMTPSA id t10-20020a5d6a4a000000b00337b0374a3dsm1972092wrw.57.2024.01.17.08.08.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jan 2024 08:08:35 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 6/9] PCI/pwrseq: add pwrseq core code Date: Wed, 17 Jan 2024 17:07:45 +0100 Message-Id: <20240117160748.37682-7-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Some PCI devices must be powered-on before they can be detected on the bus. Introduce a simple framework reusing the existing PCI OF infrastructure. The way this works is: a DT node representing a PCI device connected to the port can be matched against its power sequencing platform driver. If the match succeeds, the driver is responsible for powering-up the device and calling pcie_pwrseq_device_enable() which will trigger a PCI bus rescan as well as subscribe to PCI bus notifications. When the device is detected and created, we'll make it consume the same DT node that the platform device did. When the device is bound, we'll create a device link between it and the parent power sequencing device. Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- drivers/pci/Kconfig | 1 + drivers/pci/Makefile | 1 + drivers/pci/pwrseq/Kconfig | 8 ++++ drivers/pci/pwrseq/Makefile | 3 ++ drivers/pci/pwrseq/pwrseq.c | 82 +++++++++++++++++++++++++++++++++++++ include/linux/pci-pwrseq.h | 24 +++++++++++ 6 files changed, 119 insertions(+) create mode 100644 drivers/pci/pwrseq/Kconfig create mode 100644 drivers/pci/pwrseq/Makefile create mode 100644 drivers/pci/pwrseq/pwrseq.c create mode 100644 include/linux/pci-pwrseq.h diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 74147262625b..e0fd5caa1ffc 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -291,5 +291,6 @@ source "drivers/pci/hotplug/Kconfig" source "drivers/pci/controller/Kconfig" source "drivers/pci/endpoint/Kconfig" source "drivers/pci/switch/Kconfig" +source "drivers/pci/pwrseq/Kconfig" =20 endif diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index cc8b4e01e29d..0a1673ef2c9e 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_PCI) +=3D access.o bus.o probe.o host-bridge.= o \ =20 obj-$(CONFIG_PCI) +=3D msi/ obj-$(CONFIG_PCI) +=3D pcie/ +obj-$(CONFIG_PCI) +=3D pwrseq/ =20 ifdef CONFIG_PCI obj-$(CONFIG_PROC_FS) +=3D proc.o diff --git a/drivers/pci/pwrseq/Kconfig b/drivers/pci/pwrseq/Kconfig new file mode 100644 index 000000000000..a721a8a955c3 --- /dev/null +++ b/drivers/pci/pwrseq/Kconfig @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 + +menu "PCI Power sequencing drivers" + +config PCI_PWRSEQ + bool + +endmenu diff --git a/drivers/pci/pwrseq/Makefile b/drivers/pci/pwrseq/Makefile new file mode 100644 index 000000000000..4052b6bb5aa5 --- /dev/null +++ b/drivers/pci/pwrseq/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_PCI_PWRSEQ) +=3D pwrseq.o diff --git a/drivers/pci/pwrseq/pwrseq.c b/drivers/pci/pwrseq/pwrseq.c new file mode 100644 index 000000000000..a750c7bc6830 --- /dev/null +++ b/drivers/pci/pwrseq/pwrseq.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2024 Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include + +static int pci_pwrseq_notify(struct notifier_block *nb, unsigned long acti= on, + void *data) +{ + struct pci_pwrseq *pwrseq =3D container_of(nb, struct pci_pwrseq, nb); + struct device *dev =3D data; + + if (dev_fwnode(dev) !=3D dev_fwnode(pwrseq->dev)) + return NOTIFY_DONE; + + switch (action) { + case BUS_NOTIFY_ADD_DEVICE: + device_set_of_node_from_dev(dev, pwrseq->dev); + break; + case BUS_NOTIFY_BOUND_DRIVER: + pwrseq->link =3D device_link_add(dev, pwrseq->dev, + DL_FLAG_AUTOREMOVE_CONSUMER); + if (!pwrseq->link) + dev_err(pwrseq->dev, "Failed to add device link\n"); + break; + case BUS_NOTIFY_UNBOUND_DRIVER: + device_link_del(pwrseq->link); + break; + } + + return NOTIFY_DONE; +} + +int pci_pwrseq_device_enable(struct pci_pwrseq *pwrseq) +{ + if (!pwrseq->dev) + return -ENODEV; + + pwrseq->nb.notifier_call =3D pci_pwrseq_notify; + bus_register_notifier(&pci_bus_type, &pwrseq->nb); + + pci_lock_rescan_remove(); + pci_rescan_bus(to_pci_dev(pwrseq->dev->parent)->bus); + pci_unlock_rescan_remove(); + + return 0; +} +EXPORT_SYMBOL_GPL(pci_pwrseq_device_enable); + +void pci_pwrseq_device_disable(struct pci_pwrseq *pwrseq) +{ + bus_unregister_notifier(&pci_bus_type, &pwrseq->nb); +} +EXPORT_SYMBOL_GPL(pci_pwrseq_device_disable); + +static void devm_pci_pwrseq_device_disable(void *data) +{ + struct pci_pwrseq *pwrseq =3D data; + + pci_pwrseq_device_disable(pwrseq); +} + +int devm_pci_pwrseq_device_enable(struct device *dev, + struct pci_pwrseq *pwrseq) +{ + int ret; + + ret =3D pci_pwrseq_device_enable(pwrseq); + if (ret) + return ret; + + return devm_add_action_or_reset(dev, devm_pci_pwrseq_device_disable, + pwrseq); +} +EXPORT_SYMBOL_GPL(devm_pci_pwrseq_device_enable); diff --git a/include/linux/pci-pwrseq.h b/include/linux/pci-pwrseq.h new file mode 100644 index 000000000000..137b82b99d1c --- /dev/null +++ b/include/linux/pci-pwrseq.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2024 Linaro Ltd. + */ + +#ifndef __PCI_PWRSEQ_H__ +#define __PCI_PWRSEQ_H__ + +#include + +struct device; + +struct pci_pwrseq { + struct notifier_block nb; + struct device *dev; + struct device_link *link; +}; + +int pci_pwrseq_device_enable(struct pci_pwrseq *pwrseq); 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Wed, 17 Jan 2024 08:08:37 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 7/9] dt-bindings: wireless: ath11k: describe QCA6390 Date: Wed, 17 Jan 2024 17:07:46 +0100 Message-Id: <20240117160748.37682-8-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Describe the ath11k variant present on the QCA6390 module. Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- .../net/wireless/qcom,ath11k-pci.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci= .yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml index 817f02a8b481..c8ec9d313d93 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml @@ -16,6 +16,7 @@ description: | properties: compatible: enum: + - pci17cb,1101 # QCA6390 - pci17cb,1103 # WCN6855 =20 reg: @@ -27,10 +28,57 @@ properties: string to uniquely identify variant of the calibration data for desi= gns with colliding bus and device ids =20 + enable-gpios: + description: GPIO line enabling the ATH11K module when asserted. + maxItems: 1 + + vddio-supply: + description: VDD_IO supply regulator handle + + vddaon-supply: + description: VDD_AON supply regulator handle + + vddpmu-supply: + description: VDD_PMU supply regulator handle + + vddpcie1-supply: + description: VDD_PCIE1 supply regulator handle + + vddpcie2-supply: + description: VDD_PCIE2 supply regulator handle + + vddrfa1-supply: + description: VDD_RFA1 supply regulator handle + + vddrfa2-supply: + description: VDD_RFA2 supply regulator handle + + vddrfa3-supply: + description: VDD_RFA3 supply regulator handle + required: - compatible - reg =20 +allOf: + - if: + properties: + compatible: + contains: + enum: + - pci17cb,1103 + then: + properties: + enable-gpios: false + vddio-supply: false + vddaon-supply: false + vddpmu-supply: false + vddrfa1-supply: false + vddrfa2-supply: false + vddrfa3-supply: false + vddpcie1-supply: false + vddpcie2-supply: false + additionalProperties: false =20 examples: --=20 2.40.1 From nobody Thu Dec 25 10:30:01 2025 Received: from mail-wr1-f43.google.com (mail-wr1-f43.google.com [209.85.221.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D30224B5E for ; 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Wed, 17 Jan 2024 08:08:39 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:d0b5:43ec:48:baad]) by smtp.gmail.com with ESMTPSA id t10-20020a5d6a4a000000b00337b0374a3dsm1972092wrw.57.2024.01.17.08.08.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jan 2024 08:08:39 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 8/9] dt-bindings: wireless: ath11k: describe WCN7850 Date: Wed, 17 Jan 2024 17:07:47 +0100 Message-Id: <20240117160748.37682-9-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Describe the ath11k variant present on the WCN7850 module. Signed-off-by: Bartosz Golaszewski Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- .../net/wireless/qcom,ath11k-pci.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci= .yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml index c8ec9d313d93..5648c855a122 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml @@ -18,6 +18,7 @@ properties: enum: - pci17cb,1101 # QCA6390 - pci17cb,1103 # WCN6855 + - pci17cb,1107 # WCN7850 =20 reg: maxItems: 1 @@ -28,13 +29,25 @@ properties: string to uniquely identify variant of the calibration data for desi= gns with colliding bus and device ids =20 + clocks: + maxItems: 1 + enable-gpios: description: GPIO line enabling the ATH11K module when asserted. maxItems: 1 =20 + vdd-supply: + description: VDD supply regulator handle + + vdddig-supply: + description: VDD_DIG supply regulator handle + vddio-supply: description: VDD_IO supply regulator handle =20 + vddio12-supply: + description: VDD_IO12 supply regulator handle + vddaon-supply: description: VDD_AON supply regulator handle =20 @@ -61,6 +74,18 @@ required: - reg =20 allOf: + - if: + properties: + compatible: + contains: + enum: + - pci17cb,1101 + then: + properties: + clocks: false + vdd-supply: false + vdddig-supply: false + vddio12-supply: false - if: properties: compatible: @@ -69,7 +94,11 @@ allOf: - pci17cb,1103 then: properties: + clocks: false enable-gpios: false + vdd-supply: false + vddio12-supply: false + vdddig-supply: false vddio-supply: false vddaon-supply: false vddpmu-supply: false @@ -78,6 +107,18 @@ allOf: vddrfa3-supply: false vddpcie1-supply: false vddpcie2-supply: false + - if: + properties: + compatible: + contains: + enum: + - pci17cb,1107 + then: + properties: + vddpmu-supply: false + vddrfa3-supply: false + vddpcie1-supply: false + vddpcie2-supply: false =20 additionalProperties: false =20 --=20 2.40.1 From nobody Thu Dec 25 10:30:01 2025 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ADC7A25555 for ; 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Wed, 17 Jan 2024 08:08:41 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:d0b5:43ec:48:baad]) by smtp.gmail.com with ESMTPSA id t10-20020a5d6a4a000000b00337b0374a3dsm1972092wrw.57.2024.01.17.08.08.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jan 2024 08:08:40 -0800 (PST) From: Bartosz Golaszewski To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 9/9] PCI/pwrseq: add a pwrseq driver for QCA6390 Date: Wed, 17 Jan 2024 17:07:48 +0100 Message-Id: <20240117160748.37682-10-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Add a PCI power sequencing driver that's capable of correctly powering up the ath11k module on QCA6390 and WCN7850 using the PCI pwrseq functionality. Signed-off-by: Bartosz Golaszewski [Neil: add support for WCN7850] Signed-off-by: Neil Armstrong Tested-by: Neil Armstrong # on SM8550-QRD Tested-by: Neil Armstrong # on SM8650-QRD --- drivers/pci/pwrseq/Kconfig | 8 + drivers/pci/pwrseq/Makefile | 1 + drivers/pci/pwrseq/pci-pwrseq-qca6390.c | 267 ++++++++++++++++++++++++ 3 files changed, 276 insertions(+) create mode 100644 drivers/pci/pwrseq/pci-pwrseq-qca6390.c diff --git a/drivers/pci/pwrseq/Kconfig b/drivers/pci/pwrseq/Kconfig index a721a8a955c3..667c9c121f34 100644 --- a/drivers/pci/pwrseq/Kconfig +++ b/drivers/pci/pwrseq/Kconfig @@ -5,4 +5,12 @@ menu "PCI Power sequencing drivers" config PCI_PWRSEQ bool =20 +config PCI_PWRSEQ_QCA6390 + tristate "PCI Power Sequencing driver for QCA6390" + select PCI_PWRSEQ + default (ATH11K_PCI && ARCH_QCOM) + help + Enable support for the PCI power sequencing driver for the + ath11k module of the QCA6390 WLAN/BT chip. + endmenu diff --git a/drivers/pci/pwrseq/Makefile b/drivers/pci/pwrseq/Makefile index 4052b6bb5aa5..5cf8cce01e82 100644 --- a/drivers/pci/pwrseq/Makefile +++ b/drivers/pci/pwrseq/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 =20 obj-$(CONFIG_PCI_PWRSEQ) +=3D pwrseq.o +obj-$(CONFIG_PCI_PWRSEQ_QCA6390) +=3D pci-pwrseq-qca6390.o diff --git a/drivers/pci/pwrseq/pci-pwrseq-qca6390.c b/drivers/pci/pwrseq/p= ci-pwrseq-qca6390.c new file mode 100644 index 000000000000..cdf3639ea29f --- /dev/null +++ b/drivers/pci/pwrseq/pci-pwrseq-qca6390.c @@ -0,0 +1,267 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2023 Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct pci_pwrseq_qca6390_vreg { + const char *name; + unsigned int load_uA; +}; + +struct pci_pwrseq_qca6390_pdata { + struct pci_pwrseq_qca6390_vreg *vregs; + size_t num_vregs; + unsigned int delay_msec; +}; + +struct pci_pwrseq_qca6390_ctx { + struct pci_pwrseq pwrseq; + const struct pci_pwrseq_qca6390_pdata *pdata; + struct regulator_bulk_data *regs; + struct gpio_descs *en_gpios; + unsigned long *en_gpios_values; + struct clk *clk; +}; + +static struct pci_pwrseq_qca6390_vreg pci_pwrseq_qca6390_vregs[] =3D { + { + .name =3D "vddio", + .load_uA =3D 20000, + }, + { + .name =3D "vddaon", + .load_uA =3D 100000, + }, + { + .name =3D "vddpmu", + .load_uA =3D 1250000, + }, + { + .name =3D "vddpcie1", + .load_uA =3D 35000, + }, + { + .name =3D "vddpcie2", + .load_uA =3D 15000, + }, + { + .name =3D "vddrfa1", + .load_uA =3D 200000, + }, + { + .name =3D "vddrfa2", + .load_uA =3D 400000, + }, + { + .name =3D "vddrfa3", + .load_uA =3D 400000, + }, +}; + +static struct pci_pwrseq_qca6390_pdata pci_pwrseq_qca6390_of_data =3D { + .vregs =3D pci_pwrseq_qca6390_vregs, + .num_vregs =3D ARRAY_SIZE(pci_pwrseq_qca6390_vregs), + .delay_msec =3D 16, +}; + +static struct pci_pwrseq_qca6390_vreg pci_pwrseq_wcn7850_vregs[] =3D { + { + .name =3D "vdd", + }, + { + .name =3D "vddio", + }, + { + .name =3D "vddio12", + }, + { + .name =3D "vddaon", + }, + { + .name =3D "vdddig", + }, + { + .name =3D "vddrfa1", + }, + { + .name =3D "vddrfa2", + }, +}; + +static struct pci_pwrseq_qca6390_pdata pci_pwrseq_wcn7850_of_data =3D { + .vregs =3D pci_pwrseq_wcn7850_vregs, + .num_vregs =3D ARRAY_SIZE(pci_pwrseq_wcn7850_vregs), + .delay_msec =3D 50, +}; + +static int pci_pwrseq_qca6390_power_on(struct pci_pwrseq_qca6390_ctx *ctx) +{ + int ret; + + ret =3D regulator_bulk_enable(ctx->pdata->num_vregs, ctx->regs); + if (ret) + return ret; + + ret =3D clk_prepare_enable(ctx->clk); + if (ret) + return ret; + + bitmap_fill(ctx->en_gpios_values, ctx->en_gpios->ndescs); + + ret =3D gpiod_set_array_value_cansleep(ctx->en_gpios->ndescs, + ctx->en_gpios->desc, + ctx->en_gpios->info, + ctx->en_gpios_values); + if (ret) { + regulator_bulk_disable(ctx->pdata->num_vregs, ctx->regs); + return ret; + } + + if (ctx->pdata->delay_msec) + msleep(ctx->pdata->delay_msec); + + return 0; +} + +static int pci_pwrseq_qca6390_power_off(struct pci_pwrseq_qca6390_ctx *ctx) +{ + int ret; + + bitmap_zero(ctx->en_gpios_values, ctx->en_gpios->ndescs); + + ret =3D gpiod_set_array_value_cansleep(ctx->en_gpios->ndescs, + ctx->en_gpios->desc, + ctx->en_gpios->info, + ctx->en_gpios_values); + if (ret) + return ret; + + clk_disable_unprepare(ctx->clk); + + return regulator_bulk_disable(ctx->pdata->num_vregs, ctx->regs); +} + +static void devm_pci_pwrseq_qca6390_power_off(void *data) +{ + struct pci_pwrseq_qca6390_ctx *ctx =3D data; + + pci_pwrseq_qca6390_power_off(ctx); +} + +static int pci_pwrseq_qca6390_probe(struct platform_device *pdev) +{ + struct pci_pwrseq_qca6390_ctx *ctx; + struct device *dev =3D &pdev->dev; + int ret, i; + + ctx =3D devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + ctx->pdata =3D of_device_get_match_data(dev); + if (!ctx->pdata) + return dev_err_probe(dev, -ENODEV, + "Failed to obtain platform data\n"); + + if (ctx->pdata->vregs) { + ctx->regs =3D devm_kcalloc(dev, ctx->pdata->num_vregs, + sizeof(*ctx->regs), GFP_KERNEL); + if (!ctx->regs) + return -ENOMEM; + + for (i =3D 0; i < ctx->pdata->num_vregs; i++) + ctx->regs[i].supply =3D ctx->pdata->vregs[i].name; + + ret =3D devm_regulator_bulk_get(dev, ctx->pdata->num_vregs, + ctx->regs); + if (ret < 0) + return dev_err_probe(dev, ret, + "Failed to get all regulators\n"); + + for (i =3D 0; i < ctx->pdata->num_vregs; i++) { + if (!ctx->pdata->vregs[1].load_uA) + continue; + + ret =3D regulator_set_load(ctx->regs[i].consumer, + ctx->pdata->vregs[i].load_uA); + if (ret) + return dev_err_probe(dev, ret, + "Failed to set vreg load\n"); + } + } + + ctx->clk =3D devm_clk_get_optional(dev, NULL); + if (IS_ERR(ctx->clk)) + return dev_err_probe(dev, PTR_ERR(ctx->clk), + "Failed to get clock\n"); + + ctx->en_gpios =3D devm_gpiod_get_array_optional(dev, "enable", + GPIOD_OUT_LOW); + if (IS_ERR(ctx->en_gpios)) + return dev_err_probe(dev, PTR_ERR(ctx->en_gpios), + "Failed to get enable GPIOs\n"); + + ctx->en_gpios_values =3D devm_bitmap_zalloc(dev, ctx->en_gpios->ndescs, + GFP_KERNEL); + if (!ctx->en_gpios_values) + return -ENOMEM; + + ret =3D pci_pwrseq_qca6390_power_on(ctx); + if (ret) + return dev_err_probe(dev, ret, + "Failed to power on the device\n"); + + ret =3D devm_add_action_or_reset(dev, devm_pci_pwrseq_qca6390_power_off, + ctx); + if (ret) + return ret; + + ctx->pwrseq.dev =3D dev; + + ret =3D devm_pci_pwrseq_device_enable(dev, &ctx->pwrseq); + if (ret) + return dev_err_probe(dev, ret, + "Failed to register the pwrseq wrapper\n"); + + return 0; +} + +static const struct of_device_id pci_pwrseq_qca6390_of_match[] =3D { + { + .compatible =3D "pci17cb,1101", + .data =3D &pci_pwrseq_qca6390_of_data, + }, + { + .compatible =3D "pci17cb,1107", + .data =3D &pci_pwrseq_wcn7850_of_data, + }, + { } +}; +MODULE_DEVICE_TABLE(of, pci_pwrseq_qca6390_of_match); + +static struct platform_driver pci_pwrseq_qca6390_driver =3D { + .driver =3D { + .name =3D "pci-pwrseq-qca6390", + .of_match_table =3D pci_pwrseq_qca6390_of_match, + }, + .probe =3D pci_pwrseq_qca6390_probe, +}; +module_platform_driver(pci_pwrseq_qca6390_driver); + +MODULE_AUTHOR("Bartosz Golaszewski "); +MODULE_DESCRIPTION("PCI Power Sequencing module for QCA6390"); +MODULE_LICENSE("GPL"); --=20 2.40.1