From nobody Fri Dec 19 16:08:27 2025 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E28D208AF for ; Wed, 17 Jan 2024 14:14:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.156.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705500876; cv=none; b=pDuQr1AzLd2yAIo/jYVebKmuyu3gqklXk8V6HRCa1tJZRWqMqSYJIMc+Cg8bD2MLTS2kaYl5eugwp/AN/1R3Wql7H9TgshuqMacke+fPvVu0fgzWfcz2GOY4gTABgu4mrN63iRTl+D6eX/IgCmlBpKq+U7y80oYMXzSfiBWoKWc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705500876; c=relaxed/simple; bh=lmgZa7f/ELPa6toEIDJ0EyEhSq23V1tYphW716ZxMHc=; h=Received:DKIM-Signature:Received:Received:Received:Received:From: To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type: X-Proofpoint-GUID:X-Proofpoint-ORIG-GUID: X-Proofpoint-Virus-Version; b=itDxp7PvwXQm0y32+WzqmzCIyRShx8YMlDmx5QNHgRfEq94LOjP0Hbs8TSPKGpbiyWDBY64scr3YKUXoCw1Fmjyc7K0IA1Zfv3PkE6TgCOLNkqb5udcFdg0Imp99jm7QOQZN2onLRqyT17u8u9/Uw7Fj0BL1IE7pd64XdFIaw6o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com; spf=pass smtp.mailfrom=marvell.com; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b=MCdienl9; arc=none smtp.client-ip=67.231.156.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=marvell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="MCdienl9" Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40H9DZua012699; Wed, 17 Jan 2024 06:14:18 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=cax1QRJ5lsxNK1A2gaTh4NQDbx9TYQNto6HU4+Cjyck=; b=MCd ienl9Jp1cJld56wvt7+QqIVdn/KPA6IKuWxiJw9H1VKgHCB+Sx/gsCO3brIPtlyH Vm/EyqRzcVMUk9JjLqebljKUCBrmT2ZOCOD6s8oMLYXmKWefvwbPEVpZIxqAFm/l dXPyX5zT3dxTtXXplcAXxpOmcyKPht8m+z9RHPti7IiwOp0uSZHFD6W+EJITJA86 fuBL/0jFooNSzCYvvXoOTbXGi5f2vp0ywvKgxg5L2F1UM3O4ShJjdeoL7I8RUGtn 6mX3b69feFITBLFz9eYejuAKSuAcntv1ENVeJ7Uv/Y6rNInX2EkHZS9c/Ec8zxTs q3O341t3JBYaRK4wMUA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3vp0ge391x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 17 Jan 2024 06:14:17 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:15 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:15 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 7B9625B693F; Wed, 17 Jan 2024 06:14:12 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 01/14] fs/resctrl: group the resource control types for schemata list Date: Wed, 17 Jan 2024 19:43:52 +0530 Message-ID: <20240117141405.3063506-2-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: dg164YAmtkz7pJkD482dY42myEbx2shd X-Proofpoint-ORIG-GUID: dg164YAmtkz7pJkD482dY42myEbx2shd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" At the moment, resource control group support the basic control features (that can be applied to system resources like cache, and Memory) such as CAT (Cache Allocation Technology), and MBA (Memory Bandwidth Allocation). Apart from these basic controls, System can support other controls that does not directly affect the allocation of memory-system resources. Instead, it has an effect on conflicts that arise during access to resources, such as Priority partitioning found on ARM MPAM. In order to support control types of different nature, lets divide them into different groups, already existing control features (CAT, and MBA) is grouped under basic schemata type .i.e. SCHEMATA_BASIC, and to support priority partition (the downstream priority one), it is placed under SCHEMA_DSPRI control type. These control type is associated with list(s) of schemata. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * No change, it's new patch. --- fs/resctrl/rdtgroup.c | 26 ++++++++++++++++---------- include/linux/resctrl.h | 1 + include/linux/resctrl_types.h | 6 ++++++ 3 files changed, 23 insertions(+), 10 deletions(-) diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 9c5dfaaa7fa2..12e31d4dddf6 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -2256,7 +2256,9 @@ static int rdt_enable_ctx(struct rdt_fs_context *ctx) return ret; } =20 -static int schemata_list_add(struct rdt_resource *r, enum resctrl_conf_typ= e type) +static int schemata_list_add(struct rdt_resource *r, + enum resctrl_conf_type type, + enum resctrl_ctrl_type ctrl_type) { struct resctrl_schema *s; const char *suffix =3D ""; @@ -2284,10 +2286,12 @@ static int schemata_list_add(struct rdt_resource *r= , enum resctrl_conf_type type break; } =20 - ret =3D snprintf(s->name, sizeof(s->name), "%s%s", r->name, suffix); - if (ret >=3D sizeof(s->name)) { - kfree(s); - return -EINVAL; + if (ctrl_type =3D=3D SCHEMA_BASIC) { + ret =3D snprintf(s->name, sizeof(s->name), "%s%s", r->name, suffix); + if (ret >=3D sizeof(s->name)) { + kfree(s); + return -EINVAL; + } } =20 cl =3D strlen(s->name); @@ -2300,14 +2304,15 @@ static int schemata_list_add(struct rdt_resource *r= , enum resctrl_conf_type type if (r->cdp_capable && !resctrl_arch_get_cdp_enabled(r->rid)) cl +=3D 4; =20 - if (cl > max_name_width) + if (cl > max_name_width && ctrl_type =3D=3D SCHEMA_BASIC) max_name_width =3D cl; =20 /* * Choose a width for the resource data based on the resource that has * widest cbm/data_width. */ - max_data_width =3D max(max_data_width, r->data_width); + if (ctrl_type =3D=3D SCHEMA_BASIC) + max_data_width =3D max(max_data_width, r->data_width); =20 INIT_LIST_HEAD(&s->list); list_add(&s->list, &resctrl_schema_all); @@ -2328,17 +2333,18 @@ static int schemata_list_create(void) continue; =20 if (resctrl_arch_get_cdp_enabled(r->rid)) { - ret =3D schemata_list_add(r, CDP_CODE); + ret =3D schemata_list_add(r, CDP_CODE, SCHEMA_BASIC); if (ret) break; =20 - ret =3D schemata_list_add(r, CDP_DATA); + ret =3D schemata_list_add(r, CDP_DATA, SCHEMA_BASIC); } else { - ret =3D schemata_list_add(r, CDP_NONE); + ret =3D schemata_list_add(r, CDP_NONE, SCHEMA_BASIC); } =20 if (ret) break; + } =20 return ret; diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 3ad308e9e226..125c4b0c2ff7 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -249,6 +249,7 @@ struct resctrl_schema { struct list_head list; char name[8]; enum resctrl_conf_type conf_type; + enum resctrl_ctrl_type ctrl_type; struct rdt_resource *res; u32 num_closid; }; diff --git a/include/linux/resctrl_types.h b/include/linux/resctrl_types.h index 3897de9c4ecb..b9268ec3ba71 100644 --- a/include/linux/resctrl_types.h +++ b/include/linux/resctrl_types.h @@ -57,6 +57,12 @@ enum resctrl_res_level { RDT_NUM_RESOURCES, }; =20 +enum resctrl_ctrl_type { + SCHEMA_BASIC =3D 0, + SCHEMA_DSPRI, + SCHEMA_NUM_CTRL_TYPE +}; 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charset="utf-8" ARM MPAM supports different control that can be applied to different resources in the system, for instance priority partitioning control where priority value is generated from one MSC, propagates over interconnect to other MSC (known as downstream priority), or can be applied within an MSC for internal operations. This change lets the resctrl know the about MSC's priority partitioning capability. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * No change. --- drivers/platform/mpam/mpam_resctrl.c | 14 ++++++++++++++ include/linux/resctrl.h | 4 ++++ 2 files changed, 18 insertions(+) diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/m= pam_resctrl.c index 1dbfb6f6dd34..09618d9ceb1d 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -435,6 +435,16 @@ static bool cache_has_usable_cpor(struct mpam_class *c= lass) return (class->props.cpbm_wd <=3D RESCTRL_MAX_CBM); } =20 +static bool cache_has_usable_priority_part(struct mpam_class *class) +{ + struct mpam_props *cprops =3D &class->props; + + if (!mpam_has_feature(mpam_feat_dspri_part, cprops)) + return false; + + return (class->props.dspri_wd <=3D RESCTRL_MAX_DSPRI); +} + static bool cache_has_usable_csu(struct mpam_class *class) { struct mpam_props *cprops; @@ -691,6 +701,7 @@ static int mpam_resctrl_resource_init(struct mpam_resct= rl_res *res) res->resctrl_res.rid =3D=3D RDT_RESOURCE_L3) { bool has_csu =3D cache_has_usable_csu(class); bool has_mbwu =3D class_has_usable_mbwu(class); + bool has_ppart =3D cache_has_usable_priority_part(class); =20 /* TODO: Scaling is not yet supported */ r->cache.cbm_len =3D class->props.cpbm_wd; @@ -718,6 +729,9 @@ static int mpam_resctrl_resource_init(struct mpam_resct= rl_res *res) exposed_alloc_capable =3D true; } =20 + if (has_ppart) + r->priority_cap =3D true; + /* * MBWU counters may be 'local' or 'total' depending on where * they are in the topology. If The counter is on the L3, its diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 125c4b0c2ff7..d49aed80a05e 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -38,6 +38,8 @@ int proc_resctrl_show(struct seq_file *m, */ #define RESCTRL_MAX_CBM 32 =20 +#define RESCTRL_MAX_DSPRI 63 + /* The format for packing fields into the u64 'id' exposed to user-space */ #define RESCTRL_ID_CLOSID GENMASK_ULL(31, 0) #define RESCTRL_ID_RMID GENMASK_ULL(63, 32) @@ -195,6 +197,7 @@ struct resctrl_membw { * @rid: The index of the resource * @alloc_capable: Is allocation available on this machine * @mon_capable: Is monitor feature available on this machine + * @priority_capable: Is priority partitioning feature available on this= machine * @num_rmid: Number of RMIDs available * @cache_level: Which cache level defines scope of this resource * @cache: Cache allocation related data @@ -212,6 +215,7 @@ struct rdt_resource { int rid; bool alloc_capable; bool mon_capable; + bool priority_cap; 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charset="utf-8" At the moment, "schemata" list is consist of two basic control types .i.e. cache portion bitmap (CPBM), and memory bandwidth allocation (MBA), represented as following under schemata file. MB:0=3D0100 L3:0=3Dffff Lets' extend the "schemata" list to support priority partition control, This control is listed in following format (last column indicates the priority value) under schemata file. L3DSPRI:0=3Df Signed-off-by: Amit Singh Tomar --- Changes since RFC: * This patch is reworked, Now in order to configure DSPRI partition contr= ol dedicated schemata is used (L3DSPRI).=20 --- drivers/platform/mpam/mpam_resctrl.c | 7 +++++- fs/resctrl/rdtgroup.c | 34 ++++++++++++++++++++++------ include/linux/resctrl.h | 3 +++ include/linux/resctrl_types.h | 3 +++ 4 files changed, 39 insertions(+), 8 deletions(-) diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/m= pam_resctrl.c index 09618d9ceb1d..6fd2bfeffa0a 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -729,8 +729,13 @@ static int mpam_resctrl_resource_init(struct mpam_resc= trl_res *res) exposed_alloc_capable =3D true; } =20 - if (has_ppart) + if (has_ppart) { r->priority_cap =3D true; + if (class->props.dspri_wd > 0x10) + class->props.dspri_wd =3D 0x10; + + r->dspri_data_width =3D (class->props.dspri_wd + 3) / 4; + } =20 /* * MBWU counters may be 'local' or 'total' depending on where diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 12e31d4dddf6..568bb9bb7913 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -2261,7 +2261,7 @@ static int schemata_list_add(struct rdt_resource *r, enum resctrl_ctrl_type ctrl_type) { struct resctrl_schema *s; - const char *suffix =3D ""; + const char *suffix =3D "", *ext_suffix =3D ""; int ret, cl; =20 s =3D kzalloc(sizeof(*s), GFP_KERNEL); @@ -2286,12 +2286,22 @@ static int schemata_list_add(struct rdt_resource *r, break; } =20 - if (ctrl_type =3D=3D SCHEMA_BASIC) { + s->ctrl_type =3D ctrl_type; + switch (ctrl_type) { + case SCHEMA_DSPRI: + ext_suffix =3D "DSPRI"; + break; + } + + if (ctrl_type =3D=3D SCHEMA_BASIC) ret =3D snprintf(s->name, sizeof(s->name), "%s%s", r->name, suffix); - if (ret >=3D sizeof(s->name)) { - kfree(s); - return -EINVAL; - } + else + ret =3D snprintf(s->name, sizeof(s->name), "%s%s%s", r->name, + suffix, ext_suffix); + + if (ret >=3D sizeof(s->name)) { + kfree(s); + return -EINVAL; } =20 cl =3D strlen(s->name); @@ -2312,7 +2322,9 @@ static int schemata_list_add(struct rdt_resource *r, * widest cbm/data_width. */ if (ctrl_type =3D=3D SCHEMA_BASIC) - max_data_width =3D max(max_data_width, r->data_width); + s->max_data_width =3D max(max_data_width, r->data_width); + else + s->max_data_width =3D max(max_data_width, r->dspri_data_width); =20 INIT_LIST_HEAD(&s->list); list_add(&s->list, &resctrl_schema_all); @@ -2322,6 +2334,7 @@ static int schemata_list_add(struct rdt_resource *r, =20 static int schemata_list_create(void) { + enum resctrl_ctrl_type ctrl_type; enum resctrl_res_level i; struct rdt_resource *r; int ret =3D 0; @@ -2345,6 +2358,13 @@ static int schemata_list_create(void) if (ret) break; =20 + for_each_extend_ctrl_type(ctrl_type) { + if (ctrl_type =3D=3D 1 && r->priority_cap) { + ret =3D schemata_list_add(r, CDP_NONE, SCHEMA_DSPRI); + if (ret) + break; + } + } } =20 return ret; diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index d49aed80a05e..cb17c7704fd7 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -205,6 +205,7 @@ struct resctrl_membw { * @domains: RCU list of all domains for this resource * @name: Name to use in "schemata" file. * @data_width: Character width of data when displaying + * @dspri_data_width Character width of dspri value when displaying * @default_ctrl: Specifies default cache cbm or memory B/W percent. * @format_str: Per resource format string to show domain value * @evt_list: List of monitoring events @@ -223,6 +224,7 @@ struct rdt_resource { struct list_head domains; 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Wed, 17 Jan 2024 06:14:28 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:27 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:27 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 09B095B6932; Wed, 17 Jan 2024 06:14:23 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 04/14] fs/resctrl: Set-up downstream priority partition resources Date: Wed, 17 Jan 2024 19:43:55 +0530 Message-ID: <20240117141405.3063506-5-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: pjjdJceoYJ1X477T0McyxvG5TmSUHVCJ X-Proofpoint-GUID: pjjdJceoYJ1X477T0McyxvG5TmSUHVCJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" Upon resource control group creation, Cache portion bitmap, and Memory bandwidth allocation gets initialized to the default/maximum values, obtained from resource control code. Let's replicate it for priority partition resource, and setup the default downstream priority value. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * Reworked a bit to support new Schemata L3DSPRI, for instance, removed the "dspri_store" flag. =09 --- drivers/platform/mpam/mpam_resctrl.c | 1 + fs/resctrl/rdtgroup.c | 21 +++++++++++++++++++++ include/linux/resctrl.h | 2 ++ 3 files changed, 24 insertions(+) diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/m= pam_resctrl.c index 6fd2bfeffa0a..02efec42bbe2 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -735,6 +735,7 @@ static int mpam_resctrl_resource_init(struct mpam_resct= rl_res *res) class->props.dspri_wd =3D 0x10; =20 r->dspri_data_width =3D (class->props.dspri_wd + 3) / 4; + r->default_dspri_ctrl =3D BIT_MASK(class->props.dspri_wd) - 1; } =20 /* diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 568bb9bb7913..d57eb2c7afa7 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -3071,6 +3071,21 @@ static int rdtgroup_init_cat(struct resctrl_schema *= s, u32 closid) return 0; } =20 +/* Initialize with default downstream priority values. */ +static int rdtgroup_init_dspri(struct rdt_resource *r, u32 closid) +{ + struct resctrl_staged_config *cfg; + struct rdt_domain *d; + + list_for_each_entry(d, &r->domains, list) { + cfg =3D &d->staged_config[CDP_NONE]; + cfg->new_ctrl =3D r->default_dspri_ctrl; + cfg->have_new_ctrl =3D true; + } + + return 0; +} + /* Initialize MBA resource with default values. */ static void rdtgroup_init_mba(struct rdt_resource *r, u32 closid) { @@ -3108,6 +3123,12 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtg= rp) return ret; } =20 + if (r->priority_cap && s->ctrl_type =3D=3D SCHEMA_DSPRI) { + ret =3D rdtgroup_init_dspri(r, rdtgrp->closid); + if (ret < 0) + return ret; + } + ret =3D resctrl_arch_update_domains(r, rdtgrp->closid); if (ret < 0) { rdt_last_cmd_puts("Failed to initialize allocations\n"); diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index cb17c7704fd7..93b3e3b21d5d 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -207,6 +207,7 @@ struct resctrl_membw { * @data_width: Character width of data when displaying * @dspri_data_width Character width of dspri value when displaying * @default_ctrl: Specifies default cache cbm or memory B/W percent. + * @default_dspri_ctrl: Specifies default downstream priority value. * @format_str: Per resource format string to show domain value * @evt_list: List of monitoring events * @fflags: flags to choose base and info files @@ -226,6 +227,7 @@ struct rdt_resource { int data_width; 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charset="utf-8" Now that, we have support for different control types, divided into the BASIC and PRIORITY controls types. Schemata list is pertained to the SCHEMAT_BASIC control type that is used to set up/configure CAT (Cache Allocation Technology) and MBA (Memory Bandwidth Allocation) capabilities, and SCHEMAT_DSPRI used to configure downstream priority partitioning. Let's add boilerplate changes to fetch the control configuration based on different control types. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * No change, it's new patch. --- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 3 ++- drivers/platform/mpam/mpam_resctrl.c | 3 ++- fs/resctrl/ctrlmondata.c | 6 ++++-- fs/resctrl/monitor.c | 3 ++- fs/resctrl/rdtgroup.c | 19 +++++++++++++------ include/linux/resctrl.h | 3 ++- 6 files changed, 25 insertions(+), 12 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index 0d10107eab62..b34e86cfc111 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -116,7 +116,8 @@ int resctrl_arch_update_domains(struct rdt_resource *r,= u32 closid) } =20 u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, - u32 closid, enum resctrl_conf_type type) + u32 closid, enum resctrl_conf_type type, + enum resctrl_conf_type ctrl_type) { struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); u32 idx =3D resctrl_get_config_index(closid, type); diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/m= pam_resctrl.c index 02efec42bbe2..4c44d65e6047 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -848,7 +848,8 @@ void mpam_resctrl_exit(void) } =20 u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d, - u32 closid, enum resctrl_conf_type type) + u32 closid, enum resctrl_conf_type type, + enum resctrl_ctrl_type ctrl_type) { u32 partid; struct mpam_config *cfg; diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 27d8bc25a4cb..451cbb7357fb 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -373,6 +373,7 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_file= *of, =20 static void show_doms(struct seq_file *s, struct resctrl_schema *schema, i= nt closid) { + enum resctrl_ctrl_type ctrl_type =3D schema->ctrl_type; struct rdt_resource *r =3D schema->res; struct rdt_domain *dom; bool sep =3D false; @@ -390,9 +391,10 @@ static void show_doms(struct seq_file *s, struct resct= rl_schema *schema, int clo ctrl_val =3D dom->mbps_val[closid]; else ctrl_val =3D resctrl_arch_get_config(r, dom, closid, - schema->conf_type); + schema->conf_type, + ctrl_type); =20 - seq_printf(s, r->format_str, dom->id, max_data_width, + seq_printf(s, r->format_str, dom->id, schema->max_data_width, ctrl_val); sep =3D true; } diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c index 885b0ca177b0..6c0804273753 100644 --- a/fs/resctrl/monitor.c +++ b/fs/resctrl/monitor.c @@ -478,7 +478,8 @@ static void update_mba_bw(struct rdtgroup *rgrp, struct= rdt_domain *dom_mbm) delta_bw =3D pmbm_data->delta_bw; =20 /* MBA resource doesn't support CDP */ - cur_msr_val =3D resctrl_arch_get_config(r_mba, dom_mba, closid, CDP_NONE); + cur_msr_val =3D resctrl_arch_get_config(r_mba, dom_mba, closid, CDP_NONE, + SCHEMA_BASIC); =20 /* * For Ctrl groups read data from child monitor groups. diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index d57eb2c7afa7..92d9bee210eb 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1064,7 +1064,8 @@ static int rdt_bit_usage_show(struct kernfs_open_file= *of, if (!closid_allocated(i)) continue; ctrl_val =3D resctrl_arch_get_config(r, dom, i, - s->conf_type); + s->conf_type, + s->ctrl_type); mode =3D rdtgroup_mode_by_closid(i); switch (mode) { case RDT_MODE_SHAREABLE: @@ -1281,7 +1282,7 @@ static bool __rdtgroup_cbm_overlaps(struct rdt_resour= ce *r, struct rdt_domain *d =20 /* Check for overlap with other resource groups */ for (i =3D 0; i < closids_supported(); i++) { - ctrl_b =3D resctrl_arch_get_config(r, d, i, type); + ctrl_b =3D resctrl_arch_get_config(r, d, i, type, SCHEMA_BASIC); mode =3D rdtgroup_mode_by_closid(i); if (closid_allocated(i) && i !=3D closid && mode !=3D RDT_MODE_PSEUDO_LOCKSETUP) { @@ -1365,7 +1366,8 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgr= oup *rdtgrp) has_cache =3D true; list_for_each_entry(d, &r->domains, list) { ctrl =3D resctrl_arch_get_config(r, d, closid, - s->conf_type); + s->conf_type, + s->ctrl_type); if (rdtgroup_cbm_overlaps(s, d, ctrl, closid, false)) { rdt_last_cmd_puts("Schemata overlaps\n"); return false; @@ -1499,6 +1501,7 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, struct seq_file *s, void *v) { struct resctrl_schema *schema; + enum resctrl_ctrl_type ctrl_type; enum resctrl_conf_type type; struct rdtgroup *rdtgrp; struct rdt_resource *r; @@ -1536,6 +1539,7 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, list_for_each_entry(schema, &resctrl_schema_all, list) { r =3D schema->res; type =3D schema->conf_type; + ctrl_type =3D schema->ctrl_type; sep =3D false; seq_printf(s, "%*s:", max_name_width, schema->name); list_for_each_entry(d, &r->domains, list) { @@ -1549,7 +1553,8 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, else ctrl =3D resctrl_arch_get_config(r, d, closid, - type); + type, + ctrl_type); if (r->rid =3D=3D RDT_RESOURCE_MBA) size =3D ctrl; else @@ -3013,11 +3018,13 @@ static int __init_one_rdt_domain(struct rdt_domain = *d, struct resctrl_schema *s, */ if (resctrl_arch_get_cdp_enabled(r->rid)) peer_ctl =3D resctrl_arch_get_config(r, d, i, - peer_type); + peer_type, + s->ctrl_type); else peer_ctl =3D 0; ctrl_val =3D resctrl_arch_get_config(r, d, i, - s->conf_type); + s->conf_type, + s->ctrl_type); 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Wed, 17 Jan 2024 06:14:36 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:35 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:35 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id B26705B6932; Wed, 17 Jan 2024 06:14:31 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 06/14] arm_mpam: resctrl: Retrieve priority values from arch code Date: Wed, 17 Jan 2024 19:43:57 +0530 Message-ID: <20240117141405.3063506-7-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: R37DkmxraFyJkxBGo5nvB__FmHpVufj_ X-Proofpoint-GUID: R37DkmxraFyJkxBGo5nvB__FmHpVufj_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" Downstream priority values can be read from the "schemata" file, which is fetched from mpam_config structure. This change does the necessary modifications in arch specific code to facilitate reading priority values. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * Reworked, To configure DSPRI partition control use control type instead of dspri_show/store flags. --- drivers/platform/mpam/mpam_internal.h | 1 + drivers/platform/mpam/mpam_resctrl.c | 23 ++++++++++++++++++----- 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/platform/mpam/mpam_internal.h b/drivers/platform/mpam/= mpam_internal.h index 30e32389d394..45552ae6548b 100644 --- a/drivers/platform/mpam/mpam_internal.h +++ b/drivers/platform/mpam/mpam_internal.h @@ -160,6 +160,7 @@ struct mpam_config { u32 cpbm; u32 mbw_pbm; u16 mbw_max; + u16 dspri; }; =20 struct mpam_component diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/m= pam_resctrl.c index 4c44d65e6047..0de09e9deee5 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -860,8 +860,12 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, st= ruct rdt_domain *d, =20 lockdep_assert_cpus_held(); =20 - if (!mpam_is_enabled()) - return r->default_ctrl; + if (!mpam_is_enabled()) { + if (ctrl_type =3D=3D SCHEMA_DSPRI) + return r->default_dspri_ctrl; + else + return r->default_ctrl; + } =20 res =3D container_of(r, struct mpam_resctrl_res, resctrl_res); dom =3D container_of(d, struct mpam_resctrl_dom, resctrl_dom); @@ -873,7 +877,10 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, st= ruct rdt_domain *d, switch (r->rid) { case RDT_RESOURCE_L2: case RDT_RESOURCE_L3: - configured_by =3D mpam_feat_cpor_part; + if (ctrl_type =3D=3D SCHEMA_DSPRI) + configured_by =3D mpam_feat_dspri_part; + else + configured_by =3D mpam_feat_cpor_part; break; case RDT_RESOURCE_MBA: if (mba_class_use_mbw_part(cprops)) { @@ -889,13 +896,19 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, s= truct rdt_domain *d, } =20 if (!r->alloc_capable || partid >=3D resctrl_arch_get_num_closid(r) || - !mpam_has_feature(configured_by, cfg)) - return r->default_ctrl; + !mpam_has_feature(configured_by, cfg)) { + if (ctrl_type =3D=3D SCHEMA_DSPRI) + return r->default_dspri_ctrl; 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Wed, 17 Jan 2024 06:14:40 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:38 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:38 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 8B60E5B6933; Wed, 17 Jan 2024 06:14:35 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 07/14] fs/resctrl: Schemata write only for intended resource Date: Wed, 17 Jan 2024 19:43:58 +0530 Message-ID: <20240117141405.3063506-8-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: 8fM2urcjehga6paIeoziVV4rQ93g8m6D X-Proofpoint-ORIG-GUID: 8fM2urcjehga6paIeoziVV4rQ93g8m6D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" At present, schemata write (for Cache Portion Bit Map or Memory Bandwidth Allocation) goes through list of all the resources (supported by schemata), and regardless of write for one resource, it attempts to write for all other resources. As an example, When the intended write is for only MBA resource, it attempts (by calling resctrl_arch_update_domains) to write for CPBM as well. Fix it, by doing schemata write based on input schemata supplied from user. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * No change, it's new patch. --- fs/resctrl/ctrlmondata.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 451cbb7357fb..78f9fb1c52fa 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -351,9 +351,11 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_fil= e *of, if (is_mba_sc(r)) continue; =20 - ret =3D resctrl_arch_update_domains(r, rdtgrp->closid); - if (ret) - goto out; + if (!strcmp(resname, s->name)) { + ret =3D resctrl_arch_update_domains(r, rdtgrp->closid); + if (ret) + goto out; + } } =20 if (rdtgrp->mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP) { --=20 2.25.1 From nobody Fri Dec 19 16:08:27 2025 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16EAA21A16 for ; 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Wed, 17 Jan 2024 06:14:44 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:42 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:42 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 6DC035B6931; Wed, 17 Jan 2024 06:14:39 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 08/14] fs/resctrl: Extend schemata write for priority partition control Date: Wed, 17 Jan 2024 19:43:59 +0530 Message-ID: <20240117141405.3063506-9-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: 6BxRsaXflju6f4cNxs1tIwQfGAIJiaHO X-Proofpoint-GUID: 6BxRsaXflju6f4cNxs1tIwQfGAIJiaHO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" Currently, Users can pass the configurations for CPBM, and MBA through schemata file. For instance, CPBM can be passed using: echo L3:0=3Dffff > schemata This change allows, users to pass a new configuration for downstream priority. For instance, dspri value of "0xa" can be passed as: echo L3DSPRI:0=3Da > schemata Signed-off-by: Amit Singh Tomar --- Changes since RFC: * As suggested by Fenghua Yu, Parse for DSPRI is called from parse_line(). * Decluttering code from rdtgroup_schemata_write(). --- fs/resctrl/ctrlmondata.c | 59 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 56 insertions(+), 3 deletions(-) diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 78f9fb1c52fa..f1f57bbfa094 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -30,6 +30,55 @@ typedef int (ctrlval_parser_t)(struct rdt_parse_data *da= ta, struct resctrl_schema *s, struct rdt_domain *d); =20 +static bool dspri_validate(char *buf, unsigned long *data, struct rdt_reso= urce *r) +{ + + unsigned long dspri_val; + bool success =3D true; + int ret; + + ret =3D kstrtoul(buf, 16, &dspri_val); + if (ret) { + pr_info("Non-hex character in the mask %s\n", buf); + success =3D false; + goto out; + } + + if (dspri_val > r->default_dspri_ctrl) { + pr_info("dspri value %ld out of range [%d-%d]\n", dspri_val, + 0, r->default_dspri_ctrl); + success =3D false; + goto out; + } + + *data =3D dspri_val; + +out: + return success; +} + +static int parse_dspri(struct rdt_parse_data *data, struct resctrl_schema = *s, + struct rdt_domain *d) +{ + struct resctrl_staged_config *cfg; + struct rdt_resource *r =3D s->res; + unsigned long pri_val; + + cfg =3D &d->staged_config[s->conf_type]; + if (cfg->have_new_ctrl) { + pr_info("Duplicate domain %d\n", d->id); + return -EINVAL; + } + + if (!dspri_validate(data->buf, &pri_val, r)) + return -EINVAL; + + cfg->new_ctrl =3D pri_val; + cfg->have_new_ctrl =3D true; + + return 0; +} + /* * Check whether MBA bandwidth percentage value is correct. The value is * checked against the minimum and max bandwidth values specified by the @@ -201,10 +250,14 @@ static int parse_cbm(struct rdt_parse_data *data, str= uct resctrl_schema *s, return 0; } =20 -static ctrlval_parser_t *get_parser(struct rdt_resource *res) +static ctrlval_parser_t *get_parser(struct resctrl_schema *s) { - if (res->fflags & RFTYPE_RES_CACHE) + struct rdt_resource *res =3D s->res; + + if (res->fflags & RFTYPE_RES_CACHE && !s->ctrl_type) return &parse_cbm; + else if (s->ctrl_type =3D=3D SCHEMA_DSPRI) + return &parse_dspri; else return &parse_bw; } @@ -218,7 +271,7 @@ static ctrlval_parser_t *get_parser(struct rdt_resource= *res) static int parse_line(char *line, struct resctrl_schema *s, struct rdtgroup *rdtgrp) { - ctrlval_parser_t *parse_ctrlval =3D get_parser(s->res); + ctrlval_parser_t *parse_ctrlval =3D get_parser(s); enum resctrl_conf_type t =3D s->conf_type; struct resctrl_staged_config *cfg; struct rdt_resource *r =3D s->res; --=20 2.25.1 From nobody Fri Dec 19 16:08:27 2025 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 510D621A19 for ; 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Wed, 17 Jan 2024 06:14:48 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:46 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:46 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 492455B6932; Wed, 17 Jan 2024 06:14:43 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 09/14] fs/resctrl: set configuration based on Control type Date: Wed, 17 Jan 2024 19:44:00 +0530 Message-ID: <20240117141405.3063506-10-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: ZUM7RWHKmN4PPOpzbZYqgyMr01Hrf6Xw X-Proofpoint-GUID: ZUM7RWHKmN4PPOpzbZYqgyMr01Hrf6Xw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" Now that, we have support for different control types, divided into the BASIC and PRIORITY controls types. Schemata list is pertained to the SCHEMAT_BASIC control type that is used to set up/configure CAT (Cache Allocation Technology) and MBA (Memory Bandwidth Allocation) capabilities, and SCHEMAT_DSPRI used to configure downstream priority partitioning. Let's add boilerplate changes to set the control configuration based on different control types. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * No change, it's new patch. --- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 6 ++++-- drivers/platform/mpam/mpam_resctrl.c | 9 ++++++--- fs/resctrl/ctrlmondata.c | 3 ++- fs/resctrl/monitor.c | 3 ++- fs/resctrl/rdtgroup.c | 3 ++- include/linux/resctrl.h | 6 ++++-- 6 files changed, 20 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index b34e86cfc111..4423d8979b5e 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -39,7 +39,8 @@ static bool apply_config(struct rdt_hw_domain *hw_dom, } =20 int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d, - u32 closid, enum resctrl_conf_type t, u32 cfg_val) + u32 closid, enum resctrl_conf_type t, u32 cfg_val, + enum resctrl_ctrl_type type) { struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); @@ -59,7 +60,8 @@ int resctrl_arch_update_one(struct rdt_resource *r, struc= t rdt_domain *d, return 0; } =20 -int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) +int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid, + enum resctrl_ctrl_type type) { struct resctrl_staged_config *cfg; struct rdt_hw_domain *hw_dom; diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/m= pam_resctrl.c index 0de09e9deee5..7a797f9bcaed 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -920,7 +920,8 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, str= uct rdt_domain *d, } =20 int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d, - u32 closid, enum resctrl_conf_type t, u32 cfg_val) + u32 closid, enum resctrl_conf_type t, u32 cfg_val, + enum resctrl_ctrl_type type) { int err; u32 partid; @@ -983,7 +984,8 @@ int resctrl_arch_update_one(struct rdt_resource *r, str= uct rdt_domain *d, } =20 /* TODO: this is IPI heavy */ -int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) +int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid, + enum resctrl_ctrl_type type) { int err =3D 0; struct rdt_domain *d; @@ -1000,7 +1002,8 @@ int resctrl_arch_update_domains(struct rdt_resource *= r, u32 closid) continue; =20 err =3D resctrl_arch_update_one(r, d, closid, t, - cfg->new_ctrl); + cfg->new_ctrl, + type); if (err) return err; } diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index f1f57bbfa094..005a91192847 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -405,7 +405,8 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_file= *of, continue; =20 if (!strcmp(resname, s->name)) { - ret =3D resctrl_arch_update_domains(r, rdtgrp->closid); + ret =3D resctrl_arch_update_domains(r, rdtgrp->closid, + s->ctrl_type); if (ret) goto out; } diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c index 6c0804273753..5eccb38cb7d7 100644 --- a/fs/resctrl/monitor.c +++ b/fs/resctrl/monitor.c @@ -514,7 +514,8 @@ static void update_mba_bw(struct rdtgroup *rgrp, struct= rdt_domain *dom_mbm) return; } =20 - resctrl_arch_update_one(r_mba, dom_mba, closid, CDP_NONE, new_msr_val); + resctrl_arch_update_one(r_mba, dom_mba, closid, CDP_NONE, new_msr_val, + SCHEMA_BASIC); =20 /* * Delta values are updated dynamically package wise for each diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 92d9bee210eb..d71fac0ae4d4 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -3136,7 +3136,8 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgr= p) return ret; } =20 - ret =3D resctrl_arch_update_domains(r, rdtgrp->closid); + ret =3D resctrl_arch_update_domains(r, rdtgrp->closid, + s->ctrl_type); if (ret < 0) { rdt_last_cmd_puts("Failed to initialize allocations\n"); return ret; diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 2c0dc01d070e..f28d4ff737dc 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -334,7 +334,8 @@ int resctrl_rdtgroup_show(struct seq_file *seq, u32 clo= sid, u32 rmid); u32 resctrl_arch_get_num_closid(struct rdt_resource *r); =20 struct rdt_domain *resctrl_arch_find_domain(struct rdt_resource *r, int id= ); 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Wed, 17 Jan 2024 06:14:52 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:50 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:50 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 25DA35B6931; Wed, 17 Jan 2024 06:14:46 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 10/14] arm_mpam: resctrl: Facilitate writing downstream priority value Date: Wed, 17 Jan 2024 19:44:01 +0530 Message-ID: <20240117141405.3063506-11-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: qrSVuiQUoMB2R6Cr5vwbsSEvLyZpLED2 X-Proofpoint-GUID: qrSVuiQUoMB2R6Cr5vwbsSEvLyZpLED2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" This change provides a way to write downstream priority value (passed from schemata file) to arch specific resource control code. The priority value is stored in mpam_config structure, and eventually gets programmed into MPAMCFG_PRI register. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * Schemata write is based on Control type. --- drivers/platform/mpam/mpam_devices.c | 4 ---- drivers/platform/mpam/mpam_resctrl.c | 26 ++++++++++++++++---------- 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/m= pam_devices.c index 589ff1ef2b6b..3ef9e5d70afc 100644 --- a/drivers/platform/mpam/mpam_devices.c +++ b/drivers/platform/mpam/mpam_devices.c @@ -2329,10 +2329,6 @@ int mpam_apply_config(struct mpam_component *comp, u= 16 partid, =20 lockdep_assert_cpus_held(); =20 - if (!memcmp(&comp->cfg[partid], cfg, sizeof(*cfg))) - return 0; - - comp->cfg[partid] =3D *cfg; arg.comp =3D comp; arg.partid =3D partid; =20 diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/m= pam_resctrl.c index 7a797f9bcaed..42602bffba3f 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -925,7 +925,7 @@ int resctrl_arch_update_one(struct rdt_resource *r, str= uct rdt_domain *d, { int err; u32 partid; - struct mpam_config cfg; + struct mpam_config *cfg; struct mpam_props *cprops; struct mpam_resctrl_res *res; struct mpam_resctrl_dom *dom; @@ -940,24 +940,30 @@ int resctrl_arch_update_one(struct rdt_resource *r, s= truct rdt_domain *d, cprops =3D &res->class->props; =20 partid =3D resctrl_get_config_index(closid, t); + cfg =3D &dom->comp->cfg[partid]; if (!r->alloc_capable || partid >=3D resctrl_arch_get_num_closid(r)) return -EINVAL; =20 switch (r->rid) { case RDT_RESOURCE_L2: case RDT_RESOURCE_L3: + if (type =3D=3D SCHEMA_DSPRI) { + cfg->dspri =3D cfg_val; + mpam_set_feature(mpam_feat_dspri_part, cfg); + } else { /* TODO: Scaling is not yet supported */ - cfg.cpbm =3D cfg_val; - mpam_set_feature(mpam_feat_cpor_part, &cfg); + cfg->cpbm =3D cfg_val; + mpam_set_feature(mpam_feat_cpor_part, cfg); + } break; case RDT_RESOURCE_MBA: if (mba_class_use_mbw_part(cprops)) { - cfg.mbw_pbm =3D percent_to_mbw_pbm(cfg_val, cprops); - mpam_set_feature(mpam_feat_mbw_part, &cfg); + cfg->mbw_pbm =3D percent_to_mbw_pbm(cfg_val, cprops); + mpam_set_feature(mpam_feat_mbw_part, cfg); break; } else if (mpam_has_feature(mpam_feat_mbw_max, cprops)) { - cfg.mbw_max =3D percent_to_mbw_max(cfg_val, cprops); - mpam_set_feature(mpam_feat_mbw_max, &cfg); + cfg->mbw_max =3D percent_to_mbw_max(cfg_val, cprops); + mpam_set_feature(mpam_feat_mbw_max, cfg); break; } fallthrough; @@ -971,15 +977,15 @@ int resctrl_arch_update_one(struct rdt_resource *r, s= truct rdt_domain *d, */ if (mpam_resctrl_hide_cdp(r->rid)) { partid =3D resctrl_get_config_index(closid, CDP_CODE); - err =3D mpam_apply_config(dom->comp, partid, &cfg); + err =3D mpam_apply_config(dom->comp, partid, cfg); if (err) return err; =20 partid =3D resctrl_get_config_index(closid, CDP_DATA); - return mpam_apply_config(dom->comp, partid, &cfg); + return mpam_apply_config(dom->comp, partid, cfg); =20 } else { - return mpam_apply_config(dom->comp, partid, &cfg); + return mpam_apply_config(dom->comp, partid, cfg); } } =20 --=20 2.25.1 From nobody Fri Dec 19 16:08:27 2025 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F295E224DA for ; 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charset="utf-8" MPAMF_PRI_IDR_NS[DSPRI_WD] determines the number of implemented bits in the downstream priority field (MPAMCFG_PRI_NS). For instance, if the value of DSPRI_WD is 4, then the maximum value for dspri is 0xf, and mask should be GENMASK(3,0). But with current implementation, it turned out to be GENMASK(4,0) .i.e. 0x1f instead of 0xf. u16 dspri =3D GENMASK(rprops->dspri_wd, 0); Let's fix it (for both downstream, and internal), by subtracting 1 from DSPRI_WD, and INTPRI_WD value. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * Include fix for INTPRI as well. --- drivers/platform/mpam/mpam_devices.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/m= pam_devices.c index 3ef9e5d70afc..9953f2050d35 100644 --- a/drivers/platform/mpam/mpam_devices.c +++ b/drivers/platform/mpam/mpam_devices.c @@ -1099,8 +1099,8 @@ static void mpam_reprogram_ris_partid(struct mpam_msc= _ris *ris, u16 partid, struct mpam_msc *msc =3D ris->msc; u16 bwa_fract =3D MPAMCFG_MBW_MAX_MAX; struct mpam_props *rprops =3D &ris->props; - u16 dspri =3D GENMASK(rprops->dspri_wd, 0); - u16 intpri =3D GENMASK(rprops->intpri_wd, 0); + u16 dspri =3D GENMASK((rprops->dspri_wd - 1), 0); + u16 intpri =3D GENMASK((rprops->intpri_wd - 1), 0); =20 lockdep_assert_held(&msc->lock); =20 --=20 2.25.1 From nobody Fri Dec 19 16:08:27 2025 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18E7820B1E for ; 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Wed, 17 Jan 2024 06:15:00 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 17 Jan 2024 06:14:58 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:58 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id D7A7D5B6931; Wed, 17 Jan 2024 06:14:54 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 12/14] arm_mpam: Program Downstream priority value Date: Wed, 17 Jan 2024 19:44:03 +0530 Message-ID: <20240117141405.3063506-13-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: zpp2hqTM8jJAkQKnD65_Nno9V8gilWRY X-Proofpoint-ORIG-GUID: zpp2hqTM8jJAkQKnD65_Nno9V8gilWRY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" Now that Downstream priorities values can be passed from resource control schemata file, let's program it into memory mapped Priority Partition Configuration Register. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * Priority value is inverted based on DSPRI_0_IS_LOW value. --- drivers/platform/mpam/mpam_devices.c | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/m= pam_devices.c index 9953f2050d35..388d57281fd8 100644 --- a/drivers/platform/mpam/mpam_devices.c +++ b/drivers/platform/mpam/mpam_devices.c @@ -1101,6 +1101,7 @@ static void mpam_reprogram_ris_partid(struct mpam_msc= _ris *ris, u16 partid, struct mpam_props *rprops =3D &ris->props; u16 dspri =3D GENMASK((rprops->dspri_wd - 1), 0); u16 intpri =3D GENMASK((rprops->intpri_wd - 1), 0); + u8 dspri_part_0_low, dspri_rprops, dspri_cfg; =20 lockdep_assert_held(&msc->lock); =20 @@ -1143,18 +1144,33 @@ static void mpam_reprogram_ris_partid(struct mpam_m= sc_ris *ris, u16 partid, if (mpam_has_feature(mpam_feat_ccap_part, rprops)) mpam_write_partsel_reg(msc, CMAX, cmax); =20 - if (mpam_has_feature(mpam_feat_intpri_part, rprops) || - mpam_has_feature(mpam_feat_dspri_part, rprops)) { + if (mpam_has_feature(mpam_feat_intpri_part, rprops)) { /* aces high? */ if (!mpam_has_feature(mpam_feat_intpri_part_0_low, rprops)) intpri =3D 0; - if (!mpam_has_feature(mpam_feat_dspri_part_0_low, rprops)) - dspri =3D 0; =20 if (mpam_has_feature(mpam_feat_intpri_part, rprops)) pri_val |=3D FIELD_PREP(MPAMCFG_PRI_INTPRI, intpri); - if (mpam_has_feature(mpam_feat_dspri_part, rprops)) - pri_val |=3D FIELD_PREP(MPAMCFG_PRI_DSPRI, dspri); + + mpam_write_partsel_reg(msc, PRI, pri_val); + } + + dspri_rprops =3D mpam_has_feature(mpam_feat_dspri_part, + rprops); + dspri_part_0_low =3D mpam_has_feature(mpam_feat_dspri_part_0_low, + rprops); + if (dspri_rprops) { + dspri_cfg =3D mpam_has_feature(mpam_feat_dspri_part, + cfg); + if (dspri_cfg) { + pri_val |=3D (!dspri_part_0_low) + ? FIELD_PREP(MPAMCFG_PRI_DSPRI, cfg->dspri ^ dspri) + : FIELD_PREP(MPAMCFG_PRI_DSPRI, cfg->dspri & dspri); + } else { + pri_val |=3D (!dspri_part_0_low) + ? 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For instance, on MARVELL SoC MPAMF_IDR_NS[RIS_MAX] (under LLC MSC) is 0x2, and there are three different resource at index 0,1,2. These are enumerated in TAD_CMN_MPAM_RIS_E: 0: MSC 1: LTG 2: DTG LLC MSC resource at index 0 has the Priority partitioning features. If MPAMCFG_PART_SEL_NS[RIS] is set to 0 (MSC), then MPAMF_IDR_NS[HAS_PRI_PA= RT] is set to 1, leaving HAS_CPOR_PART bit to 0. CPOR and PRI_PART are mutually exclusive resources as far configuration is concerned. With this change, multiple resource instances that maps to different control, say LTG for CPOR, and MSC for PRI_PART is handled properly. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * Trimmed down the commit message. * Tried to handle the corner case as suggested by Jonathan by calling the __resource_props_mismatch even when different controls are enumerated at different RIS index. --- drivers/platform/mpam/mpam_devices.c | 36 ++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/m= pam_devices.c index 388d57281fd8..df7ac2c8bcb3 100644 --- a/drivers/platform/mpam/mpam_devices.c +++ b/drivers/platform/mpam/mpam_devices.c @@ -1788,11 +1788,15 @@ __resource_props_mismatch(struct mpam_msc_ris *ris,= struct mpam_class *class) =20 lockdep_assert_held(&mpam_list_lock); /* we modify class */ =20 - /* Clear missing features */ - cprops->features &=3D rprops->features; + /* Clear missing features, we don't want to clear features, + * when different controls are implemented at different RIS + * index. + */ + if (class->props.features =3D=3D ris->props.features) + cprops->features &=3D rprops->features; =20 /* Clear incompatible features */ - if (cprops->cpbm_wd !=3D rprops->cpbm_wd) + if (cprops->cpbm_wd !=3D rprops->cpbm_wd && rprops->cpbm_wd) mpam_clear_feature(mpam_feat_cpor_part, &cprops->features); if (cprops->mbw_pbm_bits !=3D rprops->mbw_pbm_bits) mpam_clear_feature(mpam_feat_mbw_part, &cprops->features); @@ -1802,14 +1806,14 @@ __resource_props_mismatch(struct mpam_msc_ris *ris,= struct mpam_class *class) cprops->bwa_wd =3D min(cprops->bwa_wd, rprops->bwa_wd); =20 /* For num properties, take the minimum */ - if (cprops->num_csu_mon !=3D rprops->num_csu_mon) + if (cprops->num_csu_mon !=3D rprops->num_csu_mon && rprops->num_csu_mon) cprops->num_csu_mon =3D min(cprops->num_csu_mon, rprops->num_csu_mon); if (cprops->num_mbwu_mon !=3D rprops->num_mbwu_mon) cprops->num_mbwu_mon =3D min(cprops->num_mbwu_mon, rprops->num_mbwu_mon); =20 if (cprops->intpri_wd !=3D rprops->intpri_wd) cprops->intpri_wd =3D min(cprops->intpri_wd, rprops->intpri_wd); - if (cprops->dspri_wd !=3D rprops->dspri_wd) + if (cprops->dspri_wd !=3D rprops->dspri_wd && rprops->dspri_wd) cprops->dspri_wd =3D min(cprops->dspri_wd, rprops->dspri_wd); =20 /* {int,ds}pri may not have differing 0-low behaviour */ @@ -1845,6 +1849,20 @@ static void mpam_enable_init_class_features(struct m= pam_class *class) class->props =3D ris->props; } =20 +/* Club different resource properties under a class that resctrl uses, + * for instance, L3 cache that supports both CPOR, and DSPRI need to have + * knowledge of both cpbm_wd and dspri_wd. This is needed when two controls + * are enumerated under differnt RIS Index. + */ +static void mpam_enable_club_class_features(struct mpam_class *class, + struct mpam_msc_ris *ris) +{ + class->props.features |=3D ris->props.features; + class->props.cpbm_wd |=3D ris->props.cpbm_wd; + class->props.dspri_wd |=3D ris->props.dspri_wd; + class->props.num_csu_mon |=3D ris->props.num_csu_mon; +} + /* Merge all the common resource features into class. */ static void mpam_enable_merge_features(void) { @@ -1860,6 +1878,14 @@ static void mpam_enable_merge_features(void) list_for_each_entry(comp, &class->components, class_list) { list_for_each_entry(ris, &comp->ris, comp_list) { __resource_props_mismatch(ris, class); + /* + * There can be multiple resources under a class which is + * mapped to different controls, For instance L3 cache + * can have both CPOR and DSPRI implemented with different + * RIS. + */ + if (class->props.features !=3D ris->props.features) + mpam_enable_club_class_features(class, ris); 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Wed, 17 Jan 2024 06:15:06 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 8BE755B6963; Wed, 17 Jan 2024 06:15:02 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 14/14] arm64/mpam: resctrl: export DSPRI value to info directory Date: Wed, 17 Jan 2024 19:44:05 +0530 Message-ID: <20240117141405.3063506-15-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: ZnrcZP3-NuROoWY2QqQdv4tcfeVQxXYM X-Proofpoint-GUID: ZnrcZP3-NuROoWY2QqQdv4tcfeVQxXYM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Content-Type: text/plain; charset="utf-8" Now that, we have support for priority partitioning, let's export Downstream priority value (maximum value that user can supply) to info directory. This value is visible under resource directory to which this control (Downstream priority partition ) is applied. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * No change, it's new patch. --- fs/resctrl/rdtgroup.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index d71fac0ae4d4..8c3df4bb8ee9 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1118,6 +1118,16 @@ static int rdt_bit_usage_show(struct kernfs_open_fil= e *of, return 0; } =20 +static int rdt_max_dspri_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct resctrl_schema *s =3D of->kn->parent->priv; + struct rdt_resource *r =3D s->res; + + seq_printf(seq, "%u\n", r->default_dspri_ctrl); + return 0; +} + static int rdt_min_bw_show(struct kernfs_open_file *of, struct seq_file *seq, void *v) { @@ -1713,6 +1723,13 @@ static struct rftype res_common_files[] =3D { .seq_show =3D rdt_bit_usage_show, .fflags =3D RF_CTRL_INFO | RFTYPE_RES_CACHE, }, + { + .name =3D "max_dspri", + .mode =3D 0444, + .kf_ops =3D &rdtgroup_kf_single_ops, + .seq_show =3D rdt_max_dspri_show, + .fflags =3D RF_CTRL_INFO | RFTYPE_RES_CACHE, + }, { .name =3D "min_bandwidth", .mode =3D 0444, @@ -2009,6 +2026,9 @@ static int rdtgroup_create_info_dir(struct kernfs_nod= e *parent_kn) =20 /* loop over enabled controls, these are all alloc_capable */ list_for_each_entry(s, &resctrl_schema_all, list) { + if (s->ctrl_type =3D=3D SCHEMA_DSPRI) + continue; + r =3D s->res; fflags =3D r->fflags | RF_CTRL_INFO; ret =3D rdtgroup_mkdir_info_resdir(s, s->name, fflags); --=20 2.25.1