From nobody Wed Dec 24 23:35:28 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FD1A605A7 for ; Tue, 23 Jan 2024 13:10:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706015428; cv=none; b=Tm0BNQknCvVCcegOaGt6W4XpnCQ8oSrs1WuRJ9vCFVXGuZxUFVEOO04LoBRa1az5jnYY98snaDuvjPcWOgQp2GEwSaxPXGZToIGOIAF6or959bg2hABHuIp5/1qXfr0yb6wBZ2/plPSF1oLQsT8DLnj1R3QoZo5e0JDvddouXts= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706015428; c=relaxed/simple; bh=4SzEPAjNVqgbi1oVUk4ULEOFi5PUd5ExYotlrwczmes=; h=Message-ID:From:To:Cc:Subject:References:MIME-Version: Content-Type:Date; b=ajkhnU8RO/H/DGgxiz3GQBI8MNNVaupGe8e6D+fEYHRQIZgpcCP3JPmGsvA2U34P/yrINSVDeanzbmjft36M1yoUtTLnlu4YdVJMPgE1FjcGq88lgdwWWOyKv+SBE+Wk9FPF50Gwnxhr5DhR7RlChe/v4pNPCb8l9DYCcajIvOk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=nicLpavX; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=+MhYYeAq; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="nicLpavX"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="+MhYYeAq" Message-ID: <20240117124903.184595817@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1706015424; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=FBlT5X6p8mU5KNqg94BoSVbLftsUff31uiC3bWBKvBA=; b=nicLpavXn2FDQYRA26mYIyPKZBtTqUd+3wg1F5GWJiA+GcdsiYpUYFYo+R+g3cXoh0tqQC NU7Rnj5IzihLureVRYbwTiY9syBGg+v9eSonfzuBsWQgOjrwC/dh2rNu5xiFj9eABYjLjU cYoR2IW7RwZWWCXUG4s9S5xtNgBuDmHfJIAG+n4c0IBL7KBVuq9oBmfV2vKIpwH1Cpb72B 6ftNoOOSSgl7fGig8hJW1+4tKUxoCs1snF/qkSPIFq9vxTSvlOn2dnW8VlV4Ni+7IVoMLk FyJCbesXE7yIRYk/CypiiGjlPHJKv9wwJ64CUT9erlYV113VTgQbZMXW0g9UbQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1706015424; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=FBlT5X6p8mU5KNqg94BoSVbLftsUff31uiC3bWBKvBA=; b=+MhYYeAqQi8+uBgqQvusfNfyUm5R/f9r2+lFrqu+BbfjWqfn5380Opm2cXrjwFgruqZw3O 7jttVWCTL1z5w0Bg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Sohil Mehta , K Prateek Nayak , Kan Liang , Zhang Rui , "Paul E. McKenney" , Feng Tang , Andy Shevchenko , Michael Kelley , "Peter Zijlstra (Intel)" , Andy Shevchenko , Wei Liu Subject: [patch V2 13/22] x86/platform/intel-mid: Prepare for separate mpparse callbacks References: <20240117124704.044462658@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 23 Jan 2024 14:10:23 +0100 (CET) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Thomas Gleixner Initialize the split SMP configuration callbacks with NOOPs as MID is strictly ACPI only. Signed-off-by: Thomas Gleixner Acked-by: Andy Shevchenko --- arch/x86/platform/intel-mid/intel-mid.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) --- --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -118,7 +118,9 @@ void __init x86_intel_mid_early_setup(vo machine_ops.emergency_restart =3D intel_mid_reboot; =20 /* Avoid searching for BIOS MP tables */ - x86_init.mpparse.find_mptable =3D x86_init_noop; - x86_init.mpparse.get_smp_config =3D x86_init_uint_noop; + x86_init.mpparse.find_mptable =3D x86_init_noop; + x86_init.mpparse.early_parse_smp_cfg =3D x86_init_noop; + x86_init.mpparse.parse_smp_cfg =3D x86_init_noop; + x86_init.mpparse.get_smp_config =3D x86_init_uint_noop; set_bit(MP_BUS_ISA, mp_bus_not_pci); }