From nobody Wed Dec 17 09:50:14 2025 Received: from mail.hugovil.com (mail.hugovil.com [162.243.120.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 758B934CF0; Tue, 16 Jan 2024 21:30:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=162.243.120.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705440622; cv=none; b=Hg1PkwLCYZlIbIi39d3ap5ISM8W7nek50teQMVTBr8feSeN5TK2CLd2Y/4QsoCc2yEz2Efhekk5P4+eNkkmnKyFaQouQ9LS7tsZlF+7MZfCNW+gbVh5xmXqvKN76XOp5J9qM9WbYyDiAflA+lNRFPwGUbGLzzEbvHAMV0dOiEdQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705440622; c=relaxed/simple; bh=VfjDaVrNHIZjHx8ySkfQYoBgJn6qpwyh+qoBkvGRiD8=; h=DKIM-Signature:Received:From:To:Cc:Date:Message-Id:X-Mailer: In-Reply-To:References:MIME-Version:Content-Type: Content-Transfer-Encoding:X-SA-Exim-Connect-IP:X-SA-Exim-Mail-From: X-Spam-Checker-Version:X-Spam-Level:X-Spam-Report:X-Spam-Status: Subject:X-SA-Exim-Version:X-SA-Exim-Scanned; b=a/kSOcGjAWbg9ICyN6qLyrz4hTOTOYmoks2AFIpyCDNg6D6vqYukbEugFsYI0itgVfHGLmyt5KJPw2mRB3MbHXhNDaX8z3d35hJH8lLh6a2JnEG2UXMGbK9/5nVNto/K2vMgVoR6rDT64bh0cJJIiF7QlUCAZS+sVoogQHBWCsA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=hugovil.com; spf=pass smtp.mailfrom=hugovil.com; dkim=pass (1024-bit key) header.d=hugovil.com header.i=@hugovil.com header.b=JCRlSrLw; arc=none smtp.client-ip=162.243.120.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=hugovil.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=hugovil.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=hugovil.com header.i=@hugovil.com header.b="JCRlSrLw" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=hugovil.com ; s=x; h=Subject:Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Cc:To :From:subject:date:message-id:reply-to; bh=zHExVb//VxV60TXMxheiwn+m4dfdcjotGwWrtMmqQZ4=; b=JCRlSrLwSFOwGc/wvvdiSsEEG5 TR3/2SvQE44rp7NbnUlEjtrfOgm8SvrAupSwFwEsHFX3RcGvyRIacR8wXhagRrdrg9xd7Ew6o7jQd FIqCThLemyawwXCxvwqnzHP5+TyvcCd9aJYOoASZveFDfE60eQH/HAugjNHXdscY4Ytw=; Received: from modemcable168.174-80-70.mc.videotron.ca ([70.80.174.168]:47418 helo=pettiford.lan) by mail.hugovil.com with esmtpa (Exim 4.92) (envelope-from ) id 1rPr0Y-0002ia-ML; Tue, 16 Jan 2024 16:30:08 -0500 From: Hugo Villeneuve To: gregkh@linuxfoundation.org, jirislaby@kernel.org, jan.kundrat@cesnet.cz, shc_work@mail.ru Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, hugo@hugovil.com, Hugo Villeneuve , stable@vger.kernel.org Date: Tue, 16 Jan 2024 16:29:59 -0500 Message-Id: <20240116213001.3691629-3-hugo@hugovil.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240116213001.3691629-1-hugo@hugovil.com> References: <20240116213001.3691629-1-hugo@hugovil.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 70.80.174.168 X-SA-Exim-Mail-From: hugo@hugovil.com X-Spam-Level: X-Spam-Report: * -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP * -0.0 T_SCC_BODY_TEXT_LINE No description available. Subject: [PATCH 2/4] serial: max310x: improve crystal stable clock detection X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.hugovil.com) From: Hugo Villeneuve Some people are seeing a warning similar to this when using a crystal: max310x 11-006c: clock is not stable yet The datasheet doesn't mention the maximum time to wait for the clock to be stable when using a crystal, and it seems that the 10ms delay in the driver is not always sufficient. Jan Kundr=C3=A1t reported that it took three tries (each separated by 10ms)= to get a stable clock. Modify behavior to check stable clock ready bit multiple times (20), and waiting 10ms between each try. Note: the first draft of the driver originally used a 50ms delay, without checking the clock stable bit. Then a loop with 1000 retries was implemented, each time reading the clock stable bit. Fixes: 4cf9a888fd3c ("serial: max310x: Check the clock readiness") Cc: Suggested-by: Jan Kundr=C3=A1t Link: https://www.spinics.net/lists/linux-serial/msg35773.html Link: https://lore.kernel.org/all/20240110174015.6f20195fde08e5c9e64e5675@h= ugovil.com/raw Link: https://github.com/boundarydevices/linux/commit/e5dfe3e4a751392515d78= 051973190301a37ca9a Signed-off-by: Hugo Villeneuve --- drivers/tty/serial/max310x.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index b2c753ba9cbf..c0eb0615d945 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c @@ -237,6 +237,10 @@ #define MAX310x_REV_MASK (0xf8) #define MAX310X_WRITE_BIT 0x80 =20 +/* Crystal-related definitions */ +#define MAX310X_XTAL_WAIT_RETRIES 20 /* Number of retries */ +#define MAX310X_XTAL_WAIT_DELAY_MS 10 /* Delay between retries */ + /* MAX3107 specific */ #define MAX3107_REV_ID (0xa0) =20 @@ -641,12 +645,19 @@ static u32 max310x_set_ref_clk(struct device *dev, st= ruct max310x_port *s, =20 /* Wait for crystal */ if (xtal) { - unsigned int val =3D 0; - msleep(10); - regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val); - if (!(val & MAX310X_STS_CLKREADY_BIT)) { + bool stable =3D false; + unsigned int try =3D 0, val =3D 0; + + do { + msleep(MAX310X_XTAL_WAIT_DELAY_MS); + regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val); + + if (val & MAX310X_STS_CLKREADY_BIT) + stable =3D true; + } while (!stable && (++try < MAX310X_XTAL_WAIT_RETRIES)); + + if (!stable) dev_warn(dev, "clock is not stable yet\n"); - } } =20 return bestfreq; --=20 2.39.2