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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id e3-20020a056a0000c300b006da14f68ac1sm8348585pfj.198.2024.01.15.20.11.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jan 2024 20:11:16 -0800 (PST) From: Nylon Chen To: paul.walmsley@sifive.com, palmer@dabbelt.com, conor+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, u.kleine-koenig@pengutronix.de, thierry.reding@gmail.com, aou@eecs.berkeley.edu Cc: zong.li@sifve.com, vincent.chen@sifive.com, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, nylon7717@gmail.com, Nylon Chen Subject: [v6 2/3] pwm: sifive: change the PWM controlled LED algorithm Date: Tue, 16 Jan 2024 12:10:53 +0800 Message-ID: <20240116041054.11641-3-nylon.chen@sifive.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240116041054.11641-1-nylon.chen@sifive.com> References: <20240116041054.11641-1-nylon.chen@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The `frac` variable represents the pulse inactive time, and the result of this algorithm is the pulse active time. Therefore, we must reverse the = result. The reference is SiFive FU740-C000 Manual[0] Link: https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16= acba_fu740-c000-manual-v1p6.pdf [0] Co-developed-by: Zong Li Signed-off-by: Zong Li Co-developed-by: Vincent Chen Signed-off-by: Vincent Chen Signed-off-by: Nylon Chen --- drivers/pwm/pwm-sifive.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index eabddb7c7820..b07c8598bb21 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -113,6 +113,7 @@ static int pwm_sifive_get_state(struct pwm_chip *chip, = struct pwm_device *pwm, u32 duty, val; =20 duty =3D readl(ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); + duty =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - duty; =20 state->enabled =3D duty > 0; =20 @@ -123,11 +124,10 @@ static int pwm_sifive_get_state(struct pwm_chip *chip= , struct pwm_device *pwm, state->period =3D ddata->real_period; state->duty_cycle =3D (u64)duty * ddata->real_period >> PWM_SIFIVE_CMPWIDTH; - state->polarity =3D PWM_POLARITY_INVERSED; + state->polarity =3D PWM_POLARITY_NORMAL; =20 return 0; } - static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, const struct pwm_state *state) { @@ -139,7 +139,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, int ret =3D 0; u32 frac; =20 - if (state->polarity !=3D PWM_POLARITY_INVERSED) + if (state->polarity !=3D PWM_POLARITY_NORMAL) return -EINVAL; =20 cur_state =3D pwm->state; @@ -159,6 +159,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, frac =3D DIV64_U64_ROUND_CLOSEST(num, state->period); /* The hardware cannot generate a 100% duty cycle */ frac =3D min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); + frac =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - frac; =20 mutex_lock(&ddata->lock); if (state->period !=3D ddata->approx_period) { --=20 2.42.0