From nobody Tue Dec 16 16:44:05 2025 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB8DB2BAFC for ; Mon, 15 Jan 2024 10:34:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="Rh3CzWhR" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-40e7a9c527dso5528465e9.1 for ; Mon, 15 Jan 2024 02:34:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1705314863; x=1705919663; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3CX2gA6r/dtvGkH0YEYWwI6mzbAd5lMyIJziHnyg55Q=; b=Rh3CzWhRwMPnuiPQuKVOtciw8ekgKH0tbQit15neEkW+r8euEZWXO/cyI/vwKo9eu0 MGKXS2I1R+dq5eQJw/YrJs1RKnP+nbTMJgIuYc685tkTdgcka4TSzciKVSUK8yOjxlGy AvfwZQwAYg88ofwA7AUypUDYgO1LM4UpBsxRw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705314863; x=1705919663; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3CX2gA6r/dtvGkH0YEYWwI6mzbAd5lMyIJziHnyg55Q=; b=n3MAum6934QpEq5TLsHna2fZiPMzar0+VRXWAWSkU8EoVAzbsOX0OSwIBbcWwe4PP7 49Orq9LrZxymLWeSOOd0Kq0tzUFEZ4R2H4Y5T4nLXjpgTDZC9crQePytIa6jb8BniRKw GZAdlPz6yNZh2S8qsvmAdH17fhB+XAy/zoUUhlqdFHZ29kjuO5xtGb+teutxws6P8J+6 ggKgE9fb/y4jLK5TDywmjtt94LummBrjkzSv4SmN9Frn/N46e3dCIMtZdPzCtUrPWkG6 RbkNgbrrlEtZg9EDOIZMwKeF+IpccM0tXtR6oM/dSiKdKZ/r4JR4Y0NGntdBZnOijmeH 2QBw== X-Gm-Message-State: AOJu0YyNC6rIxln2Ej2tEXHZSgNr90Abn5+EHsImzDgtJu5LJMS90sxv bjYL7I/dDm7ozXjnvlqoKW0kY/0pY+1AHd4cHZlwtvSVA48= X-Google-Smtp-Source: AGHT+IEQlJdBXE8WoCCb08JD+brH7hGQ3CV9nGVZlK4ctSPpgRk9xBcoj0BssmpcSXVxPbKM8xAuCw== X-Received: by 2002:a05:600c:4f48:b0:40d:81c1:186 with SMTP id m8-20020a05600c4f4800b0040d81c10186mr1491546wmq.155.1705314862690; Mon, 15 Jan 2024 02:34:22 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.amarulasolutions.com (mob-5-90-63-69.net.vodafone.it. [5.90.63.69]) by smtp.gmail.com with ESMTPSA id l39-20020a05600c1d2700b0040e50d82af5sm15536120wms.32.2024.01.15.02.34.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jan 2024 02:34:22 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Andrzej Hajda , Daniel Vetter , David Airlie , Inki Dae , Jagan Teki , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Maarten Lankhorst , Marek Szyprowski , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , dri-devel@lists.freedesktop.org Subject: [RESEND PATCH v9 1/2] drm: bridge: samsung-dsim: enter display mode in the enable() callback Date: Mon, 15 Jan 2024 11:33:47 +0100 Message-ID: <20240115103416.978481-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240115103416.978481-1-dario.binacchi@amarulasolutions.com> References: <20240115103416.978481-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The synaptics-r63353 (panel-bridge) can only be configured in command mode. So, samsung-dsim (bridge) must not be in display mode during the prepare()/unprepare() of the panel-bridge. Setting the "pre_enable_prev_first" flag to true allows the prepare() of the panel-bridge to be called between the pre_enabled() and enabled() of the bridge. So, the bridge can enter display mode only in the enabled(). The unprepare() of the panel-bridge is instead called between the disable() and post_disable() of the bridge. So, the disable() must exit the display mode (i .e. enter command mode) to allow the panel-bridge to receive DSI commands. samsung_dsim_atomic_pre_enable -> command mode r63353_panel_prepare -> send DSI commands samsung_dsim_atomic_enable -> enter display mode samsung_dsim_atomic_disable -> exit display mode (command mode) r63353_panel_unprepare -> send DSI commands samsung_dsim_atomic_post_disable Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/gpu/drm/bridge/samsung-dsim.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index be5914caa17d..15bf05b2bbe4 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct drm= _bridge *bridge, return; =20 samsung_dsim_set_display_mode(dsi); - samsung_dsim_set_display_enable(dsi, true); } } =20 @@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bri= dge *bridge, samsung_dsim_set_display_mode(dsi); samsung_dsim_set_display_enable(dsi, true); } else { + samsung_dsim_set_display_enable(dsi, true); samsung_dsim_set_stop_state(dsi, false); } =20 @@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_br= idge *bridge, if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) samsung_dsim_set_stop_state(dsi, true); =20 + samsung_dsim_set_display_enable(dsi, false); + dsi->state &=3D ~DSIM_STATE_VIDOUT_AVAILABLE; } =20 @@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct d= rm_bridge *bridge, { struct samsung_dsim *dsi =3D bridge_to_dsi(bridge); =20 - samsung_dsim_set_display_enable(dsi, false); + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) + samsung_dsim_set_stop_state(dsi, true); =20 dsi->state &=3D ~DSIM_STATE_ENABLED; pm_runtime_put_sync(dsi->dev); --=20 2.43.0 From nobody Tue Dec 16 16:44:05 2025 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E1ED2C68A for ; Mon, 15 Jan 2024 10:34:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="cSDy4x/v" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-40b5155e154so106485595e9.3 for ; Mon, 15 Jan 2024 02:34:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1705314864; x=1705919664; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vUOsBiPuxBvM6FDZ7VmJ/JCXXnby3Q2ff55p54IAZ7U=; b=cSDy4x/vi/pDRYtUqzuOXW9L2J5K8a+Gtsdj9wd7XYWVv6/yq7V+r92KFvB/tmfQq8 RqA/g+OyFJGSG3MjVq9ADdSBOfKeTvqRmOVMQMDz3u4X9lWG+a6BV33bl9kigPC88nyJ Vbtv0cu4Z4sa01z3QgZcqdnSBdarP6u0S7bGo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705314864; x=1705919664; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vUOsBiPuxBvM6FDZ7VmJ/JCXXnby3Q2ff55p54IAZ7U=; b=npPO0AGhBX4peOWAyw04aX4j3b7HZPyzYmRXU2KHAVkij6yL7HeAg+3PsC0Xd7/5Y9 Q9txWgdGx0tXkE3f/ulIRK5jmNgsymtA5SHtphRBt82je3/GxAzwIZbkWVfHeZnmMNAk NAsGWj/m+itlQbjZA1ERl1Ocffah6UETQjJ+u6Qbtp9/FvMEVMh0mHL0f0RYqBqp6/L2 jracg1X6u6goVKjNngDBUbM2ybTRZBpJRxvtUeISM/Bq6GaLRpBggeCAwOvW2nuUer4Q /J741FYHcrr9DCPoixCT9BAbLlPkhH+jObdu5+OIVDeFHKKaqooKXz6jpd+J6KVqGg8h lAEg== X-Gm-Message-State: AOJu0YwuLBW1Th8cdw+Bxw1EADrdXN+N8B0OTZrbFhZztp0PgdwR6UVA CtWRVRkdcC5lUI5+JKitgtQJs95D+u/K3GjYsaTnaUdk/4s= X-Google-Smtp-Source: AGHT+IGh1O+G/1dz0awf1sBDCz0T6XMUZyrIuqYX5f01A57JxbvNRHU38uQWBn4j2o8htR7XvaIJ9w== X-Received: by 2002:a05:600c:314f:b0:40e:4640:241b with SMTP id h15-20020a05600c314f00b0040e4640241bmr2922328wmo.175.1705314864484; Mon, 15 Jan 2024 02:34:24 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.amarulasolutions.com (mob-5-90-63-69.net.vodafone.it. [5.90.63.69]) by smtp.gmail.com with ESMTPSA id l39-20020a05600c1d2700b0040e50d82af5sm15536120wms.32.2024.01.15.02.34.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jan 2024 02:34:24 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Andrzej Hajda , Daniel Vetter , David Airlie , Inki Dae , Jagan Teki , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Maarten Lankhorst , Marek Szyprowski , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , dri-devel@lists.freedesktop.org Subject: [RESEND PATCH v9 2/2] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Date: Mon, 15 Jan 2024 11:33:48 +0100 Message-ID: <20240115103416.978481-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240115103416.978481-1-dario.binacchi@amarulasolutions.com> References: <20240115103416.978481-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The patch completes the setting of CLKLANE_STOP for the imx8m{m,n,p} platforms (i. e. not exynos). Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v9: - Updated commit message - Drop [3/3] arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup because applied. Changes in v8: - Move the 'status' property to the end of the list of nodes: - pwm1 - lcdif - mipi_dsi - Add a newline between properties and child node (mipi_dsi_out). - Sort the iomuxc node alphabetically - Rename pwm1grp to blgrp Changes in v7: - Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel contro= ller because applied. Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 p= anel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (= drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tian= ma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel contro= ller. Changes in v2: - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index 15bf05b2bbe4..13f181c99d7e 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -96,6 +96,7 @@ #define DSIM_MFLUSH_VS BIT(29) /* This flag is valid only for exynos3250/3472/5260/5430 */ #define DSIM_CLKLANE_STOP BIT(30) +#define DSIM_NON_CONTINUOUS_CLKLANE BIT(31) =20 /* DSIM_ESCMODE */ #define DSIM_TX_TRIGGER_RST BIT(4) @@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim = *dsi) * power consumption. */ if (driver_data->has_clklane_stop && - dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) + dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) + reg |=3D DSIM_NON_CONTINUOUS_CLKLANE; + reg |=3D DSIM_CLKLANE_STOP; + } samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg); =20 lanes_mask =3D BIT(dsi->lanes) - 1; --=20 2.43.0