From nobody Fri Sep 20 03:51:42 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E574A17C6F; Sat, 13 Jan 2024 10:25:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="Mg/sw8+v" Received: by mail.gandi.net (Postfix) with ESMTPSA id 3779760003; Sat, 13 Jan 2024 10:25:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141550; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0TP3w9JbDAsI5EAwU/g81SPCH2SLDYBTUzxHGcp67aQ=; b=Mg/sw8+vYeibN3qlAutaIlsH5JgiRs479THW1QsVcDXpsqIsHfInIeBXZu5ISLOyrYrVpG HaajgWRekgxQkOg9Gmw9CE4JITAH9f4NwkmsMapEC6/4J6Pzts5lYLe2yhNoOECS8Ngd8q cb9hyli0WyWwot8dir5RAblb4UW2WGf2PAqL2rQoN+2mXEtGuwCxOqd26hituLwfy+dQLr gbmLBL6NKZVOshrwzbRRDBwyJy3bf1sJmMXCjcW9iwTO6KIBu7IQRI0W00XGaQBAStO9oK RgapGfp1kszAvQIRUWPc9fAcpxMKGbeGeNKe0/E6e2Qb53t3XxJ04hTmEm+oaw== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 1/8] net: dsa: mt7530: empty default case on mt7530_setup_port5() Date: Sat, 13 Jan 2024 13:25:22 +0300 Message-Id: <20240113102529.80371-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com There're two code paths for setting up port 5: mt7530_setup() -> mt7530_setup_port5() mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() On the first code path, priv->p5_intf_sel is either set to P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4 when mt7530_setup_port5() is run. On the second code path, priv->p5_intf_sel is set to P5_INTF_SEL_GMAC5 when mt7530_setup_port5() is run. Empty the default case which will never run but is needed nonetheless to handle all the remaining enumeration values. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 7f9d63b61168..88ab926ce19e 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -943,9 +943,7 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) val &=3D ~MHWTRAP_P5_DIS; break; default: - dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", - priv->p5_intf_sel); - goto unlock_exit; + break; } =20 /* Setup RGMII settings */ @@ -975,7 +973,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) dev_dbg(ds->dev, "Setup P5, HWTRAP=3D0x%x, intf_sel=3D%s, phy-mode=3D%s\n= ", val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); =20 -unlock_exit: mutex_unlock(&priv->reg_mutex); } =20 --=20 2.40.1 From nobody Fri Sep 20 03:51:43 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 680BE17BD0; Sat, 13 Jan 2024 10:25:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="FUMfqIEX" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7E6CC60005; Sat, 13 Jan 2024 10:25:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141554; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=S6PR5JGEAek5VQlFaJYWYFlss28deQgkrXKo1sEIWNc=; b=FUMfqIEXGMy7I2/J6vIBtHuksHAUdWIrppJruEgZglmg+w9glssAfoHdQb+0Z0S7VLgFld xELOJxjegiI4gsXk/FjwPTxQgsfMxM7VBTmQMPXLlrEQDA4AGVRMan2hNbHNwjTVKT8OiG yhhELNvusdzgVd7MO7tQWSrIu9oIuXemfIKtHZD4mX57zETbVoCW6yhL/3paj54XAXC9bq S3KNtoEvf/tEUZOaxhWsOLNSonnbQ2ogn6iVqSJhBT+7JWp6yo94+Fl+/FS9bHaTEIIQwn naXjEqhQvTFQ4OrrMzIM+7YGREXW+lZZF7YAnxnlh0PvipAse9OQQ+4M5TtovQ== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 2/8] net: dsa: mt7530: call port 6 setup from mt7530_mac_config() Date: Sat, 13 Jan 2024 13:25:23 +0300 Message-Id: <20240113102529.80371-3-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com mt7530_pad_clk_setup() is called if port 6 is enabled. It used to do more things than setting up port 6. That part was moved to more appropriate locations, mt7530_setup() and mt7530_pll_setup(). Now that all it does is set up port 6, rename it to mt7530_setup_port6(), and move it to a more appropriate location, under mt7530_mac_config(). Leave an empty mt7530_pad_clk_setup() to satisfy the pad_setup function pointer. This is the code path for setting up the ports before: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt753x_pad_setup() -> mt7530_pad_clk_setup() This is after: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt7530_setup_port6() Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 88ab926ce19e..434028e9667d 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -415,7 +415,7 @@ mt753x_preferred_default_local_cpu_port(struct dsa_swit= ch *ds) =20 /* Setup port 6 interface mode and TRGMII TX circuit */ static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; u32 ncpo1, ssc_delta, trgint, xtal; @@ -487,6 +487,12 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interf= ace_t interface) return 0; } =20 +static int +mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +{ + return 0; +} + static int mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { @@ -2608,12 +2614,15 @@ mt7530_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; + int ret; =20 - /* Only need to setup port5. */ - if (port !=3D 5) - return 0; - - mt7530_setup_port5(priv->ds, interface); + if (port =3D=3D 5) { + mt7530_setup_port5(priv->ds, interface); + } else if (port =3D=3D 6) { + ret =3D mt7530_setup_port6(priv->ds, interface); + if (ret) + return ret; + } =20 return 0; } --=20 2.40.1 From nobody Fri Sep 20 03:51:43 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A260B1A711; Sat, 13 Jan 2024 10:26:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="OC2ACUGR" Received: by mail.gandi.net (Postfix) with ESMTPSA id C602860006; Sat, 13 Jan 2024 10:25:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141558; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y4KaaolRUbj+c/VC1CLFjWeEr3Hayx1WSaqdOowQT5Q=; b=OC2ACUGR3+t6pSZcKrK3n4mCBkWiUhw7dp+lGhweEeg/CDpITEtjxSy+KouPaclEUWEV0/ Sw+HWuW07pEfurWeOb7Vb67wzh5HAyq1CYzb5eUpy4cxedGK886BhNp4Z4JhkSWX1ebUaO /3GJE6xeMOtTBtLuFbsBlxSsGIdz7O0XYlZKDjlzQLvbBrk9xkZPOs8boB9HAZSRDdkguN 69AAUfFV35AmoJcjH6miLPUy25YTi1HUTVmcBGkWnXVhZga8oRHi383U9SPaRVg7FDRm5Q d1j7sVmsYni3JNBny5g4qhtrV+Pwss6pngpfqEnFVaTLGiyKMYY7wbSmvaIQCQ== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 3/8] net: dsa: mt7530: remove pad_setup function pointer Date: Sat, 13 Jan 2024 13:25:24 +0300 Message-Id: <20240113102529.80371-4-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com The pad_setup function pointer was introduced with 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new hardware"). It was being used to set up the core clock and port 6 of the MT7530 switch, and pll of the MT7531 switch. All of these were moved to more appropriate locations, and it was never used for the switch on the MT7988 SoC. Therefore, this function pointer hasn't got a use anymore. Remove it. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 36 ++---------------------------------- drivers/net/dsa/mt7530.h | 3 --- 2 files changed, 2 insertions(+), 37 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 434028e9667d..823dc3ab15c8 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -487,18 +487,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) return 0; } =20 -static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - -static int -mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - static void mt7531_pll_setup(struct mt7530_priv *priv) { @@ -2601,14 +2589,6 @@ static void mt7988_mac_port_get_caps(struct dsa_swit= ch *ds, int port, } } =20 -static int -mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *s= tate) -{ - struct mt7530_priv *priv =3D ds->priv; - - return priv->info->pad_setup(ds, state->interface); -} - static int mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) @@ -2778,8 +2758,6 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int = port, unsigned int mode, if (priv->p6_interface =3D=3D state->interface) break; =20 - mt753x_pad_setup(ds, state); - if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; =20 @@ -3097,11 +3075,6 @@ mt753x_conduit_state_change(struct dsa_switch *ds, mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); } =20 -static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interfa= ce) -{ - return 0; -} - static int mt7988_setup(struct dsa_switch *ds) { struct mt7530_priv *priv =3D ds->priv; @@ -3165,7 +3138,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7530_phy_write_c22, .phy_read_c45 =3D mt7530_phy_read_c45, .phy_write_c45 =3D mt7530_phy_write_c45, - .pad_setup =3D mt7530_pad_clk_setup, .mac_port_get_caps =3D mt7530_mac_port_get_caps, .mac_port_config =3D mt7530_mac_config, }, @@ -3177,7 +3149,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7530_phy_write_c22, .phy_read_c45 =3D mt7530_phy_read_c45, .phy_write_c45 =3D mt7530_phy_write_c45, - .pad_setup =3D mt7530_pad_clk_setup, .mac_port_get_caps =3D mt7530_mac_port_get_caps, .mac_port_config =3D mt7530_mac_config, }, @@ -3189,7 +3160,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7531_ind_c22_phy_write, .phy_read_c45 =3D mt7531_ind_c45_phy_read, .phy_write_c45 =3D mt7531_ind_c45_phy_write, - .pad_setup =3D mt7531_pad_setup, .cpu_port_config =3D mt7531_cpu_port_config, .mac_port_get_caps =3D mt7531_mac_port_get_caps, .mac_port_config =3D mt7531_mac_config, @@ -3202,7 +3172,6 @@ const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7531_ind_c22_phy_write, .phy_read_c45 =3D mt7531_ind_c45_phy_read, .phy_write_c45 =3D mt7531_ind_c45_phy_write, - .pad_setup =3D mt7988_pad_setup, .cpu_port_config =3D mt7988_cpu_port_config, .mac_port_get_caps =3D mt7988_mac_port_get_caps, .mac_port_config =3D mt7988_mac_config, @@ -3232,9 +3201,8 @@ mt7530_probe_common(struct mt7530_priv *priv) /* Sanity check if these required device operations are filled * properly. */ - if (!priv->info->sw_setup || !priv->info->pad_setup || - !priv->info->phy_read_c22 || !priv->info->phy_write_c22 || - !priv->info->mac_port_get_caps || + if (!priv->info->sw_setup || !priv->info->phy_read_c22 || + !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps || !priv->info->mac_port_config) return -EINVAL; =20 diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 80060cc740d2..26a6d2160c08 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -704,8 +704,6 @@ struct mt753x_pcs { * @phy_write_c22: Holding the way writing PHY port using C22 * @phy_read_c45: Holding the way reading PHY port using C45 * @phy_write_c45: Holding the way writing PHY port using C45 - * @pad_setup: Holding the way setting up the bus pad for a certain - * MAC port * @phy_mode_supported: Check if the PHY type is being supported on a cert= ain * port * @mac_port_validate: Holding the way to set addition validate type for a @@ -726,7 +724,6 @@ struct mt753x_info { int regnum); int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, int regnum, u16 val); - int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); int (*cpu_port_config)(struct dsa_switch *ds, int port); void (*mac_port_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); --=20 2.40.1 From nobody Fri Sep 20 03:51:43 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C16E17BD6; Sat, 13 Jan 2024 10:26:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="fswUsERh" Received: by mail.gandi.net (Postfix) with ESMTPSA id 2387D60009; Sat, 13 Jan 2024 10:25:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141563; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qb/lI7hBqz+FVwkR+R0zS6IF7AIMf5rntcDsWJvVb3Q=; b=fswUsERhLcCzaPS6CiOPvNyYkOrnXVsAZS3BH1uQ6br/+SY3WwvAAtHsWiJt7PUXYOR5H+ 8WpdecIGPEpsfgQC38Fuwzib1JX0YPF0Pw1K+NS3YDLKSvhQYozRQX4aXEpCz0WfoHNtTE hXRMOF4439LVryAoFHc0lzvByiAHV/DmefCTbYcAxF2gZEAvuFfVHw595+oB1nqhynQByC cLppgGNrXaszjfhrtP6aInl3KZxp9mws2L6N7Vn1yBxZ5eyqTxxVW2Ny1ONGlLsjKu5Nod BVuJNQOrbXcwY1jkJyvLJXeYbpWWJ7yFEh1F7m8GwX6OTZXkSv1P8VLEVbOEpg== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 4/8] net: dsa: mt7530: move XTAL check to mt7530_setup() Date: Sat, 13 Jan 2024 13:25:25 +0300 Message-Id: <20240113102529.80371-5-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com The crystal frequency concerns the switch core. The frequency should be checked when the switch is being set up so the driver can reject the unsupported hardware earlier and without requiring port 6 to be used. Move it to mt7530_setup(). Drop the unnecessary function printing. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Andrew Lunn Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 823dc3ab15c8..d3e1e31ac8d0 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -422,13 +422,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) =20 xtal =3D mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; =20 - if (xtal =3D=3D HWTRAP_XTAL_20MHZ) { - dev_err(priv->dev, - "%s: MT7530 with a 20MHz XTAL is not supported!\n", - __func__); - return -EINVAL; - } - switch (interface) { case PHY_INTERFACE_MODE_RGMII: trgint =3D 0; @@ -2235,6 +2228,12 @@ mt7530_setup(struct dsa_switch *ds) return -ENODEV; } =20 + if ((val & HWTRAP_XTAL_MASK) =3D=3D HWTRAP_XTAL_20MHZ) { + dev_err(priv->dev, + "MT7530 with a 20MHz XTAL is not supported!\n"); + return -EINVAL; + } + /* Reset the switch through internal reset */ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | --=20 2.40.1 From nobody Fri Sep 20 03:51:43 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 006541B813; Sat, 13 Jan 2024 10:26:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="JPWSzPJb" Received: by mail.gandi.net (Postfix) with ESMTPSA id 60BCE60004; Sat, 13 Jan 2024 10:26:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141567; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xaf7A980b4L6Aj8H9mVZceUkci0b4MQj48JLLc3HlD4=; b=JPWSzPJb/ZJuXFOG6/qZJGuGYn1+1a6oWqS+MCC225SsMfF5fGk7whFKbpH7ZlwokZXZY7 LKBXVKboka681i6ubpxp9ZoTgXaoVd+8D/n23IjoYgzyripoMHq+6vMob+Z9KdUS/Mr1Gc Q0sRpowPtPfCAogrhIvrwUUIaH6yXOk0T003qXfq8NXJYAxkuNMhGiEjCkTcCZhhasd1Gd PSwtw75H8RkuUMMH42WPMWxASg8IUmXbznqgTaanGnp+gqMI2E+qaawsnXShwzrLRCw2Rh sV/JYSJdUCjnWu925pHZDgIsHN1fzNkw7ndYK3bfD/+V6i+Kf3Sp44p/oSpsxA== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 5/8] net: dsa: mt7530: move enabling port 6 to mt7530_setup_port6() Date: Sat, 13 Jan 2024 13:25:26 +0300 Message-Id: <20240113102529.80371-6-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com Enable port 6 only when port 6 is being used. Update the comment on mt7530_setup() with a better explanation. Do not set MHWTRAP_MANUAL on mt7530_setup_port5() as it's already done on mt7530_setup() beforehand. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index d3e1e31ac8d0..3ce4e0bb04dd 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -420,6 +420,8 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interface= _t interface) struct mt7530_priv *priv =3D ds->priv; u32 ncpo1, ssc_delta, trgint, xtal; =20 + mt7530_clear(priv, MT7530_MHWTRAP, MHWTRAP_P6_DIS); + xtal =3D mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; =20 switch (interface) { @@ -910,7 +912,7 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) =20 val =3D mt7530_read(priv, MT7530_MHWTRAP); =20 - val |=3D MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; + val |=3D MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS; val &=3D ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL; =20 switch (priv->p5_intf_sel) { @@ -2250,9 +2252,11 @@ mt7530_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_MASK, RD_TAP(16)); =20 - /* Enable port 6 */ + /* Directly access the PHY registers via C_MDC/C_MDIO. The bit that + * enables modifying the hardware trap must be set for this. + */ val =3D mt7530_read(priv, MT7530_MHWTRAP); - val &=3D ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; + val &=3D ~MHWTRAP_PHY_ACCESS; val |=3D MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); =20 --=20 2.40.1 From nobody Fri Sep 20 03:51:43 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 620611B964; Sat, 13 Jan 2024 10:26:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="Fxj+04ot" Received: by mail.gandi.net (Postfix) with ESMTPSA id A744F60003; Sat, 13 Jan 2024 10:26:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141571; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=K74UmSfww86sKRHPRbaIqpCkTmy2g35l267dAcwExuk=; b=Fxj+04otsJp1SJu+HIYxrH0z+e8E8WNt12lar+t0Tw9Do1PHQlGNQ/Pw4O4rbX4mdaB8tn pAM4zjmOnEaiEpiuypTZhuaygnZ/e5QVjqncsMENMMgWTRkKmrdMJOn3rXGT42aTHPe3sV k+CITAJILJsCBoZXl5IFcYb4F/ibLbzCEkcfsRM5C8i0iaIdSeNVm5iuRK/GMrJZ3pje5j S9c7BKOnYZelceUMQt1HIX2xqU/VcC+0ieitdRU9DY4MofvN/FlpcnNLHDiIPA22oen3ym xGcsW7ZjAF7HsZxrnaM/YC2CJSB90xyCCxs7BdGZb6oYUqk0UBOFReex78Qp7w== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 6/8] net: dsa: mt7530: simplify mt7530_setup_port6() and change to void Date: Sat, 13 Jan 2024 13:25:27 +0300 Message-Id: <20240113102529.80371-7-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com This code is from before this driver was converted to phylink API. Phylink deals with the unsupported interface cases before mt7530_setup_port6() is run. Therefore, the default case would never run. However, it must be defined nonetheless to handle all the remaining enumeration values, the phy-modes. Switch to if statement for RGMII and return which simplifies the code and saves an indent. Do not set P6_INTF_MODE, which is the the three least significant bits of the MT7530_P6ECR register, to 0 for RGMII as it will already be 0 after reset. Read XTAL after checking for RGMII as it's only needed for the TRGMII interface mode. Change mt7530_setup_port6() to void now that there're no error cases left. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 100 ++++++++++++++++----------------------- 1 file changed, 40 insertions(+), 60 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 3ce4e0bb04dd..3a02308763ca 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -414,72 +414,56 @@ mt753x_preferred_default_local_cpu_port(struct dsa_sw= itch *ds) } =20 /* Setup port 6 interface mode and TRGMII TX circuit */ -static int +static void mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - u32 ncpo1, ssc_delta, trgint, xtal; + u32 ncpo1, ssc_delta, xtal; =20 mt7530_clear(priv, MT7530_MHWTRAP, MHWTRAP_P6_DIS); =20 + if (interface =3D=3D PHY_INTERFACE_MODE_RGMII) + return; + + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); + xtal =3D mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; =20 - switch (interface) { - case PHY_INTERFACE_MODE_RGMII: - trgint =3D 0; - break; - case PHY_INTERFACE_MODE_TRGMII: - trgint =3D 1; + if (xtal =3D=3D HWTRAP_XTAL_25MHZ) + ssc_delta =3D 0x57; + else + ssc_delta =3D 0x87; + + if (priv->id =3D=3D ID_MT7621) { + /* PLL frequency: 125MHz: 1.0GBit */ + if (xtal =3D=3D HWTRAP_XTAL_40MHZ) + ncpo1 =3D 0x0640; if (xtal =3D=3D HWTRAP_XTAL_25MHZ) - ssc_delta =3D 0x57; - else - ssc_delta =3D 0x87; - if (priv->id =3D=3D ID_MT7621) { - /* PLL frequency: 125MHz: 1.0GBit */ - if (xtal =3D=3D HWTRAP_XTAL_40MHZ) - ncpo1 =3D 0x0640; - if (xtal =3D=3D HWTRAP_XTAL_25MHZ) - ncpo1 =3D 0x0a00; - } else { /* PLL frequency: 250MHz: 2.0Gbit */ - if (xtal =3D=3D HWTRAP_XTAL_40MHZ) - ncpo1 =3D 0x0c80; - if (xtal =3D=3D HWTRAP_XTAL_25MHZ) - ncpo1 =3D 0x1400; - } - break; - default: - dev_err(priv->dev, "xMII interface %d not supported\n", - interface); - return -EINVAL; + ncpo1 =3D 0x0a00; + } else { /* PLL frequency: 250MHz: 2.0Gbit */ + if (xtal =3D=3D HWTRAP_XTAL_40MHZ) + ncpo1 =3D 0x0c80; + if (xtal =3D=3D HWTRAP_XTAL_25MHZ) + ncpo1 =3D 0x1400; } =20 - mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, - P6_INTF_MODE(trgint)); - - if (trgint) { - /* Disable the MT7530 TRGMII clocks */ - core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); - - /* Setup the MT7530 TRGMII Tx Clock */ - core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); - core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); - core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); - core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); - core_write(priv, CORE_PLL_GROUP4, - RG_SYSPLL_DDSFBK_EN | RG_SYSPLL_BIAS_EN | - RG_SYSPLL_BIAS_LPF_EN); - core_write(priv, CORE_PLL_GROUP2, - RG_SYSPLL_EN_NORMAL | RG_SYSPLL_VODEN | - RG_SYSPLL_POSDIV(1)); - core_write(priv, CORE_PLL_GROUP7, - RG_LCDDS_PCW_NCPO_CHG | RG_LCCDS_C(3) | - RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); + /* Disable the MT7530 TRGMII clocks */ + core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); =20 - /* Enable the MT7530 TRGMII clocks */ - core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); - } + /* Setup the MT7530 TRGMII Tx Clock */ + core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); + core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); + core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); + core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); + core_write(priv, CORE_PLL_GROUP4, RG_SYSPLL_DDSFBK_EN | + RG_SYSPLL_BIAS_EN | RG_SYSPLL_BIAS_LPF_EN); + core_write(priv, CORE_PLL_GROUP2, RG_SYSPLL_EN_NORMAL | + RG_SYSPLL_VODEN | RG_SYSPLL_POSDIV(1)); + core_write(priv, CORE_PLL_GROUP7, RG_LCDDS_PCW_NCPO_CHG | + RG_LCCDS_C(3) | RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); =20 - return 0; + /* Enable the MT7530 TRGMII clocks */ + core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); } =20 static void @@ -2597,15 +2581,11 @@ mt7530_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; - int ret; =20 - if (port =3D=3D 5) { + if (port =3D=3D 5) mt7530_setup_port5(priv->ds, interface); - } else if (port =3D=3D 6) { - ret =3D mt7530_setup_port6(priv->ds, interface); - if (ret) - return ret; - } + else if (port =3D=3D 6) + mt7530_setup_port6(priv->ds, interface); =20 return 0; } --=20 2.40.1 From nobody Fri Sep 20 03:51:43 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6CD41B971; Sat, 13 Jan 2024 10:26:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="bbCpXq0a" Received: by mail.gandi.net (Postfix) with ESMTPSA id EDA8160007; Sat, 13 Jan 2024 10:26:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141575; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=woi1aJhgxN/YqRBXLbFxEW/CiZM+RsFUK1nA6ZMsXGU=; b=bbCpXq0aUsb3NuYrqWDV1IQwcgJcAAHxx0ndZBah+bDvllmtXSLv2XNSey98h9TnNVjPo3 PjQZ2bHowg53uBegrDI0wVT9FuXR+IswAd7dK80hUA4eyfv6GK2UvbBmqMgPJhDfu+/0f+ iYa0cM0up+fQPfNwVn5CHZaZMYQqrBFpd8CSnzjqt7n4zJyJlgOJavTVqFAQOyA6BKZsAx l3PPs2RoysC+3/grWaXZndJfkFkSd+zIBOaq1bIR++ZMwaSKD1d0aqx5IJ9/H3wMo2hjxp OpwQQrOmPKzUbnfcisRkcKHa/NQqfOS+hrBOqj5/VKpzGbwJ6QY4OqQec040/A== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 7/8] net: dsa: mt7530: correct port capabilities of MT7988 Date: Sat, 13 Jan 2024 13:25:28 +0300 Message-Id: <20240113102529.80371-8-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com On the switch on the MT7988 SoC, there are only 4 PHYs. That's port 0 to 3. Set the internal phy cases to '0 ... 3'. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 3a02308763ca..e7e7e89d8eca 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2562,7 +2562,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switc= h *ds, int port, =20 switch (port) { /* Internal PHY */ - case 0 ... 4: + case 0 ... 3: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); break; --=20 2.40.1 From nobody Fri Sep 20 03:51:43 2024 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEFD81C8A4; Sat, 13 Jan 2024 10:26:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="CRr8yp6e" Received: by mail.gandi.net (Postfix) with ESMTPSA id 32F126000C; Sat, 13 Jan 2024 10:26:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705141580; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LSKWVbeKaEgi3v3uISobEzTpPXktyePmA/wEfRZmpHA=; b=CRr8yp6eLY7+tpctHtfEmkzozpPnFgS0GiaeeorivUlms4KlUduGV4Xhc1knp8MbCtiGi1 EdoZ7NLQEwqOPg9CnVL51dA/yNiQaWdjdz1spX9P2/jnOTleHFOER6gUlQC7g6fR5wpqUb mICbcAFd64mqDxplvUmPY4j6MOhfIruv1DqqRH78p0YMZ9VuW5L9ag04vdN+SGYpRUTGoV lgQ4WeJbqOni4XsR9Oa43YxwiBWIXIyIh1ZlrjPV9FPIH8RXcjMb+mOzQK11T15U3TZE5p 7+A9u/XwjqXpS5ik/BEetXExzS2AH1Tuhb36Q3fKjOBSLvwY2meY50TSkL8dMw== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Luiz Angelo Daros de Luca , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 8/8] net: dsa: mt7530: do not clear config->supported_interfaces Date: Sat, 13 Jan 2024 13:25:29 +0300 Message-Id: <20240113102529.80371-9-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240113102529.80371-1-arinc.unal@arinc9.com> References: <20240113102529.80371-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com There's no need to clear the config->supported_interfaces bitmap before reporting the supported interfaces as all bits in the bitmap will already be initialized to zero when the phylink_config structure is allocated. There's no code that would change the bitmap beforehand. Remove it. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index e7e7e89d8eca..361a9cda48eb 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2558,8 +2558,6 @@ static void mt7531_mac_port_get_caps(struct dsa_switc= h *ds, int port, static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { - phy_interface_zero(config->supported_interfaces); - switch (port) { /* Internal PHY */ case 0 ... 3: --=20 2.40.1