From nobody Thu Dec 25 18:03:07 2025 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F04F6DD19 for ; Fri, 12 Jan 2024 14:49:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="IAyPh8XH" Received: by mail-lf1-f47.google.com with SMTP id 2adb3069b0e04-50edf4f478eso2860706e87.3 for ; Fri, 12 Jan 2024 06:49:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1705070949; x=1705675749; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hBytSUC/4Scw/6M7MDSEKF2OisRATxG4/2WDOpsmueA=; b=IAyPh8XH29doz03CWnm90tk/0fkCsc9S6BrGPCKLLkSSETxLSl/NrfboTqCddcI5JG 9TcXDl8MyiGhTLao0Bo4UL7rZ2GOWbvdohe6BOxvIJChSEEsINgQbJd2t6HeNcnPx2wb PhaBfcKYjTMefg/FhKRPFhhj+1lvhEts1jpfU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705070949; x=1705675749; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hBytSUC/4Scw/6M7MDSEKF2OisRATxG4/2WDOpsmueA=; b=V2wXBHysHbINKLkJ4IZzxRfs2ltN5T0SruTtqil1TFqhMiMpe0t4927jqMuMYWYgs6 8iLpZPsFMPDCC/QjG4pUVGb4TkFy+6Yzztnf7/ndJaozH4mwE8t7ilu9TAc81Sd6jBFK ZDs74D8v3ntmh8P5poak8AwnmOS+EulnCIyI3aErm66BW+t8xwog+X9hfO/9BUc/4qTe t4nvQEX4VQ5wRSdtoxmy/T7fK93H1g4qnrla29agMA87Q8hQjGzzx2l/siSs7Wi7UimO P/XOcR9cQ2ZypKOybBWL4BABq7RdvJjLO84oa55aWypIgLK7q3ZaOayiys70TtqLvaeJ Q0EQ== X-Gm-Message-State: AOJu0YwE7klnODUICROSYshM5nUIYqpH7/QBLgp2eExaObHnmp2nn0bD z9Ym2DHNGKhlHwZ3BW0JGcGWPMTW7nqFuybrotliFNg5my4= X-Google-Smtp-Source: AGHT+IHvD0o4uSsKQg/JFN33shK9eCTUk71p6NdviePAGeTDnD9r/WlHm8g9/EXSqnfgkxKsztjN4Q== X-Received: by 2002:ac2:4a7c:0:b0:50e:76d1:f02b with SMTP id q28-20020ac24a7c000000b0050e76d1f02bmr688423lfp.39.1705070948808; Fri, 12 Jan 2024 06:49:08 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it ([95.236.91.90]) by smtp.gmail.com with ESMTPSA id y11-20020a170906524b00b00a233515c39esm1869372ejm.67.2024.01.12.06.49.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:49:08 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Lee Jones , Alexandre Torgue , Raphael Gallais-Pou , Dario Binacchi , Conor Dooley , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v8 1/5] dt-bindings: mfd: stm32f7: Add binding definition for DSI Date: Fri, 12 Jan 2024 15:48:21 +0100 Message-ID: <20240112144902.40044-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> References: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add binding definition for MIPI DSI Host controller. Signed-off-by: Dario Binacchi Acked-by: Conor Dooley Acked-by: Lee Jones Reviewed-by: Raphael Gallais-Pou --- Changes in v8: - Add Acked-by tag of Lee Jones - Add Reviewed-by tag of Raphael Gallais-Pou Changes in v2: - Add Acked-by tag of Conor Dooley include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mf= d/stm32f7-rcc.h index 8d73a9c51e2b..a4e4f9271395 100644 --- a/include/dt-bindings/mfd/stm32f7-rcc.h +++ b/include/dt-bindings/mfd/stm32f7-rcc.h @@ -108,6 +108,7 @@ #define STM32F7_RCC_APB2_SAI1 22 #define STM32F7_RCC_APB2_SAI2 23 #define STM32F7_RCC_APB2_LTDC 26 +#define STM32F7_RCC_APB2_DSI 27 =20 #define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8)) #define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0) --=20 2.43.0 From nobody Thu Dec 25 18:03:07 2025 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEBBB6DD1D for ; Fri, 12 Jan 2024 14:49:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="cLnNct4e" Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-a2d04888d3dso4307566b.2 for ; Fri, 12 Jan 2024 06:49:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1705070950; x=1705675750; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mmQnQzOW0HVCglZmRdERbSkiK/7LfpA/GFNr/QR6hMQ=; b=cLnNct4e1FBsDE8Hbau/t6ulBRYrbwhlo7iIKD6qIMO2hJGdKC5XLDkeK2Pp1Iizvb yukC6rl3DveiGVyX5xFZrOtMeP0rYprnA/w+NUYjtgIX07NSFmE/l0mpaR5BNj0EGBX/ T52RPxc3z36i6oJ3d5Y/ASPuaIgP/9SLdKKf8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705070950; x=1705675750; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mmQnQzOW0HVCglZmRdERbSkiK/7LfpA/GFNr/QR6hMQ=; b=N/6oxfbR2bAlu9PJuvnmXM5EZ/jtJbOZDxvN39enWOJF1Rv28uXjR1UJy4TYw+3dP2 Kh4i1VJfT+aMIF2EiH0JXr3N5UwtpgxQ771J0Wff3YsAhPvE3xrNB3yvDaKdpqDypn60 zliPbny/6y64mhaV5se+ObEyliGyuzocIIXSgwa59UjbdL3JdsECpWX8g53pe7KFt41w 7BFzIuQcorhVirfT+QLFgkoS99LafQoqp0BQiVY+OzcxOD3Ejcd5umLc2rncgZ+/Ohgm 7LGc3BvQs3Ty9e/AAlctvz2NdXS/TwbadOGozo1DenQLqTbBh5/E61hdCfgNs4sw20Zr LETQ== X-Gm-Message-State: AOJu0YwgkgYN6bac5wd0TAw3kjOfQ1L5kYMeKan+xOZbypyCyUsiUjCG oibXtItcbMlixd9g5v0ucCXnwan3oSgd8eyIRUTQQyiSpVU= X-Google-Smtp-Source: AGHT+IHYE6WynxzGM2phhAonl7tB+VThaQnxrNudcqv2wkwoAxXrc2uhBIkAE0+iaAAt7os+42i7Ew== X-Received: by 2002:a17:906:5ac3:b0:a26:edeb:7635 with SMTP id x3-20020a1709065ac300b00a26edeb7635mr740160ejs.91.1705070949914; Fri, 12 Jan 2024 06:49:09 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it ([95.236.91.90]) by smtp.gmail.com with ESMTPSA id y11-20020a170906524b00b00a233515c39esm1869372ejm.67.2024.01.12.06.49.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:49:09 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Lee Jones , Alexandre Torgue , Raphael Gallais-Pou , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v8 2/5] ARM: dts: stm32: add DSI support on stm32f769 Date: Fri, 12 Jan 2024 15:48:22 +0100 Message-ID: <20240112144902.40044-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> References: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for MIPI DSI Host controller. Since MIPI DSI is not available on stm32f746, the patch adds the "stm32f769.dtsi" file containing the dsi node inside. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/st/stm32f769.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi diff --git a/arch/arm/boot/dts/st/stm32f769.dtsi b/arch/arm/boot/dts/st/stm= 32f769.dtsi new file mode 100644 index 000000000000..e09184f7079c --- /dev/null +++ b/arch/arm/boot/dts/st/stm32f769.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 Dario Binacchi + */ + +#include "stm32f746.dtsi" + +/ { + soc { + dsi: dsi@40016c00 { + compatible =3D "st,stm32-dsi"; + reg =3D <0x40016c00 0x800>; + interrupts =3D <98>; + clocks =3D <&rcc 1 CLK_F769_DSI>, <&clk_hse>; + clock-names =3D "pclk", "ref"; + resets =3D <&rcc STM32F7_APB2_RESET(DSI)>; + reset-names =3D "apb"; + status =3D "disabled"; + }; + }; +}; --=20 2.43.0 From nobody Thu Dec 25 18:03:07 2025 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E0D16E2B6 for ; Fri, 12 Jan 2024 14:49:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="eEUbToyn" Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-a2d04888d3dso4309766b.2 for ; Fri, 12 Jan 2024 06:49:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1705070951; x=1705675751; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QAtJVjLEM4PpD1LfLOq0lj7khrRF1/PVKMI6rTwwftg=; b=eEUbToyn+aojBH4dJXC09lvGAsPlEP/3Wu0b8Bb4bt+QTnPTD3XCVVj+Uuc20Qvsat dY0JXlBSTjVWfxLjJu2TmIQVQhGRinyoCjfu09ldt8lp4G+b1+bGY2kBTnCmzWi3LTK1 t6UoaH6MitDQRq750PHJ/ipT2CTcX02TIT/zY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705070951; x=1705675751; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QAtJVjLEM4PpD1LfLOq0lj7khrRF1/PVKMI6rTwwftg=; b=NRTFSoVUlCGxgWTxaeJvqxVlMnJ9J9jprC4MOW3zPicU7G0NbxnCaC8q3BcgM1qo9Y aejVtBmmnodbI7pov5lQr4p0KovIm4FjzcudgKnJcyc+q3OVFxqC+Giwz/bQcVxLHSgo II/A+eCwH2Xy/OcUvSSwzfxh5A2ri+Ngm2IcLrH8IJGAzRMuAuj7WgVbAktPd0bMBefI m9HhlLAR5Z72Y1XDOX8BDUYPX0KVN6dZxnrJ9aQV5j+D8ighPkvwzCjlJ8oxwkB+zyWT +RnPUn6B3Cb0Ir27+Lb/WP3LYY29/ZLkGLmMTRAJk2Ag58Dtjqf7rfNcuxdNsoGAj3gO iqaA== X-Gm-Message-State: AOJu0YxMr0UEzgs8UgQuw+iqjD5Jtvm66ivYelwr8fOqPeTYFhW3JbLU oJtm1sah3r39V3HxdtBTCm3o+4f0YpDqdwSgPpjdu9r+3rY= X-Google-Smtp-Source: AGHT+IGnASLVa+5h7B/dg8g2MVP/TIO2T1WEegpWrRvX6D1NsF09O7sDLnBQYxbYnr6URa2E6UrKUQ== X-Received: by 2002:a17:906:1e89:b0:a2c:2094:5d46 with SMTP id e9-20020a1709061e8900b00a2c20945d46mr679423ejj.81.1705070951050; Fri, 12 Jan 2024 06:49:11 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it ([95.236.91.90]) by smtp.gmail.com with ESMTPSA id y11-20020a170906524b00b00a233515c39esm1869372ejm.67.2024.01.12.06.49.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:49:10 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Lee Jones , Alexandre Torgue , Raphael Gallais-Pou , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v8 3/5] ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco Date: Fri, 12 Jan 2024 15:48:23 +0100 Message-ID: <20240112144902.40044-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> References: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In the schematics of document UM2033, the power supply for the micro SD card is the same 3v3 voltage that is used to power other devices on the board. By generalizing the name of the voltage regulator, it can be referenced by other nodes in the device tree without creating misunderstandings. This patch is preparatory for future developments. Signed-off-by: Dario Binacchi Reviewed-by: Raphael Gallais-Pou --- Changes in v8: - Add Reviewed-by tag of Raphael Gallais-Pou arch/arm/boot/dts/st/stm32f769-disco.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32f769-disco.dts b/arch/arm/boot/dts/s= t/stm32f769-disco.dts index 5d12ae25b327..8632bd866272 100644 --- a/arch/arm/boot/dts/st/stm32f769-disco.dts +++ b/arch/arm/boot/dts/st/stm32f769-disco.dts @@ -92,9 +92,9 @@ usbotg_hs_phy: usb-phy { clock-names =3D "main_clk"; }; =20 - mmc_vcard: mmc_vcard { + vcc_3v3: vcc_3v3 { compatible =3D "regulator-fixed"; - regulator-name =3D "mmc_vcard"; + regulator-name =3D "vcc_3v3"; regulator-min-microvolt =3D <3300000>; regulator-max-microvolt =3D <3300000>; }; @@ -128,7 +128,7 @@ &rtc { =20 &sdio2 { status =3D "okay"; - vmmc-supply =3D <&mmc_vcard>; + vmmc-supply =3D <&vcc_3v3>; cd-gpios =3D <&gpioi 15 GPIO_ACTIVE_LOW>; broken-cd; pinctrl-names =3D "default", "opendrain", "sleep"; --=20 2.43.0 From nobody Thu Dec 25 18:03:07 2025 Received: from mail-ed1-f48.google.com (mail-ed1-f48.google.com [209.85.208.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C7536EB43 for ; Fri, 12 Jan 2024 14:49:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="RXzxZwgU" Received: by mail-ed1-f48.google.com with SMTP id 4fb4d7f45d1cf-558e5ebc75dso355012a12.1 for ; Fri, 12 Jan 2024 06:49:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1705070952; x=1705675752; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CVCuj48+/xmu2vffE0IGCw3X5dc2D2jlmiS9QC151X0=; b=RXzxZwgU1v2Rz/4zBFn4r7maHN2eOrTATOJ44cFI6VmrBSYtRh08aORFC1a1qp4FyE l9rHXXGaGKKj8/z8tqnUNb6mOnYYyknDCOHa2Tht8+I0jb9u744qSiGsF3ftsy3toyuB Cr3y2Y/vc+rRN6XvPDH6Ug1QFgrZF81sgsP10= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705070952; x=1705675752; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CVCuj48+/xmu2vffE0IGCw3X5dc2D2jlmiS9QC151X0=; b=ZYPH/Jwuf3I5M+VFe0CZuJe9bctNoiXH5/6i3jEZ5Rz6k1a1vG2OttMdlhkJhs7kAL 3RveOEnvMxu2A+0qwQ56mZDO3dWmKu6/xhyagNUqUfSS9FnA2Tc8CcBpfnZeFQ6pfSab v33MPR5LV555uYSKjcUgz4mHfOwVYkfUuyt0ttUIg1+2ZK7465EOQTVYqyL5H9aU3ZNZ uigfN72jCbJDzjZSJVKrg2wtkbYy4ndP8li+jTwk6drusdKwkDnTcyWGmBqC4RL63d3U GFVOqHaJBumgTxRj3XyqcY3+K14sLzA3Lpqxb6IMyzq0qrgfLzkyVU9NfvMK7p/2vBXo CB2Q== X-Gm-Message-State: AOJu0YztNipqT18OjCGcq81abXXcfdx+OuplSlvO0hjZUDf+QpTGL8s2 UETatFw/S7O9ZKHkDPSC3vc2E78qkDXPLEBA0/cMc9VDGnw= X-Google-Smtp-Source: AGHT+IG9wRHuapUVC01qOKW4TF0F3YFJ1pcXZOWVjPvRN+ahErWQIcf1zhmQFQVjTYI4Ywxkzjssjg== X-Received: by 2002:a17:907:a4c:b0:a27:941f:32a1 with SMTP id be12-20020a1709070a4c00b00a27941f32a1mr901930ejc.58.1705070952151; Fri, 12 Jan 2024 06:49:12 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it ([95.236.91.90]) by smtp.gmail.com with ESMTPSA id y11-20020a170906524b00b00a233515c39esm1869372ejm.67.2024.01.12.06.49.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:49:11 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Lee Jones , Alexandre Torgue , Raphael Gallais-Pou , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v8 4/5] ARM: dts: stm32: add display support on stm32f769-disco Date: Fri, 12 Jan 2024 15:48:24 +0100 Message-ID: <20240112144902.40044-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> References: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The patch adds display support on the stm32f769-disco board. Signed-off-by: Dario Binacchi --- Changes in v8: - Remove unit name from 'ltdc/port/endpoint@0' to fix the compiling warning: ../arch/arm/boot/dts/st/stm32f769-disco.dts:189.28-191.5: Warning (unit_address_vs_reg): /soc/display-controller@40016800/port/endpoint@0: = node has a unit name, but no reg or ranges property arch/arm/boot/dts/st/stm32f769-disco.dts | 72 +++++++++++++++++++++++- 1 file changed, 71 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/st/stm32f769-disco.dts b/arch/arm/boot/dts/s= t/stm32f769-disco.dts index 8632bd866272..b38eef824463 100644 --- a/arch/arm/boot/dts/st/stm32f769-disco.dts +++ b/arch/arm/boot/dts/st/stm32f769-disco.dts @@ -41,7 +41,7 @@ */ =20 /dts-v1/; -#include "stm32f746.dtsi" +#include "stm32f769.dtsi" #include "stm32f769-pinctrl.dtsi" #include #include @@ -60,6 +60,19 @@ memory@c0000000 { reg =3D <0xC0000000 0x1000000>; }; =20 + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + linux,dma { + compatible =3D "shared-dma-pool"; + linux,dma-default; + no-map; + size =3D <0x100000>; + }; + }; + aliases { serial0 =3D &usart1; }; @@ -85,6 +98,13 @@ button-0 { }; }; =20 + panel_backlight: panel-backlight { + compatible =3D "gpio-backlight"; + gpios =3D <&gpioi 14 GPIO_ACTIVE_HIGH>; + default-on; + status =3D "okay"; + }; + usbotg_hs_phy: usb-phy { #phy-cells =3D <0>; compatible =3D "usb-nop-xceiv"; @@ -114,6 +134,46 @@ &clk_hse { clock-frequency =3D <25000000>; }; =20 +&dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dsi_in: endpoint { + remote-endpoint =3D <<dc_out_dsi>; + }; + }; + + port@1 { + reg =3D <1>; + dsi_out: endpoint { + remote-endpoint =3D <&dsi_panel_in>; + }; + }; + }; + + panel0: panel-dsi@0 { + compatible =3D "orisetech,otm8009a"; + reg =3D <0>; /* dsi virtual channel (0..3) */ + reset-gpios =3D <&gpioj 15 GPIO_ACTIVE_LOW>; + power-supply =3D <&vcc_3v3>; + backlight =3D <&panel_backlight>; + status =3D "okay"; + + port { + dsi_panel_in: endpoint { + remote-endpoint =3D <&dsi_out>; + }; + }; + }; +}; + &i2c1 { pinctrl-0 =3D <&i2c1_pins_b>; pinctrl-names =3D "default"; @@ -122,6 +182,16 @@ &i2c1 { status =3D "okay"; }; =20 +<dc { + status =3D "okay"; + + port { + ltdc_out_dsi: endpoint { + remote-endpoint =3D <&dsi_in>; + }; + }; +}; + &rtc { status =3D "okay"; }; --=20 2.43.0 From nobody Thu Dec 25 18:03:07 2025 Received: from mail-lf1-f50.google.com (mail-lf1-f50.google.com [209.85.167.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8EE406EB7A for ; Fri, 12 Jan 2024 14:49:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="cYqm3Pvi" Received: by mail-lf1-f50.google.com with SMTP id 2adb3069b0e04-50e7f58c5fbso8816489e87.1 for ; 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Fri, 12 Jan 2024 06:49:13 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it ([95.236.91.90]) by smtp.gmail.com with ESMTPSA id y11-20020a170906524b00b00a233515c39esm1869372ejm.67.2024.01.12.06.49.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 06:49:13 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Lee Jones , Alexandre Torgue , Raphael Gallais-Pou , Dario Binacchi , Linus Walleij , Andre Przywara , Baruch Siach , Conor Dooley , Krzysztof Kozlowski , =?UTF-8?q?Leonard=20G=C3=B6hrs?= , Maxime Coquelin , Peter Rosin , Rob Herring , Sean Nyekjaer , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v8 5/5] ARM: dts: add stm32f769-disco-mb1225-revb03-mb1166-reva09 Date: Fri, 12 Jan 2024 15:48:25 +0100 Message-ID: <20240112144902.40044-6-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> References: <20240112144902.40044-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As reported in the section 8.3 (i. e. Board revision history) of document UM2033 (i. e. Discovery kit with STM32F769NI MCU) these are the changes related to the board revisions addressed by the patch: - Board MB1225 revision B-03: - Memory MICRON MT48LC4M32B2B5-6A replaced by ISSI IS42S32400F-6BL - Board MB1166 revision A-09: - LCD FRIDA FRD397B25009-D-CTK replaced by FRIDA FRD400B25025-A-CTK The patch only adds the DTS support for the new display which belongs to to the Novatek NT35510-based panel family. Signed-off-by: Dario Binacchi Reviewed-by: Linus Walleij Reviewed-by: Raphael Gallais-Pou --- Changes in v8: - Add Reviewed-by tag of Linus Walleij - Add Reviewed-by tag of Raphael Gallais-Pou Changes in v7: - Replace .dts with .dtb in the Makefile Changes in v6: - Drop patches - [5/8] dt-bindings: nt35510: add compatible for FRIDA FRD400B25025-A-CTK - [7/8] drm/panel: nt35510: move hardwired parameters to configuration - [8/8] drm/panel: nt35510: support FRIDA FRD400B25025-A-CTK because applied by the maintainer Linus Walleij Changes in v5: - Replace GPIOD_ASIS with GPIOD_OUT_HIGH in the call to devm_gpiod_get_opti= onal(). Changes in v2: - Change the status of panel_backlight node to "disabled" - Delete backlight property from panel0 node. - Re-write the patch [8/8] "drm/panel: nt35510: support FRIDA FRD400B25025-= A-CTK" in the same style as the original driver. arch/arm/boot/dts/st/Makefile | 1 + ...2f769-disco-mb1225-revb03-mb1166-reva09.dts | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb11= 66-reva09.dts diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile index 7892ad69b441..aa5b50d7ac61 100644 --- a/arch/arm/boot/dts/st/Makefile +++ b/arch/arm/boot/dts/st/Makefile @@ -23,6 +23,7 @@ dtb-$(CONFIG_ARCH_STM32) +=3D \ stm32f469-disco.dtb \ stm32f746-disco.dtb \ stm32f769-disco.dtb \ + stm32f769-disco-mb1225-revb03-mb1166-reva09.dtb \ stm32429i-eval.dtb \ stm32746g-eval.dtb \ stm32h743i-eval.dtb \ diff --git a/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva= 09.dts b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.d= ts new file mode 100644 index 000000000000..014cac192375 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32f769-disco-mb1225-revb03-mb1166-reva09.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 Dario Binacchi + */ + +#include "stm32f769-disco.dts" + +&panel_backlight { + status =3D "disabled"; +}; + +&panel0 { + compatible =3D "frida,frd400b25025", "novatek,nt35510"; + vddi-supply =3D <&vcc_3v3>; + vdd-supply =3D <&vcc_3v3>; + /delete-property/backlight; + /delete-property/power-supply; +}; --=20 2.43.0