From nobody Wed Nov 13 01:34:33 2024 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 558425D910; Fri, 12 Jan 2024 09:46:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="fzQERIlO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1705052803; bh=vVV7secnJj63oz5uInWOkRetftEKYjRoVqiH5bnBvmg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fzQERIlOBwgJa7CAAHFtx6d0Ks7iziy2V44abe4pc5HlNc01vAA8EKk1AJQRIUyJz ZXA4IOrZxwFvxH8Uy154FDyA+ujQRc0Ez6RvbDI7LvMHRALHo9fpiTColgBDmFRFZz wY4yONFYvn9huTwS2RPQYq2y/gCyoV8Oad85xE80V57dqwiDZQg4VpEmAV70jjWGTf 6sGGRnvnOCKgZFZP3QO7FcbL3rhILa6ubNnwNyQlQhijcLye5R6jq+KXWX83EDbpzM fGlBWkXv2h+10cVsh2ZvuJo9u/jkmEiWGgEfWNcr19KyDuTAibTMbQuqM7UqbaTuuE hCXZr4AwbJpYQ== Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id C519E3782021; Fri, 12 Jan 2024 09:46:42 +0000 (UTC) From: AngeloGioacchino Del Regno To: linux-mediatek@lists.infradead.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, hsinyi@chromium.org, nfraprado@collabora.com, macpaul.lin@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 05/15] arm64: dts: mediatek: radxa-nio-12l: Configure board regulators Date: Fri, 12 Jan 2024 10:46:22 +0100 Message-ID: <20240112094632.66310-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> References: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the entire power tree, which also includes all of the voltage regulators found on all of the PMICs and fixed vregs on this board. While at it, also add the two MT6315 PMICs over SPMI, providing CPU-Big and GPU power rails. Signed-off-by: AngeloGioacchino Del Regno --- .../dts/mediatek/mt8395-radxa-nio-12l.dts | 228 ++++++++++++++++++ 1 file changed, 228 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/a= rm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts index 281847b8f022..0daf27410311 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts @@ -8,8 +8,12 @@ */ =20 #include "mt8195.dtsi" +#include "mt6359.dtsi" +#include #include #include +#include +#include =20 / { model =3D "Radxa NIO 12L"; @@ -36,6 +40,48 @@ memory@40000000 { reg =3D <0 0x40000000 0x1 0x0>; }; =20 + wifi_vreg: regulator-wifi-3v3-en { + compatible =3D "regulator-fixed"; + regulator-name =3D "wifi_3v3_en"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpio =3D <&pio 67 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_vreg_pins>; + vin-supply =3D <&vsys>; + }; + + /* system wide switching 5.0V power rail */ + vsys: regulator-vsys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vsys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_vsys>; + }; + + vsys_buck: regulator-vsys-buck { + compatible =3D "regulator-fixed"; + regulator-name =3D "vsys_buck"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_vsys>; + }; + + /* Rail from power-only "TYPE C DC" port */ + vcc5v0_vsys: regulator-vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + }; + reserved-memory { #address-cells =3D <2>; #size-cells =3D <2>; @@ -118,9 +164,138 @@ mt6360: pmic@34 { interrupt-controller; #interrupt-cells =3D <1>; pinctrl-0 =3D <&mt6360_pins>; + + regulator { + compatible =3D "mediatek,mt6360-regulator"; + LDO_VIN1-supply =3D <&vsys_buck>; + LDO_VIN3-supply =3D <&mt6360_buck2>; + + mt6360_buck1: buck1 { + regulator-name =3D "emi_vdd2"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1300000>; + regulator-allowed-modes =3D ; + regulator-always-on; + }; + + mt6360_buck2: buck2 { + regulator-name =3D "emi_vddq"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1300000>; + regulator-allowed-modes =3D ; + regulator-always-on; + }; + + mt6360_ldo1: ldo1 { + regulator-name =3D "ext_lcd_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-allowed-modes =3D ; + regulator-always-on; + }; + + mt6360_ldo2: ldo2 { + regulator-name =3D "panel1_p1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-allowed-modes =3D ; + }; + + mt6360_ldo3: ldo3 { + regulator-name =3D "vmc_pmu"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <3600000>; + regulator-allowed-modes =3D ; + }; + + mt6360_ldo5: ldo5 { + regulator-name =3D "vmch_pmu"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-allowed-modes =3D ; + regulator-always-on; + }; + + mt6360_ldo6: ldo6 { + regulator-name =3D "mt6360_ldo6"; /* Test point */ + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <2100000>; + regulator-allowed-modes =3D ; + }; + + mt6360_ldo7: ldo7 { + regulator-name =3D "emi_vmddr_en"; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <2100000>; + regulator-allowed-modes =3D ; + regulator-always-on; + }; + }; }; }; =20 +&mt6359_vaud18_ldo_reg { + regulator-always-on; +}; + +&mt6359_vbbck_ldo_reg { + regulator-always-on; +}; + +/* For USB Hub */ +&mt6359_vcamio_ldo_reg { + regulator-always-on; +}; + +&mt6359_vcn33_2_bt_ldo_reg { + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; +}; + +&mt6359_vcore_buck_reg { + regulator-always-on; +}; + +&mt6359_vgpu11_buck_reg { + regulator-always-on; +}; + +&mt6359_vproc1_buck_reg { + regulator-always-on; +}; + +&mt6359_vproc2_buck_reg { + regulator-always-on; +}; + +&mt6359_vpu_buck_reg { + regulator-always-on; +}; + +&mt6359_vrf12_ldo_reg { + regulator-always-on; +}; + +&mt6359_vsram_md_ldo_reg { + regulator-always-on; +}; + +/* for GPU SRAM */ +&mt6359_vsram_others_ldo_reg { + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; +}; + &pio { i2c2_pins: i2c2-pins { pins-bus { @@ -164,6 +339,59 @@ pins-bus { ; }; }; + + wifi_vreg_pins: wifi-vreg-pins { + pins-wifi-pmu-en { + pinmux =3D ; + output-high; + }; + + pins-wifi-vreg-en { + pinmux =3D ; + }; + }; +}; + +&pmic { + interrupts-extended =3D <&pio 222 IRQ_TYPE_LEVEL_HIGH>; +}; + +&spmi { + #address-cells =3D <2>; + #size-cells =3D <0>; + + mt6315_6: pmic@6 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x6 SPMI_USID>; + + regulators { + mt6315_6_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vbcpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + regulator-always-on; + }; + }; + }; + + mt6315_7: pmic@7 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x7 SPMI_USID>; + + regulators { + mt6315_7_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vgpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + }; + }; + }; }; =20 &uart0 { --=20 2.43.0