From nobody Sat Dec 27 02:14:59 2025 Received: from mail-lj1-f178.google.com (mail-lj1-f178.google.com [209.85.208.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CB4614F9C for ; Thu, 11 Jan 2024 10:53:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="NXHYAjPp" Received: by mail-lj1-f178.google.com with SMTP id 38308e7fff4ca-2cd703e9014so30538151fa.1 for ; Thu, 11 Jan 2024 02:53:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1704970403; x=1705575203; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c6lTYGwOZkH/q3mVT10Wfxgf2APvMbHICMTqCuHaYlQ=; b=NXHYAjPpKA3Q1ux+0SOabItYFgfO41DrkziN7/orQfIWT96Vlg1uOrY/8I5CQo+vuX hDHeQw8OGKYghiHxsuXusZsCMT7908VWxu0TiYeq3CNYIvx3WmmD/b6dWnmYbgEf+3xa q9Qk/xP+v/VsjbJ9MWEZaKG5g1UaU1Q4ZhVis= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704970403; x=1705575203; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c6lTYGwOZkH/q3mVT10Wfxgf2APvMbHICMTqCuHaYlQ=; b=eLmHHY+gEh0N9e6wIaW9BAxO6P1zpUTr0TzLrt5OuHAmzOwomXOEkkKT7RFZ1aWHCJ 4rfPqb2MPDkI89cuE9nCOuzyB3BumI8KOhvNJTMkSoJAAu44Dr73M06+3yx53SaJSFME BoqRZaArykoopoGym228w/AVrt8R8u9fqNnGk6uEz0uZvFvb6BDohocaMt1S7+vI+xtA 9JXxZGfuXbz53WaoRvvCicFyQSN7KEuFstAQU66bftkNEx46Rs6WPMmQKt6gSTeHgDWa lDz5gBi49WJUuxeoIX2W5/2blecRk7leWfua6OYAaYurZMHwQuopHIDgx6K/gR4SBSve adIQ== X-Gm-Message-State: AOJu0YxrOtWMz6g9b5ms/UUF5ikzFxyfTCJKpZKokHKl+xY8ln+wKxZk x9xZhvofUepPQ3X9hUIj3l+wCg48QvfNOc265VG1hTad6tU= X-Google-Smtp-Source: AGHT+IE1HKcG66xzhedJzYZxl313ZtU0FtvPMZKoDArJOHYOCPj+6qDMc+3XAcw/hed8iod9lUmPpQ== X-Received: by 2002:a2e:b1c7:0:b0:2cc:8545:d6f9 with SMTP id e7-20020a2eb1c7000000b002cc8545d6f9mr329576lja.15.1704970403355; Thu, 11 Jan 2024 02:53:23 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it ([95.236.91.90]) by smtp.gmail.com with ESMTPSA id eo9-20020a056402530900b00557b0f8d906sm459774edb.70.2024.01.11.02.53.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 02:53:23 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Alexandre Torgue , Lee Jones , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v6 4/5] ARM: dts: stm32: add display support on stm32f769-disco Date: Thu, 11 Jan 2024 11:53:10 +0100 Message-ID: <20240111105314.8186-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240111105314.8186-1-dario.binacchi@amarulasolutions.com> References: <20240111105314.8186-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The patch adds display support on the stm32f769-disco board. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/st/stm32f769-disco.dts | 72 +++++++++++++++++++++++- 1 file changed, 71 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/st/stm32f769-disco.dts b/arch/arm/boot/dts/s= t/stm32f769-disco.dts index 8632bd866272..d1eb5f9c78bf 100644 --- a/arch/arm/boot/dts/st/stm32f769-disco.dts +++ b/arch/arm/boot/dts/st/stm32f769-disco.dts @@ -41,7 +41,7 @@ */ =20 /dts-v1/; -#include "stm32f746.dtsi" +#include "stm32f769.dtsi" #include "stm32f769-pinctrl.dtsi" #include #include @@ -60,6 +60,19 @@ memory@c0000000 { reg =3D <0xC0000000 0x1000000>; }; =20 + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + linux,dma { + compatible =3D "shared-dma-pool"; + linux,dma-default; + no-map; + size =3D <0x100000>; + }; + }; + aliases { serial0 =3D &usart1; }; @@ -85,6 +98,13 @@ button-0 { }; }; =20 + panel_backlight: panel-backlight { + compatible =3D "gpio-backlight"; + gpios =3D <&gpioi 14 GPIO_ACTIVE_HIGH>; + default-on; + status =3D "okay"; + }; + usbotg_hs_phy: usb-phy { #phy-cells =3D <0>; compatible =3D "usb-nop-xceiv"; @@ -114,6 +134,46 @@ &clk_hse { clock-frequency =3D <25000000>; }; =20 +&dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dsi_in: endpoint { + remote-endpoint =3D <<dc_out_dsi>; + }; + }; + + port@1 { + reg =3D <1>; + dsi_out: endpoint { + remote-endpoint =3D <&dsi_panel_in>; + }; + }; + }; + + panel0: panel-dsi@0 { + compatible =3D "orisetech,otm8009a"; + reg =3D <0>; /* dsi virtual channel (0..3) */ + reset-gpios =3D <&gpioj 15 GPIO_ACTIVE_LOW>; + power-supply =3D <&vcc_3v3>; + backlight =3D <&panel_backlight>; + status =3D "okay"; + + port { + dsi_panel_in: endpoint { + remote-endpoint =3D <&dsi_out>; + }; + }; + }; +}; + &i2c1 { pinctrl-0 =3D <&i2c1_pins_b>; pinctrl-names =3D "default"; @@ -122,6 +182,16 @@ &i2c1 { status =3D "okay"; }; =20 +<dc { + status =3D "okay"; + + port { + ltdc_out_dsi: endpoint@0 { + remote-endpoint =3D <&dsi_in>; + }; + }; +}; + &rtc { status =3D "okay"; }; --=20 2.43.0