From nobody Thu Dec 25 23:29:42 2025 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13EC0F9EF; Thu, 11 Jan 2024 08:19:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kI2nw5f/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704961186; x=1736497186; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tu9E652ONSBsccr80I5sJ0ZIDYKgQL8NQOkj5aWqOCA=; b=kI2nw5f/QJwfoBL6cn0yDZarQTF4u5kJKjD4u/f8wc8NxMjTh3M/0iNM bbB2uiKusVWsLYa1fXOs0mXZcclPZwFL9j/iiEb62VRsBWFgT1VolLSoj WCSuWecZDSLb3ke/IEZjmpQ2XH0oeq0t5VuAK+5r6v8LahGaLyiTVhlDy 5kIZH6YALVziU/lbaEuE9o6IR5LNcoW/T/2+4CkSAcmkGJT0DfPH+oK6N oLuYjxX+alHc65QqX1j72zIZMPhkuUtr7bfXVWlBB/xpI5+gj7SbpkuD2 k4Is0SWIAGVo25QQBJG9KNImZi5i90dIf8ugl3djpyFOpjuiBDp+W3tqt A==; X-IronPort-AV: E=McAfee;i="6600,9927,10949"; a="465166381" X-IronPort-AV: E=Sophos;i="6.04,185,1695711600"; d="scan'208";a="465166381" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2024 00:19:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10949"; a="925923034" X-IronPort-AV: E=Sophos;i="6.04,185,1695711600"; d="scan'208";a="925923034" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.52.224]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2024 00:19:40 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH V4 03/11] perf tools: Enable evsel__is_aux_event() to work for ARM/ARM64 Date: Thu, 11 Jan 2024 10:19:06 +0200 Message-Id: <20240111081914.3123-4-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240111081914.3123-1-adrian.hunter@intel.com> References: <20240111081914.3123-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Set pmu->auxtrace on ARM/ARM64 AUX area PMUs. evsel__is_aux_event() needs the setting to identify AUX area tracing selected events. Currently, the features that use evsel__is_aux_event() are used only by Intel PT, but that may change in the future. Signed-off-by: Adrian Hunter --- tools/perf/arch/arm/util/pmu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c index 7f3af3b97f3b..88fbd366246d 100644 --- a/tools/perf/arch/arm/util/pmu.c +++ b/tools/perf/arch/arm/util/pmu.c @@ -19,14 +19,17 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_u= nused) #ifdef HAVE_AUXTRACE_SUPPORT if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) { /* add ETM default config here */ + pmu->auxtrace =3D true; pmu->selectable =3D true; pmu->perf_event_attr_init_default =3D cs_etm_get_default_config; #if defined(__aarch64__) } else if (strstarts(pmu->name, ARM_SPE_PMU_NAME)) { + pmu->auxtrace =3D true; pmu->selectable =3D true; pmu->is_uncore =3D false; pmu->perf_event_attr_init_default =3D arm_spe_pmu_default_config; } else if (strstarts(pmu->name, HISI_PTT_PMU_NAME)) { + pmu->auxtrace =3D true; pmu->selectable =3D true; #endif } --=20 2.34.1