From nobody Thu Dec 25 19:57:21 2025 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B39056754 for ; Thu, 11 Jan 2024 19:57:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="stPan0EA" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-3367601a301so4959616f8f.2 for ; Thu, 11 Jan 2024 11:57:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705003024; x=1705607824; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hARQAQOLcSzjwOPYvs4BLOOY/nQZprU58P/GDXDBCPs=; b=stPan0EAHPqgzz1Cpx+gYdnDp30PfCLG1c87lKQSgDhTJA8ielZlsgLgA+HfBH6IiG z00NYlxPH59bSE2MxPVdgpDbEdd7y5fFccMU+B3AOtah57F+Um97sz2jSzohopy+6D7f +P8bQO5B/4KeV8bMHCsTlZe55uRBRSoHiYBIxf12Ju8WGTqDBB536qxH8VWSey/OBcfY CeXFJ3ciT8AIq4Pm6rGUM4uAzAbaC8KGS4/ewzPtuLz3IHucsdSn/xDWEF8Poi69nKJe d5CvF/66EHau12lmF9NRFDe4pEgJg0W3E/Mpo46NWeJ0xVBmFEpKH73+S+Y7RDAYHU1p brtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705003024; x=1705607824; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hARQAQOLcSzjwOPYvs4BLOOY/nQZprU58P/GDXDBCPs=; b=Gy29BC2+Pw1uX5Cvq6UuCmYplNkOjeQXXr0rvDRT75ZovFZ64oWeE2+xNIseNR1jPg 3LEFvwxdDnO0Lcr1cOAXy6yx1VfmPUgKwTFi8wo9ciZqoIZLethHO8DtJ620EHC8B7Zd G7ZRtfnvjIPFF3fVB8lpIV2AFEUqwhL0OwUFMsvOAZ/YOa4KdrotLrrjd1GB1/cldZkh +F91t25YDj6SJxUrgjxtQ7W1ifb2gHgrNEW2RgF0ViSATbXTJz/2XanuAB5oF6et89pP DJgjEHgNHz64elYThLqXEc6WGD7qtURa7W4kKkkhSq7XCDnMN2FDw2BWX6cVZC8zDzWP qpPA== X-Gm-Message-State: AOJu0Yyi6i0N+caRXuvCPzP1mYiaCPOV32bgHpnotbZ3I1RDBHG/AYJO eSi1jemSOl1u+Jdu0tyusQ7iuPkN5Tb8+zVO/YFf+5LkLLHPVw== X-Google-Smtp-Source: AGHT+IFL96e41K600fJJGUs5F1vtnJGv3lVq4s6iPMdPh4ieOBC2qO+nj0jDH5zlPmNgCaxRsYbrVg== X-Received: by 2002:a05:6000:8c:b0:337:7680:885b with SMTP id m12-20020a056000008c00b003377680885bmr107073wrx.38.1705003024452; Thu, 11 Jan 2024 11:57:04 -0800 (PST) Received: from [127.0.1.1] ([37.228.218.3]) by smtp.gmail.com with ESMTPSA id b7-20020adfe647000000b0033763a9ea2dsm1955382wrn.63.2024.01.11.11.57.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 11:57:04 -0800 (PST) From: Bryan O'Donoghue Date: Thu, 11 Jan 2024 19:57:02 +0000 Subject: [PATCH 1/5] media: qcom: camss: csiphy-3ph: Add Gen2 v1.1 two-phase MIPI CSI-2 DPHY init Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-1-b92a650121ba@linaro.org> References: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> In-Reply-To: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> To: Hans Verkuil , Laurent Pinchart , Robert Foss , Todor Tomov , Bjorn Andersson , Konrad Dybcio , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.13-dev-4e032 Add a PHY configuration sequence for the sc8280xp which uses a Qualcomm Gen 2 version 1.1 CSI-2 PHY. The PHY can be configured as two phase or three phase in C-PHY or D-PHY mode. This configuration supports two-phase D-PHY mode. Reviewed-by: Konrad Dybcio Signed-off-by: Bryan O'Donoghue --- .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 85 ++++++++++++++++++= ++++ 1 file changed, 85 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/dri= vers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index f50e2235c37f..66ff48aeab64 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -148,6 +148,91 @@ csiphy_reg_t lane_regs_sdm845[5][14] =3D { }, }; =20 +/* GEN2 1.1 2PH */ +static const struct +csiphy_reg_t lane_regs_sc8280xp[5][14] =3D { + { + {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0008, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x000C, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0060, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, + }, + { + {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0734, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x071C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0708, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x070C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0760, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0764, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, + }, + { + {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0234, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x021C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0200, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0208, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x020C, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0260, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, + }, + { + {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0400, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0408, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x040C, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0460, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, + }, + { + {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0634, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x061C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0600, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0608, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x060C, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, + }, +}; + /* GEN2 1.2.1 2PH */ static const struct csiphy_reg_t lane_regs_sm8250[5][20] =3D { --=20 2.42.0 From nobody Thu Dec 25 19:57:21 2025 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F35235675F for ; Thu, 11 Jan 2024 19:57:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="c4sm9qUr" Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-336dcebcdb9so5187490f8f.1 for ; Thu, 11 Jan 2024 11:57:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705003025; x=1705607825; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZZgZWlLOuuHga2qhsI0tLSH9tBejx4Id+Q/YPwkUBME=; b=c4sm9qUrYKH+8olL55EoTIDnWcB6hriLi8xL2Hz6DxiaqX0wkWftqPnW/2chuexifJ USVmoZ3CtJDlSqll7bHE2Feiw88hqlj4S6TS0qEIrSg0SRV2egW6SOAia0SnY9Lgh3KM pVTMzQyYOo5lKzjsIZmhxUF8YuimtyQt+Pj7otVI5fvTy2/xte1RBg15XcuX9JlOdy09 BClwfWXmwjlW9LUWw6RANOZ4JCRbCVoCaOG7fHCf375QiNlnuIWplyRMPYqfPv9+wanG wuRnPj4Cn8rOUhnFk6CsItxPvizkmuX0xZ13ywq75eI/z6fF0lVBWt5dSBfNQHwrtP7f cRfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705003025; x=1705607825; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZZgZWlLOuuHga2qhsI0tLSH9tBejx4Id+Q/YPwkUBME=; b=J2YzD1753ecLwwaMgBBA87qWlKLdPXnpZIMuu6ddO/qQw94FP9blW6aXJA9IUtITGK b8oNNn1oiQN9blLEmGWlLZlEHU/Ig0lJ3RTG3qFLhOZADUKLTR6GLmb0Mj4SxBTZdPtr G9kCGVNLZEREfFLjjTdVMJuYy72wOvq5n2YfxGHovMjpbglyJ5NBjobu4R85fitkfLk6 2ghawLes0TxKz/G7l17UhbnwuGQTspoiE51S5iYbTkkMlZSiHPhrE3hLQbNRMc5A+x1r byQfq+lkPPRdW4d9erncn2HM8nHQRHBysRQMMgqN1J9AbHMYmDX9jx4rR5HboEwbyso6 4ASg== X-Gm-Message-State: AOJu0Yw5qPj4ir5fZ7AhypTiWaOU43727f1F4fDaEk0rd9hqMsUhhUVK qE7eYSt+LU/WZt1Dc/7Uo3XqxM/Ulx4oSw== X-Google-Smtp-Source: AGHT+IHbYFnxaZC2TUCLNG8JxqpcbQ6mJ0YZ5FZ0wSYJrvJECq4/mFEWuk77HvnMwC8MqDC1U+0KIw== X-Received: by 2002:a5d:6104:0:b0:337:652a:434d with SMTP id v4-20020a5d6104000000b00337652a434dmr82635wrt.137.1705003025332; Thu, 11 Jan 2024 11:57:05 -0800 (PST) Received: from [127.0.1.1] ([37.228.218.3]) by smtp.gmail.com with ESMTPSA id b7-20020adfe647000000b0033763a9ea2dsm1955382wrn.63.2024.01.11.11.57.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 11:57:05 -0800 (PST) From: Bryan O'Donoghue Date: Thu, 11 Jan 2024 19:57:03 +0000 Subject: [PATCH 2/5] media: qcom: camss: Add CAMSS_SC8280XP enum Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-2-b92a650121ba@linaro.org> References: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> In-Reply-To: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> To: Hans Verkuil , Laurent Pinchart , Robert Foss , Todor Tomov , Bjorn Andersson , Konrad Dybcio , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.13-dev-4e032 Adds a CAMSS SoC identifier for the SC8280XP. Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/camss/camss.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/plat= form/qcom/camss/camss.h index a0c2dcc779f0..ac15fe23a702 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -77,6 +77,7 @@ enum camss_version { CAMSS_660, CAMSS_845, CAMSS_8250, + CAMSS_8280XP, }; =20 enum icc_count { --=20 2.42.0 From nobody Thu Dec 25 19:57:21 2025 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E1B456B76 for ; Thu, 11 Jan 2024 19:57:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="z87XcEkX" Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-336897b6bd6so5338325f8f.2 for ; Thu, 11 Jan 2024 11:57:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705003026; x=1705607826; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VruG++fZ5jU2hKKx0BJ6HBmek88ni0w2T34SzkuW8J8=; b=z87XcEkX2mWw5raE9302J52rYVHQdzeRiz+OtPwM5B8wGVw3vy8UILrn3Kv8BvaOHg HN8DSgfUICE6XS3rWLCnnUOgTtQjQRQNpbfVJnCzFwWBNAnuTyCzwYYRRuTaPDw3JhF9 P4b78O2X8XZtxyBHq+YCdI+FDt0yPXskwKHWq/cB7O35U+n9qaOrZPJEWQRblcUia9Kd PzN9BeIctCnkl2qy4GeDvO98N4VXggBxzRPdRwAzAfQ8JzuEEv+SW/CMARVuT0WN9823 pDiGhwg10jcGRd2T38eb62ct1zChWgE4UQY1Q9cd7+Q0j/EdkvKHKOcDOsYmpe4y8NUf mijg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705003026; x=1705607826; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VruG++fZ5jU2hKKx0BJ6HBmek88ni0w2T34SzkuW8J8=; b=OgReiiQXlsvEAtY26lFWKMFZs3H1Gw3MZPa6YFKUqFwQG63EG5wmHawt8Wlyc7Htym EN9r+gXg0r4Y8hzjmkitfDvzoTsURq6Frb+sAGXsd5qGcB92+C0F92u6xN8qHrWA7V7v 2rUCJbRaDIG1Ewr2+mdjSh8KwySPsbPYojjypBrds7Pe93Hipru3jxFJqvSQ0PjUB66h YWEd3Sn4DC0t7Uvsr+IE8ITCkOzo1MkQxVJscFlbkUgdMj8rkh9rkA2+bb62KVaS7pl+ TNgEmYjv4LnDKyEdFnft7v0z3PNL1OnNP2G2wpS/xMfPfO4DYw33zpjluhPD6HX65rU/ kZ6w== X-Gm-Message-State: AOJu0YzXdr9OZsmQAZ4MIQj9W/UXasCr3Cm535YB0jki5avVPN06F4+o ag9coYKXEZUZ9eQPWe6ITYThgYxJt/Pp0A== X-Google-Smtp-Source: AGHT+IHeT5URh66hPtENDGA/6G5VukazA73Mm07T/ZeTNGJuociiql/E6fVXl+q2sMPpMOcFkUuyAg== X-Received: by 2002:adf:e4c8:0:b0:336:ca94:3e00 with SMTP id v8-20020adfe4c8000000b00336ca943e00mr127785wrm.69.1705003026587; Thu, 11 Jan 2024 11:57:06 -0800 (PST) Received: from [127.0.1.1] ([37.228.218.3]) by smtp.gmail.com with ESMTPSA id b7-20020adfe647000000b0033763a9ea2dsm1955382wrn.63.2024.01.11.11.57.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 11:57:06 -0800 (PST) From: Bryan O'Donoghue Date: Thu, 11 Jan 2024 19:57:04 +0000 Subject: [PATCH 3/5] media: qcom: camss: Add sc8280xp resources Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-3-b92a650121ba@linaro.org> References: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> In-Reply-To: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> To: Hans Verkuil , Laurent Pinchart , Robert Foss , Todor Tomov , Bjorn Andersson , Konrad Dybcio , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.13-dev-4e032 This commit describes the hardware layout for the sc8280xp for the following hardware blocks: - 4 x VFE, 4 RDI per VFE - 4 x VFE Lite, 4 RDI per VFE - 4 x CSID - 4 x CSID Lite - 4 x CSI PHY Signed-off-by: Bryan O'Donoghue --- Depends on: Link: https://lore.kernel.org/linux-arm-msm/20240111-linux-next-24-01-02-sc= 8280xp-camss-core-dtsi-v4-2-cdd5c57ff1dc@linaro.org --- drivers/media/platform/qcom/camss/camss.c | 307 ++++++++++++++++++++++++++= ++++ 1 file changed, 307 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index 58f4be660290..916fe4a83aa9 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -941,6 +941,298 @@ static const struct resources_icc icc_res_sm8250[] = =3D { }, }; =20 +static const struct camss_subdev_resources csiphy_res_sc8280xp[] =3D { + /* CSIPHY0 */ + { + .regulators =3D {}, + .clock =3D { "csiphy0", "csiphy0_timer" }, + .clock_rate =3D { { 400000000 }, + { 300000000 } }, + .reg =3D { "csiphy0" }, + .interrupt =3D { "csiphy0" }, + .ops =3D &csiphy_ops_3ph_1_0 + }, + /* CSIPHY1 */ + { + .regulators =3D {}, + .clock =3D { "csiphy1", "csiphy1_timer" }, + .clock_rate =3D { { 400000000 }, + { 300000000 } }, + .reg =3D { "csiphy1" }, + .interrupt =3D { "csiphy1" }, + .ops =3D &csiphy_ops_3ph_1_0 + }, + /* CSIPHY2 */ + { + .regulators =3D {}, + .clock =3D { "csiphy2", "csiphy2_timer" }, + .clock_rate =3D { { 400000000 }, + { 300000000 } }, + .reg =3D { "csiphy2" }, + .interrupt =3D { "csiphy2" }, + .ops =3D &csiphy_ops_3ph_1_0 + }, + /* CSIPHY3 */ + { + .regulators =3D {}, + .clock =3D { "csiphy3", "csiphy3_timer" }, + .clock_rate =3D { { 400000000 }, + { 300000000 } }, + .reg =3D { "csiphy3" }, + .interrupt =3D { "csiphy3" }, + .ops =3D &csiphy_ops_3ph_1_0 + }, +}; + +static const struct camss_subdev_resources csid_res_sc8280xp[] =3D { + /* CSID0 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe0_csid", "vfe0_cphy_rx", "vfe0", "vfe0_axi" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "csid0" }, + .interrupt =3D { "csid0" }, + .ops =3D &csid_ops_gen2 + }, + /* CSID1 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe1_csid", "vfe1_cphy_rx", "vfe1", "vfe1_axi" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "csid1" }, + .interrupt =3D { "csid1" }, + .ops =3D &csid_ops_gen2 + }, + /* CSID2 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe2_csid", "vfe2_cphy_rx", "vfe2", "vfe2_axi" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "csid2" }, + .interrupt =3D { "csid2" }, + .ops =3D &csid_ops_gen2 + }, + /* CSID3 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe3_csid", "vfe3_cphy_rx", "vfe3", "vfe3_axi" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "csid3" }, + .interrupt =3D { "csid3" }, + .ops =3D &csid_ops_gen2 + }, + /* CSID_LITE0 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe_lite0_csid", "vfe_lite0_cphy_rx", "vfe_lite0" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, }, + .reg =3D { "csid0_lite" }, + .interrupt =3D { "csid0_lite" }, + .is_lite =3D true, + .ops =3D &csid_ops_gen2 + }, + /* CSID_LITE1 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe_lite1_csid", "vfe_lite1_cphy_rx", "vfe_lite1" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, }, + .reg =3D { "csid1_lite" }, + .interrupt =3D { "csid1_lite" }, + .is_lite =3D true, + .ops =3D &csid_ops_gen2 + }, + /* CSID_LITE2 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe_lite2_csid", "vfe_lite2_cphy_rx", "vfe_lite2" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, }, + .reg =3D { "csid2_lite" }, + .interrupt =3D { "csid2_lite" }, + .is_lite =3D true, + .ops =3D &csid_ops_gen2 + }, + /* CSID_LITE3 */ + { + .regulators =3D { "vdda-phy", "vdda-pll" }, + .clock =3D { "vfe_lite3_csid", "vfe_lite3_cphy_rx", "vfe_lite3" }, + .clock_rate =3D { { 400000000, 480000000, 600000000 }, + { 0 }, + { 0 }, }, + .reg =3D { "csid3_lite" }, + .interrupt =3D { "csid3_lite" }, + .is_lite =3D true, + .ops =3D &csid_ops_gen2 + } +}; + +static const struct camss_subdev_resources vfe_res_sc8280xp[] =3D { + /* IFE0 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe0= ", "vfe0_axi" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 400000000, 558000000, 637000000, 760000000 }, + { 0 }, }, + .reg =3D { "vfe0" }, + .interrupt =3D { "vfe0" }, + .pd_name =3D "ife0", + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, + /* IFE1 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe1= ", "vfe1_axi" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 400000000, 558000000, 637000000, 760000000 }, + { 0 }, }, + .reg =3D { "vfe1" }, + .interrupt =3D { "vfe1" }, + .pd_name =3D "ife1", + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, + /* IFE2 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe2= ", "vfe2_axi" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 400000000, 558000000, 637000000, 760000000 }, + { 0 }, }, + .reg =3D { "vfe2" }, + .interrupt =3D { "vfe2" }, + .pd_name =3D "ife2", + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, + /* VFE3 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe3= ", "vfe3_axi" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 400000000, 558000000, 637000000, 760000000 }, + { 0 }, }, + .reg =3D { "vfe3" }, + .interrupt =3D { "vfe3" }, + .pd_name =3D "ife3", + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, + /* IFE_LITE_0 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_= lite0" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 320000000, 400000000, 480000000, 600000000 }, }, + .reg =3D { "vfe_lite0" }, + .interrupt =3D { "vfe_lite0" }, + .is_lite =3D true, + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, + /* IFE_LITE_1 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_= lite1" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 320000000, 400000000, 480000000, 600000000 }, }, + .reg =3D { "vfe_lite1" }, + .interrupt =3D { "vfe_lite1" }, + .is_lite =3D true, + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, + /* IFE_LITE_2 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_= lite2" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 320000000, 400000000, 480000000, 600000000, }, }, + .reg =3D { "vfe_lite2" }, + .interrupt =3D { "vfe_lite2" }, + .is_lite =3D true, + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, + /* VFE_LITE_3 */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "gcc_axi_sf", "cpas_ahb", "camnoc_axi", "vfe_= lite3" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 19200000, 80000000}, + { 19200000, 150000000, 266666667, 320000000, 400000000, 480000000 }, + { 320000000, 400000000, 480000000, 600000000 }, }, + .reg =3D { "vfe_lite3" }, + .interrupt =3D { "vfe_lite3" }, + .is_lite =3D true, + .line_num =3D 4, + .ops =3D &vfe_ops_170 + }, +}; + +static const struct resources_icc icc_res_sc8280xp[] =3D { + { + .name =3D "cam_ahb", + .icc_bw_tbl.avg =3D 150000, + .icc_bw_tbl.peak =3D 300000, + }, + { + .name =3D "cam_hf_mnoc", + .icc_bw_tbl.avg =3D 2097152, + .icc_bw_tbl.peak =3D 2097152, + }, + { + .name =3D "cam_sf_mnoc", + .icc_bw_tbl.avg =3D 2097152, + .icc_bw_tbl.peak =3D 2097152, + }, + { + .name =3D "cam_sf_icp_mnoc", + .icc_bw_tbl.avg =3D 2097152, + .icc_bw_tbl.peak =3D 2097152, + }, +}; + /* * camss_add_clock_margin - Add margin to clock frequency rate * @rate: Clock frequency rate @@ -1826,12 +2118,27 @@ static const struct camss_resources sm8250_resource= s =3D { .vfe_num =3D ARRAY_SIZE(vfe_res_8250), }; =20 +static const struct camss_resources sc8280xp_resources =3D { + .version =3D CAMSS_8280XP, + .pd_name =3D "top", + .csiphy_res =3D csiphy_res_sc8280xp, + .csid_res =3D csid_res_sc8280xp, + .ispif_res =3D NULL, + .vfe_res =3D vfe_res_sc8280xp, + .icc_res =3D icc_res_sc8280xp, + .icc_path_num =3D ARRAY_SIZE(icc_res_sc8280xp), + .csiphy_num =3D ARRAY_SIZE(csiphy_res_sc8280xp), + .csid_num =3D ARRAY_SIZE(csid_res_sc8280xp), + .vfe_num =3D ARRAY_SIZE(vfe_res_sc8280xp), +}; + static const struct of_device_id camss_dt_match[] =3D { { .compatible =3D "qcom,msm8916-camss", .data =3D &msm8916_resources }, { .compatible =3D "qcom,msm8996-camss", .data =3D &msm8996_resources }, { .compatible =3D "qcom,sdm660-camss", .data =3D &sdm660_resources }, { .compatible =3D "qcom,sdm845-camss", .data =3D &sdm845_resources }, { .compatible =3D "qcom,sm8250-camss", .data =3D &sm8250_resources }, + { .compatible =3D "qcom,sc8280xp-camss", .data =3D &sc8280xp_resources }, { } }; =20 --=20 2.42.0 From nobody Thu Dec 25 19:57:21 2025 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AFBE56B9F for ; Thu, 11 Jan 2024 19:57:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="gpl7z/lD" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-40e629c5a42so6360765e9.0 for ; Thu, 11 Jan 2024 11:57:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705003027; x=1705607827; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=teCmGBj+ibwO9q2qm/uPhkHrsqBCoribiVZv4qydUkA=; b=gpl7z/lDBgDkvjWnVlys2e3fU2Um0KjeEL64+olny8f9D/Yl5MwSh3109mm7ph66DJ C05H4OYNW0G/ofWwjxG/Q5vNzdamfyb0A2mvNWYqmSDsDt/wPt0puxpqr3Jv+1tGZQhc d6kUseVaxFnCddEemCfTfMCWnF6PZoH8E6jzCPKHndpsKC4a30Hqt2Wdtdb5fHKFad57 S7gx16TgGeJc1N6QuwubmBoGjLui0upx3czz0x8JTJ+dmvIBamkX5xaJZ2AQ2ZOy2XSO X4YQt3Inqf8rPW4FNcYT52GIAQucF0/1kOAXZA+8Dm07dusMZECT09gTt1cNtc5l5XFv qyEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705003027; x=1705607827; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=teCmGBj+ibwO9q2qm/uPhkHrsqBCoribiVZv4qydUkA=; b=QrRcx0aC6iUx/IVgMvClt3RR/Q3eoM6Q6/3gtEQ8WSQMXu6UulLMl84adO/xY7cbMQ oRrqxuZM3rVOeXyk+oCdHMtajY5hsBMlBjBLX0iCltg6AoEB9ck9abkmFjK5KxX+9BFE 7xc1MiZ1vjcjdk4vp44iohkBED1kSCdCa6MtLJakByyam+iko22GA+suyRiJMDunTjeq rfHUpXiq8maFnV0njgDz1KroMcYm9iFq6JjcmIPZ1oRPVNqMWJwIJWVzJwtUtw279FC6 ICTYaNK4IVq6Uw5CJulWg8yP+SWzvQTXXfMNKgao0uhJ9m/61WSbfotRw+cQ7oP8PkKo /bkA== X-Gm-Message-State: AOJu0YyuVkLJRcunNy5z4HfqUjmr9diFI/EgDrD21LY9TfaOdphbX97M m6fOmlklYg5UGBWD+PkLtOMIPS+ukQFXKg== X-Google-Smtp-Source: AGHT+IGpaPIUklMWdPi/M6+hKY0NMn9iPJURgsMx5h+gVcCNl+Fr+05MZvx/UKh9bCP9BF8BHBNAZQ== X-Received: by 2002:a05:600c:458b:b0:40d:94df:dac4 with SMTP id r11-20020a05600c458b00b0040d94dfdac4mr169970wmo.153.1705003027605; Thu, 11 Jan 2024 11:57:07 -0800 (PST) Received: from [127.0.1.1] ([37.228.218.3]) by smtp.gmail.com with ESMTPSA id b7-20020adfe647000000b0033763a9ea2dsm1955382wrn.63.2024.01.11.11.57.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 11:57:07 -0800 (PST) From: Bryan O'Donoghue Date: Thu, 11 Jan 2024 19:57:05 +0000 Subject: [PATCH 4/5] media: qcom: camss: Add sc8280xp support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-4-b92a650121ba@linaro.org> References: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> In-Reply-To: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> To: Hans Verkuil , Laurent Pinchart , Robert Foss , Todor Tomov , Bjorn Andersson , Konrad Dybcio , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.13-dev-4e032 Add in functional logic throughout the code to support the sc8280xp. Acked-by: Konrad Dybcio Signed-off-by: Bryan O'Donoghue --- .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 23 +++++++++++++++++-= -- drivers/media/platform/qcom/camss/camss-csiphy.c | 1 + drivers/media/platform/qcom/camss/camss-vfe.c | 25 +++++++++++++++++-= ---- drivers/media/platform/qcom/camss/camss-video.c | 1 + 4 files changed, 42 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/dri= vers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index 66ff48aeab64..df7e93a5a4f6 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -513,6 +513,10 @@ static void csiphy_gen2_config_lanes(struct csiphy_dev= ice *csiphy, r =3D &lane_regs_sm8250[0][0]; array_size =3D ARRAY_SIZE(lane_regs_sm8250[0]); break; + case CAMSS_8280XP: + r =3D &lane_regs_sc8280xp[0][0]; + array_size =3D ARRAY_SIZE(lane_regs_sc8280xp[0]); + break; default: WARN(1, "unknown cspi version\n"); return; @@ -548,13 +552,26 @@ static u8 csiphy_get_lane_mask(struct csiphy_lanes_cf= g *lane_cfg) return lane_mask; } =20 +static bool csiphy_is_gen2(u32 version) +{ + bool ret =3D false; + + switch (version) { + case CAMSS_845: + case CAMSS_8250: + case CAMSS_8280XP: + ret =3D true; + break; + } + + return ret; +} + static void csiphy_lanes_enable(struct csiphy_device *csiphy, struct csiphy_config *cfg, s64 link_freq, u8 lane_mask) { struct csiphy_lanes_cfg *c =3D &cfg->csi2->lane_cfg; - bool is_gen2 =3D (csiphy->camss->res->version =3D=3D CAMSS_845 || - csiphy->camss->res->version =3D=3D CAMSS_8250); u8 settle_cnt; u8 val; int i; @@ -576,7 +593,7 @@ static void csiphy_lanes_enable(struct csiphy_device *c= siphy, val =3D 0x00; writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0)); =20 - if (is_gen2) + if (csiphy_is_gen2(csiphy->camss->res->version)) csiphy_gen2_config_lanes(csiphy, settle_cnt); else csiphy_gen1_config_lanes(csiphy, cfg, settle_cnt); diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/med= ia/platform/qcom/camss/camss-csiphy.c index 264c99efeae8..45b3a8e5dea4 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -578,6 +578,7 @@ int msm_csiphy_subdev_init(struct camss *camss, break; case CAMSS_845: case CAMSS_8250: + case CAMSS_8280XP: csiphy->formats =3D csiphy_formats_sdm845; csiphy->nformats =3D ARRAY_SIZE(csiphy_formats_sdm845); break; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/= platform/qcom/camss/camss-vfe.c index 2062be668f49..d875237cf244 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -225,6 +225,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 = sink_code, case CAMSS_660: case CAMSS_845: case CAMSS_8250: + case CAMSS_8280XP: switch (sink_code) { case MEDIA_BUS_FMT_YUYV8_1X16: { @@ -1518,6 +1519,7 @@ int msm_vfe_subdev_init(struct camss *camss, struct v= fe_device *vfe, break; case CAMSS_845: case CAMSS_8250: + case CAMSS_8280XP: l->formats =3D formats_rdi_845; l->nformats =3D ARRAY_SIZE(formats_rdi_845); break; @@ -1595,6 +1597,23 @@ static const struct media_entity_operations vfe_medi= a_ops =3D { .link_validate =3D v4l2_subdev_link_validate, }; =20 +static int vfe_bpl_align(struct vfe_device *vfe) +{ + int ret =3D 8; + + switch (vfe->camss->res->version) { + case CAMSS_845: + case CAMSS_8250: + case CAMSS_8280XP: + ret =3D 16; + break; + default: + break; + } + + return ret; +} + /* * msm_vfe_register_entities - Register subdev node for VFE module * @vfe: VFE device @@ -1661,11 +1680,7 @@ int msm_vfe_register_entities(struct vfe_device *vfe, } =20 video_out->ops =3D &vfe->video_ops; - if (vfe->camss->res->version =3D=3D CAMSS_845 || - vfe->camss->res->version =3D=3D CAMSS_8250) - video_out->bpl_alignment =3D 16; - else - video_out->bpl_alignment =3D 8; + video_out->bpl_alignment =3D vfe_bpl_align(vfe); video_out->line_based =3D 0; if (i =3D=3D VFE_LINE_PIX) { video_out->bpl_alignment =3D 16; diff --git a/drivers/media/platform/qcom/camss/camss-video.c b/drivers/medi= a/platform/qcom/camss/camss-video.c index a89da5ef4710..54cd82f74115 100644 --- a/drivers/media/platform/qcom/camss/camss-video.c +++ b/drivers/media/platform/qcom/camss/camss-video.c @@ -1028,6 +1028,7 @@ int msm_video_register(struct camss_video *video, str= uct v4l2_device *v4l2_dev, break; case CAMSS_845: case CAMSS_8250: + case CAMSS_8280XP: video->formats =3D formats_rdi_845; video->nformats =3D ARRAY_SIZE(formats_rdi_845); break; --=20 2.42.0 From nobody Thu Dec 25 19:57:21 2025 Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2566C5731C for ; Thu, 11 Jan 2024 19:57:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="f/wkqdio" Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-3376555b756so3345149f8f.0 for ; Thu, 11 Jan 2024 11:57:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705003028; x=1705607828; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vt4idOJ4AVt0o+9v3yIJItOs/gt0F0b2lVJhV4P/Taw=; b=f/wkqdiodNpRYVeKemyBnc3CgxRiGBYfiJ2i/To9OCgKk9MfUHwmsyzt4/RPTjVNml MoNOpBBRGXWEmVhw9zfzxFYi0i8k3NxJuAHZdMwv8DHexejCycwiD51I3VfokiaJU1vp zVzvBNGQLXZie/invwnrHFeW6FMzZG22DCC58PS0M8R2z3GUCaXD51fnavLRlAoj11UU TK9pRPTfRnoJXuh92q6z9SoAZZFp49B9NzhnHBIgrjGGBAlKG5UiFBMcT4cs/66QCCpY pK2dZlnvENkIEnufEQfpt/ZqoyxIXRxDBTVU6AAoBJU7UlAHrP651no5I4x4+8uvEWy2 Q/Tg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705003028; x=1705607828; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vt4idOJ4AVt0o+9v3yIJItOs/gt0F0b2lVJhV4P/Taw=; b=H7Chh9hdEXw5aPCRDNxeelueiSY3q51w5CAKZ3mEGJKUomikcWmD68nfCrUxKUHMdH tz65skGRqnEuy6lmSxMqkGj8RUPVsL1ypcWm+IlujClAH9woEoRO2dPvmaITVnJcKg4o Ug1wff9KTRgOP2Jne30tTr6N0kY6M6lvZ53ZaxVTrd3WrtKGkLL0nzH3pAdbmkh2JHCB vcYlKS3iTy6XT9L3pOPav+4AXoMvoKn4E0GTKJsgRmo+HnGDrVuQj/qHhXP5+fyxyFs8 1ao5Kp2WcNSnTrKEZ6I7qCKb36K+m3j8fZhpIopXFoGidLc1SsPDDskm8l3ryadzGf0i gNxA== X-Gm-Message-State: AOJu0YweUV/gl6eh3tZED+SVNrRQogwQl9p4CWjvCqGo33xSetV2Kidg y8Rrb8Bs91p/wnDnvVA8Yoo611ItB/Z3Iw== X-Google-Smtp-Source: AGHT+IE90qP2pgskdFf+tC+ZCbc+pS9HmA+agxQymv0g25TJ6DADTofWu1tMSPhKtAsxJEQylqul4w== X-Received: by 2002:a5d:4603:0:b0:336:7281:cc78 with SMTP id t3-20020a5d4603000000b003367281cc78mr218405wrq.50.1705003028504; Thu, 11 Jan 2024 11:57:08 -0800 (PST) Received: from [127.0.1.1] ([37.228.218.3]) by smtp.gmail.com with ESMTPSA id b7-20020adfe647000000b0033763a9ea2dsm1955382wrn.63.2024.01.11.11.57.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 11:57:08 -0800 (PST) From: Bryan O'Donoghue Date: Thu, 11 Jan 2024 19:57:06 +0000 Subject: [PATCH 5/5] media: qcom: camss: vfe-17x: Rename camss-vfe-170 to camss-vfe-17x Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-5-b92a650121ba@linaro.org> References: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> In-Reply-To: <20240111-linux-next-24-01-09-sc8280xp-camss-changes-v1-0-b92a650121ba@linaro.org> To: Hans Verkuil , Laurent Pinchart , Robert Foss , Todor Tomov , Bjorn Andersson , Konrad Dybcio , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.13-dev-4e032 vfe-170 and vfe-175 can be supported in the same file with some minimal indirection to differentiate between the silicon versions. sdm845 uses vfe-170, sc8280xp uses vfe-175-200. Lets rename the file to capture its wider scope than vfe-170 only. Acked-by: Konrad Dybcio Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/camss/Makefile | 2= +- drivers/media/platform/qcom/camss/{camss-vfe-170.c =3D> camss-vfe-17x.c} |= 0 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/pla= tform/qcom/camss/Makefile index 4e2222358973..0d4389ab312d 100644 --- a/drivers/media/platform/qcom/camss/Makefile +++ b/drivers/media/platform/qcom/camss/Makefile @@ -14,7 +14,7 @@ qcom-camss-objs +=3D \ camss-vfe-4-1.o \ camss-vfe-4-7.o \ camss-vfe-4-8.o \ - camss-vfe-170.o \ + camss-vfe-17x.o \ camss-vfe-480.o \ camss-vfe-gen1.o \ camss-vfe.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe-170.c b/drivers/me= dia/platform/qcom/camss/camss-vfe-17x.c similarity index 100% rename from drivers/media/platform/qcom/camss/camss-vfe-170.c rename to drivers/media/platform/qcom/camss/camss-vfe-17x.c --=20 2.42.0