From nobody Fri Dec 26 05:08:22 2025 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF58B405E3 for ; Wed, 10 Jan 2024 10:21:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="bKhdoES9" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-33674f60184so3942624f8f.1 for ; Wed, 10 Jan 2024 02:21:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1704882072; x=1705486872; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LfuH3wSlm6aDB+5MQe7gxyw0I5hRCPtFyKG+AY6rcK0=; b=bKhdoES9+F2y3TxMRg2fmdjlR7vKrmFmAItlg/a5/LR9I/kNGMpXkkV2YL/qiNW2V1 XfgWab3hof4XzpG+ujafoNtB7pOnxcwl4Z+xqjkFerEH891zhOugxKfLjdpovol4As6F 7w2TrTNkTnE4ls35kdgm1XRekzRQpdds08nIPXH3aX9TMkLh4pC2FIK2PTqKbzHjnWFt CrDGykSrRl/Pqgf1lXcBdZh+3QxOu7iOSDLSFqAsVtIbiHbIdfuk4pOLoQ7r2G4nC6Q9 t+Resins4erU5SW3ewqG9/o6NEPi0mkjANZKlc4xfhXnMEQsr2Yb9RrzHYVEWk1ZO/+e E+gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704882072; x=1705486872; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LfuH3wSlm6aDB+5MQe7gxyw0I5hRCPtFyKG+AY6rcK0=; b=biaK8Z5uspLAx6jgiqoogCaRiKdtYILrDl4ymQNY2IVCvsz6TK8DFFn8G/AEgDf3LL C0XdRyPCbpS45juX60fAzovQeuxP45OQ9s3YmcmdHalWRm6Gbwcn+FW+K9DqJ+FSbJZL lXlNFET9ucr3u1wBD7KKyitNrUb/JFLifJLLonz1YaGR63DXr+9WwMNefyc+mKzmRAZX //j62MUfzRgfqSadTObuglpI/K0+dRUmz99LcFauOAUNkdIauEl2AvYDXZLAPZtty6Lg sfV5JxqVsHRkLFVis9RNfPzzeBDcFKKTk3giBd3Jl+tQuYU2EubwIqw9VR1mOUT6LEwv 6vjQ== X-Gm-Message-State: AOJu0YxtvGVGTaWHT/wCFFc5BvT5MJHAlietZ3z/CUlQKT0IqIjWzyAy PkZJSVhSBQBAcsz4KGgFYxIrkHmJ/yWLqdgsMvwm2xL62/2b/w== X-Google-Smtp-Source: AGHT+IHxCH+x8Bd49h96aENkSSiu3NcMtRR69yY6qu1FUYAozJ3aiG1NexaAB58eotSyJt97Xv++1Q== X-Received: by 2002:a05:600c:5390:b0:40e:3f37:d893 with SMTP id hg16-20020a05600c539000b0040e3f37d893mr457342wmb.17.1704882072241; Wed, 10 Jan 2024 02:21:12 -0800 (PST) Received: from ta2.c.googlers.com.com (88.140.78.34.bc.googleusercontent.com. [34.78.140.88]) by smtp.gmail.com with ESMTPSA id j7-20020a05600c190700b0040e52cac976sm1625302wmq.29.2024.01.10.02.21.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 02:21:11 -0800 (PST) From: Tudor Ambarus To: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, gregkh@linuxfoundation.org, jirislaby@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, Tudor Ambarus Subject: [PATCH 06/18] tty: serial: samsung: use u32 for register interactions Date: Wed, 10 Jan 2024 10:20:50 +0000 Message-ID: <20240110102102.61587-7-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240110102102.61587-1-tudor.ambarus@linaro.org> References: <20240110102102.61587-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" All registers of the IP have 32 bits. Use u32 variables when reading or writing from/to the registers. The purpose of those variables becomes clearer. Signed-off-by: Tudor Ambarus Reviewed-by: Sam Protsenko --- drivers/tty/serial/samsung_tty.c | 79 ++++++++++++++++---------------- 1 file changed, 39 insertions(+), 40 deletions(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_= tty.c index b8b71a0109ea..d5f9bec24b8e 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -199,7 +199,7 @@ static void wr_reg(const struct uart_port *port, u32 re= g, u32 val) /* Byte-order aware bit setting/clearing functions. */ =20 static inline void s3c24xx_set_bit(const struct uart_port *port, int idx, - unsigned int reg) + u32 reg) { unsigned long flags; u32 val; @@ -212,7 +212,7 @@ static inline void s3c24xx_set_bit(const struct uart_po= rt *port, int idx, } =20 static inline void s3c24xx_clear_bit(const struct uart_port *port, int idx, - unsigned int reg) + u32 reg) { unsigned long flags; u32 val; @@ -245,8 +245,8 @@ static void s3c24xx_serial_rx_enable(struct uart_port *= port) { struct s3c24xx_uart_port *ourport =3D to_ourport(port); unsigned long flags; - unsigned int ucon, ufcon; int count =3D 10000; + u32 ucon, ufcon; =20 uart_port_lock_irqsave(port, &flags); =20 @@ -269,7 +269,7 @@ static void s3c24xx_serial_rx_disable(struct uart_port = *port) { struct s3c24xx_uart_port *ourport =3D to_ourport(port); unsigned long flags; - unsigned int ucon; + u32 ucon; =20 uart_port_lock_irqsave(port, &flags); =20 @@ -591,7 +591,7 @@ static inline const struct s3c2410_uartcfg } =20 static int s3c24xx_serial_rx_fifocnt(const struct s3c24xx_uart_port *ourpo= rt, - unsigned long ufstat) + u32 ufstat) { const struct s3c24xx_uart_info *info =3D ourport->info; =20 @@ -663,7 +663,7 @@ static void s3c64xx_start_rx_dma(struct s3c24xx_uart_po= rt *ourport) static void enable_rx_dma(struct s3c24xx_uart_port *ourport) { struct uart_port *port =3D &ourport->port; - unsigned int ucon; + u32 ucon; =20 /* set Rx mode to DMA mode */ ucon =3D rd_regl(port, S3C2410_UCON); @@ -686,7 +686,7 @@ static void enable_rx_dma(struct s3c24xx_uart_port *our= port) static void enable_rx_pio(struct s3c24xx_uart_port *ourport) { struct uart_port *port =3D &ourport->port; - unsigned int ucon; + u32 ucon; =20 /* set Rx mode to DMA mode */ ucon =3D rd_regl(port, S3C2410_UCON); @@ -711,13 +711,14 @@ static void s3c24xx_serial_rx_drain_fifo(struct s3c24= xx_uart_port *ourport); =20 static irqreturn_t s3c24xx_serial_rx_chars_dma(void *dev_id) { - unsigned int utrstat, received; struct s3c24xx_uart_port *ourport =3D dev_id; struct uart_port *port =3D &ourport->port; struct s3c24xx_uart_dma *dma =3D ourport->dma; struct tty_struct *tty =3D tty_port_tty_get(&ourport->port.state->port); struct tty_port *t =3D &port->state->port; struct dma_tx_state state; + unsigned int received; + u32 utrstat; =20 utrstat =3D rd_regl(port, S3C2410_UTRSTAT); rd_regl(port, S3C2410_UFSTAT); @@ -759,9 +760,9 @@ static irqreturn_t s3c24xx_serial_rx_chars_dma(void *de= v_id) static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) { struct uart_port *port =3D &ourport->port; - unsigned int ufcon, ufstat, uerstat; unsigned int fifocnt =3D 0; int max_count =3D port->fifosize; + u32 ufcon, ufstat, uerstat; u8 ch, flag; =20 while (max_count-- > 0) { @@ -945,7 +946,7 @@ static irqreturn_t s3c64xx_serial_handle_irq(int irq, v= oid *id) { const struct s3c24xx_uart_port *ourport =3D id; const struct uart_port *port =3D &ourport->port; - unsigned int pend =3D rd_regl(port, S3C64XX_UINTP); + u32 pend =3D rd_regl(port, S3C64XX_UINTP); irqreturn_t ret =3D IRQ_HANDLED; =20 if (pend & S3C64XX_UINTM_RXD_MSK) { @@ -964,7 +965,7 @@ static irqreturn_t apple_serial_handle_irq(int irq, voi= d *id) { const struct s3c24xx_uart_port *ourport =3D id; const struct uart_port *port =3D &ourport->port; - unsigned int pend =3D rd_regl(port, S3C2410_UTRSTAT); + u32 pend =3D rd_regl(port, S3C2410_UTRSTAT); irqreturn_t ret =3D IRQ_NONE; =20 if (pend & (APPLE_S5L_UTRSTAT_RXTHRESH | APPLE_S5L_UTRSTAT_RXTO)) { @@ -983,8 +984,8 @@ static irqreturn_t apple_serial_handle_irq(int irq, voi= d *id) static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) { const struct s3c24xx_uart_info *info =3D s3c24xx_port_to_info(port); - unsigned long ufstat =3D rd_regl(port, S3C2410_UFSTAT); - unsigned long ufcon =3D rd_regl(port, S3C2410_UFCON); + u32 ufstat =3D rd_regl(port, S3C2410_UFSTAT); + u32 ufcon =3D rd_regl(port, S3C2410_UFCON); =20 if (ufcon & S3C2410_UFCON_FIFOMODE) { if ((ufstat & info->tx_fifomask) !=3D 0 || @@ -1000,7 +1001,7 @@ static unsigned int s3c24xx_serial_tx_empty(struct ua= rt_port *port) /* no modem control lines */ static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) { - unsigned int umstat =3D rd_reg(port, S3C2410_UMSTAT); + u32 umstat =3D rd_reg(port, S3C2410_UMSTAT); =20 if (umstat & S3C2410_UMSTAT_CTS) return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ -1010,8 +1011,8 @@ static unsigned int s3c24xx_serial_get_mctrl(struct u= art_port *port) =20 static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int = mctrl) { - unsigned int umcon =3D rd_regl(port, S3C2410_UMCON); - unsigned int ucon =3D rd_regl(port, S3C2410_UCON); + u32 umcon =3D rd_regl(port, S3C2410_UMCON); + u32 ucon =3D rd_regl(port, S3C2410_UCON); =20 if (mctrl & TIOCM_RTS) umcon |=3D S3C2410_UMCOM_RTS_LOW; @@ -1031,7 +1032,7 @@ static void s3c24xx_serial_set_mctrl(struct uart_port= *port, unsigned int mctrl) static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_sta= te) { unsigned long flags; - unsigned int ucon; + u32 ucon; =20 uart_port_lock_irqsave(port, &flags); =20 @@ -1189,7 +1190,7 @@ static void apple_s5l_serial_shutdown(struct uart_por= t *port) { struct s3c24xx_uart_port *ourport =3D to_ourport(port); =20 - unsigned int ucon; + u32 ucon; =20 ucon =3D rd_regl(port, S3C2410_UCON); ucon &=3D ~(APPLE_S5L_UCON_TXTHRESH_ENA_MSK | @@ -1215,7 +1216,7 @@ static int s3c64xx_serial_startup(struct uart_port *p= ort) { struct s3c24xx_uart_port *ourport =3D to_ourport(port); unsigned long flags; - unsigned int ufcon; + u32 ufcon; int ret; =20 wr_regl(port, S3C64XX_UINTM, 0xf); @@ -1260,7 +1261,7 @@ static int apple_s5l_serial_startup(struct uart_port = *port) { struct s3c24xx_uart_port *ourport =3D to_ourport(port); unsigned long flags; - unsigned int ufcon; + u32 ufcon; int ret; =20 wr_regl(port, S3C2410_UTRSTAT, APPLE_S5L_UTRSTAT_ALL_FLAGS); @@ -1345,7 +1346,7 @@ static void s3c24xx_serial_pm(struct uart_port *port,= unsigned int level, static inline int s3c24xx_serial_getsource(struct uart_port *port) { const struct s3c24xx_uart_info *info =3D s3c24xx_port_to_info(port); - unsigned int ucon; + u32 ucon; =20 if (info->num_clks =3D=3D 1) return 0; @@ -1359,7 +1360,7 @@ static void s3c24xx_serial_setsource(struct uart_port= *port, unsigned int clk_sel) { const struct s3c24xx_uart_info *info =3D s3c24xx_port_to_info(port); - unsigned int ucon; + u32 ucon; =20 if (info->num_clks =3D=3D 1) return; @@ -1476,9 +1477,8 @@ static void s3c24xx_serial_set_termios(struct uart_po= rt *port, struct clk *clk =3D ERR_PTR(-EINVAL); unsigned long flags; unsigned int baud, quot, clk_sel =3D 0; - unsigned int ulcon; - unsigned int umcon; unsigned int udivslot =3D 0; + u32 ulcon, umcon; =20 /* * We don't support modem control lines. @@ -1760,7 +1760,7 @@ static void s3c24xx_serial_resetport(struct uart_port= *port, const struct s3c2410_uartcfg *cfg) { const struct s3c24xx_uart_info *info =3D s3c24xx_port_to_info(port); - unsigned long ucon =3D rd_regl(port, S3C2410_UCON); + u32 ucon =3D rd_regl(port, S3C2410_UCON); =20 ucon &=3D (info->clksel_mask | info->ucon_mask); wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); @@ -1906,7 +1906,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_ua= rt_port *ourport, wr_regl(port, S3C64XX_UINTSP, 0xf); break; case TYPE_APPLE_S5L: { - unsigned int ucon; + u32 ucon; =20 ucon =3D rd_regl(port, S3C2410_UCON); ucon &=3D ~(APPLE_S5L_UCON_TXTHRESH_ENA_MSK | @@ -2110,7 +2110,7 @@ static int s3c24xx_serial_resume_noirq(struct device = *dev) /* restore IRQ mask */ switch (ourport->info->type) { case TYPE_S3C6400: { - unsigned int uintm =3D 0xf; + u32 uintm =3D 0xf; =20 if (ourport->tx_enabled) uintm &=3D ~S3C64XX_UINTM_TXD_MSK; @@ -2126,7 +2126,7 @@ static int s3c24xx_serial_resume_noirq(struct device = *dev) break; } case TYPE_APPLE_S5L: { - unsigned int ucon; + u32 ucon; int ret; =20 ret =3D clk_prepare_enable(ourport->clk); @@ -2188,10 +2188,10 @@ static const struct dev_pm_ops s3c24xx_serial_pm_op= s =3D { static struct uart_port *cons_uart; =20 static int -s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon) +s3c24xx_serial_console_txrdy(struct uart_port *port, u32 ufcon) { const struct s3c24xx_uart_info *info =3D s3c24xx_port_to_info(port); - unsigned long ufstat, utrstat; + u32 ufstat, utrstat; =20 if (ufcon & S3C2410_UFCON_FIFOMODE) { /* fifo mode - check amount of data in fifo registers... */ @@ -2207,7 +2207,7 @@ s3c24xx_serial_console_txrdy(struct uart_port *port, = unsigned int ufcon) } =20 static bool -s3c24xx_port_configured(unsigned int ucon) +s3c24xx_port_configured(u32 ucon) { /* consider the serial port configured if the tx/rx mode set */ return (ucon & 0xf) !=3D 0; @@ -2222,7 +2222,7 @@ s3c24xx_port_configured(unsigned int ucon) static int s3c24xx_serial_get_poll_char(struct uart_port *port) { const struct s3c24xx_uart_port *ourport =3D to_ourport(port); - unsigned int ufstat; + u32 ufstat; =20 ufstat =3D rd_regl(port, S3C2410_UFSTAT); if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) =3D=3D 0) @@ -2234,8 +2234,8 @@ static int s3c24xx_serial_get_poll_char(struct uart_p= ort *port) static void s3c24xx_serial_put_poll_char(struct uart_port *port, unsigned char c) { - unsigned int ufcon =3D rd_regl(port, S3C2410_UFCON); - unsigned int ucon =3D rd_regl(port, S3C2410_UCON); + u32 ufcon =3D rd_regl(port, S3C2410_UFCON); + u32 ucon =3D rd_regl(port, S3C2410_UCON); =20 /* not possible to xmit on unconfigured port */ if (!s3c24xx_port_configured(ucon)) @@ -2251,7 +2251,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_= port *port, static void s3c24xx_serial_console_putchar(struct uart_port *port, unsigned char ch) { - unsigned int ufcon =3D rd_regl(port, S3C2410_UFCON); + u32 ufcon =3D rd_regl(port, S3C2410_UFCON); =20 while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); @@ -2262,7 +2262,7 @@ static void s3c24xx_serial_console_write(struct console *co, const char *s, unsigned int count) { - unsigned int ucon =3D rd_regl(cons_uart, S3C2410_UCON); + u32 ucon =3D rd_regl(cons_uart, S3C2410_UCON); unsigned long flags; bool locked =3D true; =20 @@ -2289,11 +2289,9 @@ s3c24xx_serial_get_options(struct uart_port *port, i= nt *baud, int *parity, int *bits) { struct clk *clk; - unsigned int ulcon; - unsigned int ucon; - unsigned int ubrdiv; unsigned long rate; unsigned int clk_sel; + u32 ulcon, ucon, ubrdiv; char clk_name[MAX_CLK_NAME_LENGTH]; =20 ulcon =3D rd_regl(port, S3C2410_ULCON); @@ -2743,7 +2741,8 @@ static int samsung_early_read(struct console *con, ch= ar *s, unsigned int n) { struct earlycon_device *dev =3D con->data; const struct samsung_early_console_data *data =3D dev->port.private_data; - int ch, ufstat, num_read =3D 0; + int num_read =3D 0; + u32 ch, ufstat; =20 while (num_read < n) { ufstat =3D rd_regl(&dev->port, S3C2410_UFSTAT); --=20 2.43.0.472.g3155946c3a-goog