From nobody Fri Dec 19 00:19:51 2025 Received: from mail-yb1-f202.google.com (mail-yb1-f202.google.com [209.85.219.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB4E84C60E for ; Tue, 9 Jan 2024 23:03:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="Uwo36VEA" Received: by mail-yb1-f202.google.com with SMTP id 3f1490d57ef6-daee86e2d70so3245998276.0 for ; Tue, 09 Jan 2024 15:03:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1704841425; x=1705446225; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=F9sZDwb5omzJm3x59fBf4fSiaUaW+1zj+LLJbTuyNqE=; b=Uwo36VEAfdbe3DNbKMZharOhWm9NSeUMnh0og3LlvGKhsw43ixZ/K/fdk5pznERtH4 9k/8AhQoj2OqL/pz1SuU8cS6C6T7c/SJGazYTSA/+TpPDk8xZp+fw28eN99B3iHpR5mO J2UnQ2JW6niGhgCBtJF/uexweqpwM6G7tAUE0BuUadvv3vSTWbO1YdF10bN/cNdTz5GW E6PtH/pfEkh84HPL2sxtTJr/URmauxS5cWd2/EUk1fmF8Ip33dOrwHX59PQDGM+ODyFD saRYm+y+XqoQ6mw7fRdYzYSF9cpYmTkjfBO4ZSOgjLSax2VQ9g6nUuqJ3BBKa0VweQAK uhDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704841425; x=1705446225; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=F9sZDwb5omzJm3x59fBf4fSiaUaW+1zj+LLJbTuyNqE=; b=uxPU38ONNaybBlGOrHBoWevruXe7KoiK4B3amKm12+kT07aMH24DDHml6jv4c1znke 571HGmkB1C1AvjS95VTHrToAjfXjFbsX1Kwc69oPNUAF9qYcalpt/Gx3aZDZ+niZY+UW mcCT6qepWF/P2PIuQX+wLmxjvL3a8RJxiZwFUuAkU+vW4J2va9aa8J6P170KSWPCEAWA /vI77V6UCYekGtQYSro51W6ArTlmY6Hgo/bOHW2vQIPYo6evnoluY6HpvFIgerAdGSXP tFXT2jdsw6CS/fFOt9VSl/HDDRderf215i0zzC1ntEKxF4UybAOWCnLbiq6LnaKHb9sc MHug== X-Gm-Message-State: AOJu0Yy/boIV7dY8FjyNcV1fXmlyQ+x/Zu1ItJv8MYB5HG+nPh2Aq/JX OrDdtk6YnTMYzwSXXgz1tlVkQqz1DnA6QqPaEQ== X-Google-Smtp-Source: AGHT+IFAVqqEDuuqgAycgeZxB6g/QSy4QBiwEufkpqTQx5V9nB2UtnwbLmvQU/uNlybiGL9ErNbi3XpVIr0= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:bb46:0:b0:dbe:ee69:bf1a with SMTP id b6-20020a25bb46000000b00dbeee69bf1amr5312ybk.7.1704841424802; Tue, 09 Jan 2024 15:03:44 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 9 Jan 2024 15:02:46 -0800 In-Reply-To: <20240109230250.424295-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240109230250.424295-1-seanjc@google.com> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog Message-ID: <20240109230250.424295-27-seanjc@google.com> Subject: [PATCH v10 26/29] KVM: selftests: Test PMC virtualization with forced emulation From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend the PMC counters test to use forced emulation to verify that KVM emulates counter events for instructions retired and branches retired. Force emulation for only a subset of the measured code to test that KVM does the right thing when mixing perf events with emulated events. Reviewed-by: Dapeng Mi Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 44 +++++++++++++------ 1 file changed, 30 insertions(+), 14 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools= /testing/selftests/kvm/x86_64/pmu_counters_test.c index 9e9dc4084c0d..cb808ac827ba 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -21,6 +21,7 @@ =20 static uint8_t kvm_pmu_version; static bool kvm_has_perf_caps; +static bool is_forced_emulation_enabled; =20 static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, void *guest_code, @@ -34,6 +35,7 @@ static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct = kvm_vcpu **vcpu, vcpu_init_descriptor_tables(*vcpu); =20 sync_global_to_guest(vm, kvm_pmu_version); + sync_global_to_guest(vm, is_forced_emulation_enabled); =20 /* * Set PERF_CAPABILITIES before PMU version as KVM disallows enabling @@ -138,37 +140,50 @@ static void guest_assert_event_count(uint8_t idx, * If CLFUSH{,OPT} is supported, flush the cacheline containing (at least)= the * start of the loop to force LLC references and misses, i.e. to allow tes= ting * that those events actually count. + * + * If forced emulation is enabled (and specified), force emulation on a su= bset + * of the measured code to verify that KVM correctly emulates instructions= and + * branches retired events in conjunction with hardware also counting said + * events. */ -#define GUEST_MEASURE_EVENT(_msr, _value, clflush) \ +#define GUEST_MEASURE_EVENT(_msr, _value, clflush, FEP) \ do { \ __asm__ __volatile__("wrmsr\n\t" \ clflush "\n\t" \ "mfence\n\t" \ "1: mov $" __stringify(NUM_BRANCHES) ", %%ecx\n\t" \ - "loop .\n\t" \ - "mov %%edi, %%ecx\n\t" \ - "xor %%eax, %%eax\n\t" \ - "xor %%edx, %%edx\n\t" \ + FEP "loop .\n\t" \ + FEP "mov %%edi, %%ecx\n\t" \ + FEP "xor %%eax, %%eax\n\t" \ + FEP "xor %%edx, %%edx\n\t" \ "wrmsr\n\t" \ :: "a"((uint32_t)_value), "d"(_value >> 32), \ "c"(_msr), "D"(_msr) \ ); \ } while (0) =20 +#define GUEST_TEST_EVENT(_idx, _event, _pmc, _pmc_msr, _ctrl_msr, _value, = FEP) \ +do { \ + wrmsr(pmc_msr, 0); \ + \ + if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "clflushopt 1f", FEP); \ + else if (this_cpu_has(X86_FEATURE_CLFLUSH)) \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "clflush 1f", FEP); \ + else \ + GUEST_MEASURE_EVENT(_ctrl_msr, _value, "nop", FEP); \ + \ + guest_assert_event_count(_idx, _event, _pmc, _pmc_msr); \ +} while (0) + static void __guest_test_arch_event(uint8_t idx, struct kvm_x86_pmu_featur= e event, uint32_t pmc, uint32_t pmc_msr, uint32_t ctrl_msr, uint64_t ctrl_msr_value) { - wrmsr(pmc_msr, 0); + GUEST_TEST_EVENT(idx, event, pmc, pmc_msr, ctrl_msr, ctrl_msr_value, ""); =20 - if (this_cpu_has(X86_FEATURE_CLFLUSHOPT)) - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflushopt 1f"); - else if (this_cpu_has(X86_FEATURE_CLFLUSH)) - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "clflush 1f"); - else - GUEST_MEASURE_EVENT(ctrl_msr, ctrl_msr_value, "nop"); - - guest_assert_event_count(idx, event, pmc, pmc_msr); + if (is_forced_emulation_enabled) + GUEST_TEST_EVENT(idx, event, pmc, pmc_msr, ctrl_msr, ctrl_msr_value, KVM= _FEP); } =20 #define X86_PMU_FEATURE_NULL \ @@ -553,6 +568,7 @@ int main(int argc, char *argv[]) =20 kvm_pmu_version =3D kvm_cpu_property(X86_PROPERTY_PMU_VERSION); kvm_has_perf_caps =3D kvm_cpu_has(X86_FEATURE_PDCM); + is_forced_emulation_enabled =3D kvm_is_forced_emulation_enabled(); =20 test_intel_counters(); =20 --=20 2.43.0.472.g3155946c3a-goog