From nobody Fri Dec 26 15:30:49 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 21A51286A6 for ; Thu, 4 Jan 2024 16:29:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AA4731007; Thu, 4 Jan 2024 08:29:47 -0800 (PST) Received: from e127643.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F40FC3F5A1; Thu, 4 Jan 2024 08:28:54 -0800 (PST) From: James Clark To: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, broonie@kernel.org, maz@kernel.org, suzuki.poulose@arm.com, acme@kernel.org Cc: James Clark , Oliver Upton , James Morse , Zenghui Yu , Catalin Marinas , Will Deacon , Mike Leach , Leo Yan , Alexander Shishkin , Anshuman Khandual , Rob Herring , Miguel Luis , Jintack Lim , Ard Biesheuvel , Mark Rutland , Helge Deller , Arnd Bergmann , Kalesh Singh , Quentin Perret , Vincent Donnefort , Fuad Tabba , Akihiko Odaki , Joey Gouly , Jing Zhang , linux-kernel@vger.kernel.org Subject: [PATCH v4 6/7] arm64: KVM: Write TRFCR value on guest switch with nVHE Date: Thu, 4 Jan 2024 16:27:06 +0000 Message-Id: <20240104162714.1062610-7-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240104162714.1062610-1-james.clark@arm.com> References: <20240104162714.1062610-1-james.clark@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The guest value for TRFCR requested by the Coresight driver is saved in kvm_host_global_state. On guest switch this value needs to be written to the register. Currently TRFCR is only modified when we want to disable trace completely in guests due to an issue with TRBE. Expand the __debug_save_trace() function to always write to the register if a different value for guests is required, but also keep the existing TRBE disable behavior if that's required. The TRFCR restore function remains functionally the same, except a value of 0 doesn't mean "don't restore" anymore. Now that we save both guest and host values the register is restored any time the guest and host values differ. Signed-off-by: James Clark Reviewed-by: Suzuki K Poulose --- arch/arm64/kvm/hyp/nvhe/debug-sr.c | 55 ++++++++++++++++++------------ 1 file changed, 34 insertions(+), 21 deletions(-) diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/d= ebug-sr.c index 4558c02eb352..7fd876d4f034 100644 --- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c +++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c @@ -51,32 +51,45 @@ static void __debug_restore_spe(u64 pmscr_el1) write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1); } =20 -static void __debug_save_trace(u64 *trfcr_el1) +/* + * Save TRFCR and disable trace completely if TRBE is being used, otherwise + * apply required guest TRFCR value. + */ +static void __debug_save_trace(struct kvm_vcpu *vcpu) { - *trfcr_el1 =3D 0; + u64 host_trfcr_el1 =3D read_sysreg_s(SYS_TRFCR_EL1); + u64 guest_trfcr_el1; + + vcpu->arch.host_debug_state.trfcr_el1 =3D host_trfcr_el1; =20 /* Check if the TRBE is enabled */ - if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E)) - return; - /* - * Prohibit trace generation while we are in guest. - * Since access to TRFCR_EL1 is trapped, the guest can't - * modify the filtering set by the host. - */ - *trfcr_el1 =3D read_sysreg_s(SYS_TRFCR_EL1); - write_sysreg_s(0, SYS_TRFCR_EL1); - isb(); - /* Drain the trace buffer to memory */ - tsb_csync(); + if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE) && + (read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E)) { + /* + * Prohibit trace generation while we are in guest. Since access + * to TRFCR_EL1 is trapped, the guest can't modify the filtering + * set by the host. + */ + write_sysreg_s(0, SYS_TRFCR_EL1); + isb(); + /* Drain the trace buffer to memory */ + tsb_csync(); + } else { + /* + * Not using TRBE, so guest trace works. Apply the guest filters + * provided by the Coresight driver, if different. + */ + guest_trfcr_el1 =3D kvm_host_global_state[vcpu->cpu].guest_trfcr_el1; + if (host_trfcr_el1 !=3D guest_trfcr_el1) + write_sysreg_s(guest_trfcr_el1, SYS_TRFCR_EL1); + } } =20 static void __debug_restore_trace(u64 trfcr_el1) { - if (!trfcr_el1) - return; - /* Restore trace filter controls */ - write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1); + if (trfcr_el1 !=3D read_sysreg_s(SYS_TRFCR_EL1)) + write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1); } =20 void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu) @@ -85,8 +98,8 @@ void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu) if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE)) __debug_save_spe(&vcpu->arch.host_debug_state.pmscr_el1); /* Disable and flush Self-Hosted Trace generation */ - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE)) - __debug_save_trace(&vcpu->arch.host_debug_state.trfcr_el1); + if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR)) + __debug_save_trace(vcpu); } =20 void __debug_switch_to_guest(struct kvm_vcpu *vcpu) @@ -98,7 +111,7 @@ void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *= vcpu) { if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE)) __debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1); - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE)) + if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR)) __debug_restore_trace(vcpu->arch.host_debug_state.trfcr_el1); } =20 --=20 2.34.1