From nobody Fri Dec 26 17:48:19 2025 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15B5A1BDE3 for ; Wed, 3 Jan 2024 16:01:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Wtcz3uzK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1704297661; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eW7Hp92xFvn0uEDHFJ5uhGV0bhy55HqDGviT7ReovF8=; b=Wtcz3uzKC/er7NCw58ksu7KphGGzvZED37jbkredXQ6qvVQWXnyKeOUmz3091NXvbjkU8h w9MapZvl2Tpls6SwqaFuuNtx6xrSA5ZpzlIc0LqoF/y0uzlAIAdUxflNpSPDkzhNE5lPy4 3Mq+g9ptqnlbJfE1OvoKeJSnxhk4zFc= Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-481-WSNqCLb3O76-U4SFVt0yXQ-1; Wed, 03 Jan 2024 11:00:57 -0500 X-MC-Unique: WSNqCLb3O76-U4SFVt0yXQ-1 Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-28bcf7f605aso485125a91.0 for ; Wed, 03 Jan 2024 08:00:57 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704297656; x=1704902456; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eW7Hp92xFvn0uEDHFJ5uhGV0bhy55HqDGviT7ReovF8=; b=Z3Fj9dEFsCmrz7e0hX3ssf9VlfYilJwGydpl1uH7MAMtGV4c8YlZrgpvTfBERMlGzs j7KEqNi05kNME7ISvWaQ0O+Ha9SZSl8P4LiwnvfI48NNAvf0TevOWRZ+EHL1ROzMroVC Bj5G6qrVAlNQWkpkCDhAcQ5JGdEHdYVDu5uPyAUQ3xH9aRjcgGuzdycpSPrqtZBB88zg YysE1dXFdxJUDl+JpD56ehPi47lqabMG4/doyRxU7eYf9U2hsqGpaGqqnrRs4D98fCJB FZO9LHw1S2SUb4ZltsE6cCRRHxr3+MYqYhWmr9WEba+iQyz+iYTHMItQhcr7s8GKtz2/ tsHQ== X-Gm-Message-State: AOJu0YwECQsJhgbzFPf9KJKj2aMfwAlCuALP6lPx8A4Oj7D5+v4vb8GX nKiZpHY81KGcxpq1vwYscUXdWXmp0toRljnak8NAY1jvGjdrXkrwiGiPq/N/lqCsfxBtb63CN4n YWiJXeIg3hEnrTxdqRXeNc7YbhQ9ru7nh X-Received: by 2002:a17:90a:c245:b0:28c:eeef:aaca with SMTP id d5-20020a17090ac24500b0028ceeefaacamr705453pjx.4.1704297656088; Wed, 03 Jan 2024 08:00:56 -0800 (PST) X-Google-Smtp-Source: AGHT+IH1Qw9aIClua9ds5Nw8/POsd9KwpDhXoK1ctp78/8BijwUvH1rwsQL+Vt2C/sTQWWAMNvcTuQ== X-Received: by 2002:a17:90a:c245:b0:28c:eeef:aaca with SMTP id d5-20020a17090ac24500b0028ceeefaacamr705420pjx.4.1704297655711; Wed, 03 Jan 2024 08:00:55 -0800 (PST) Received: from localhost.localdomain ([2804:431:c7ec:911:6911:ca60:846:eb46]) by smtp.gmail.com with ESMTPSA id qc8-20020a17090b288800b0028b1fce7c01sm1922253pjb.37.2024.01.03.08.00.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 08:00:55 -0800 (PST) From: Leonardo Bras To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Oleg Nesterov , Leonardo Bras , Guo Ren , Andy Chiu , Conor Dooley , Xiao Wang , Vincent Chen , Charlie Jenkins , Greg Ungerer , Andrew Morton , Kemeng Shi , Alexandre Ghiti , David Hildenbrand , "Matthew Wilcox (Oracle)" , Qinglin Pan , Greentime Hu , Baoquan He , =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH v1 1/5] riscv: Improve arch_get_mmap_end() macro Date: Wed, 3 Jan 2024 13:00:19 -0300 Message-ID: <20240103160024.70305-3-leobras@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240103160024.70305-2-leobras@redhat.com> References: <20240103160024.70305-2-leobras@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This macro caused me some confusion, which took some reviewer's time to make it clear, so I propose adding a short comment in code to avoid confusion in the future. Also, added some improvements to the macro, such as removing the assumption of VA_USER_SV57 being the largest address space. Signed-off-by: Leonardo Bras Reviewed-by: Guo Ren --- arch/riscv/include/asm/processor.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/pr= ocessor.h index f19f861cda549..2278e2a8362af 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -18,15 +18,21 @@ #define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1)) #define STACK_TOP_MAX TASK_SIZE_64 =20 +/* + * addr is a hint to the maximum userspace address that mmap should provid= e, so + * this macro needs to return the largest address space available so that + * mmap_end < addr, being mmap_end the top of that address space. + * See Documentation/arch/riscv/vm-layout.rst for more details. + */ #define arch_get_mmap_end(addr, len, flags) \ ({ \ unsigned long mmap_end; \ typeof(addr) _addr =3D (addr); \ if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \ mmap_end =3D STACK_TOP_MAX; \ - else if ((_addr) >=3D VA_USER_SV57) \ - mmap_end =3D STACK_TOP_MAX; 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Wed, 03 Jan 2024 08:01:03 -0800 (PST) Received: from localhost.localdomain ([2804:431:c7ec:911:6911:ca60:846:eb46]) by smtp.gmail.com with ESMTPSA id qc8-20020a17090b288800b0028b1fce7c01sm1922253pjb.37.2024.01.03.08.00.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 08:01:03 -0800 (PST) From: Leonardo Bras To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Oleg Nesterov , Leonardo Bras , Guo Ren , Andy Chiu , Conor Dooley , Xiao Wang , Vincent Chen , Charlie Jenkins , Greg Ungerer , Andrew Morton , Kemeng Shi , Alexandre Ghiti , David Hildenbrand , "Matthew Wilcox (Oracle)" , Qinglin Pan , Greentime Hu , Baoquan He , =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH v1 2/5] riscv: Replace direct thread flag check with is_compat_task() Date: Wed, 3 Jan 2024 13:00:20 -0300 Message-ID: <20240103160024.70305-4-leobras@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240103160024.70305-2-leobras@redhat.com> References: <20240103160024.70305-2-leobras@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There is some code that detects compat mode into a task by checking the flag directly, and other code that check using the helper is_compat_task(). Since the helper already exists, use it instead of checking the flags directly. Signed-off-by: Leonardo Bras --- arch/riscv/include/asm/elf.h | 2 +- arch/riscv/include/asm/pgtable.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index 06c236bfab53b..59a08367fddd7 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -54,7 +54,7 @@ extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); =20 #ifdef CONFIG_64BIT #ifdef CONFIG_COMPAT -#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \ +#define STACK_RND_MASK (is_compat_task() ? \ 0x7ff >> (PAGE_SHIFT - 12) : \ 0x3ffff >> (PAGE_SHIFT - 12)) #else diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index ab00235b018f8..1d472b31e0cfe 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -882,7 +882,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte) =20 #ifdef CONFIG_COMPAT #define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE) -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? 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Since is_compat_task() is an inlined function, it would be helpful to add a compile-time test of CONFIG_COMPAT, making sure it always returns zero when the option is not enabled during the kernel build. With this, the compiler is able to understand in build-time that is_compat_task() will always return 0, and optimize-out some of the extra code introduced by the option. This will also allow removing a lot #ifdefs that were introduced, and make the code more clean. Signed-off-by: Leonardo Bras Reviewed-by: Guo Ren Reviewed-by: Andy Chiu --- arch/riscv/include/asm/compat.h | 3 +++ arch/riscv/include/asm/elf.h | 4 ---- arch/riscv/include/asm/pgtable.h | 6 ------ arch/riscv/include/asm/processor.h | 4 ++-- 4 files changed, 5 insertions(+), 12 deletions(-) diff --git a/arch/riscv/include/asm/compat.h b/arch/riscv/include/asm/compa= t.h index 2ac955b51148f..91517b51b8e27 100644 --- a/arch/riscv/include/asm/compat.h +++ b/arch/riscv/include/asm/compat.h @@ -14,6 +14,9 @@ =20 static inline int is_compat_task(void) { + if (!IS_ENABLED(CONFIG_COMPAT)) + return 0; + return test_thread_flag(TIF_32BIT); } =20 diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index 59a08367fddd7..2e88257cafaea 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -53,13 +53,9 @@ extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); #define ELF_ET_DYN_BASE ((DEFAULT_MAP_WINDOW / 3) * 2) =20 #ifdef CONFIG_64BIT -#ifdef CONFIG_COMPAT #define STACK_RND_MASK (is_compat_task() ? \ 0x7ff >> (PAGE_SHIFT - 12) : \ 0x3ffff >> (PAGE_SHIFT - 12)) -#else -#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12)) -#endif #endif =20 /* diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index 1d472b31e0cfe..ea5b269be223a 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -127,16 +127,10 @@ #define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1)) #define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1)) =20 -#ifdef CONFIG_COMPAT #define MMAP_VA_BITS_64 ((VA_BITS >=3D VA_BITS_SV48) ? VA_BITS_SV48 : VA_B= ITS) #define MMAP_MIN_VA_BITS_64 (VA_BITS_SV39) #define MMAP_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_VA_BITS_64) #define MMAP_MIN_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_MIN_VA_BI= TS_64) -#else -#define MMAP_VA_BITS ((VA_BITS >=3D VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS) -#define MMAP_MIN_VA_BITS (VA_BITS_SV39) -#endif /* CONFIG_COMPAT */ - #else #include #endif /* CONFIG_64BIT */ diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/pr= ocessor.h index 2278e2a8362af..d2d7ce30baf3e 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -28,7 +28,7 @@ ({ \ unsigned long mmap_end; \ typeof(addr) _addr =3D (addr); \ - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \ + if ((_addr) =3D=3D 0 || is_compat_task()) \ mmap_end =3D STACK_TOP_MAX; \ else if (((_addr) >=3D VA_USER_SV57) && (VA_BITS >=3D VA_BITS_SV57)) \ mmap_end =3D VA_USER_SV57; \ @@ -45,7 +45,7 @@ typeof(addr) _addr =3D (addr); \ typeof(base) _base =3D (base); \ unsigned long rnd_gap =3D DEFAULT_MAP_WINDOW - (_base); \ - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \ + if ((_addr) =3D=3D 0 || is_compat_task()) \ mmap_base =3D (_base); \ else if (((_addr) >=3D VA_USER_SV57) && (VA_BITS >=3D VA_BITS_SV57)) \ mmap_base =3D VA_USER_SV57 - rnd_gap; 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charset="utf-8" task_user_regset_view() makes use of a function very similar to is_compat_task(), but pointing to a any thread. In arm64 asm/compat.h there is a function very similar to that: is_compat_thread(struct thread_info *thread) Copy this function to riscv asm/compat.h and make use of it into task_user_regset_view(). Also, introduce a compile-time test for CONFIG_COMPAT and simplify the function code by removing the #ifdef. Signed-off-by: Leonardo Bras Reviewed-by: Guo Ren Reviewed-by: Andy Chiu --- arch/riscv/include/asm/compat.h | 8 ++++++++ arch/riscv/kernel/ptrace.c | 6 +++--- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/riscv/include/asm/compat.h b/arch/riscv/include/asm/compa= t.h index 91517b51b8e27..da4b28cd01a95 100644 --- a/arch/riscv/include/asm/compat.h +++ b/arch/riscv/include/asm/compat.h @@ -20,6 +20,14 @@ static inline int is_compat_task(void) return test_thread_flag(TIF_32BIT); } =20 +static inline int is_compat_thread(struct thread_info *thread) +{ + if (!IS_ENABLED(CONFIG_COMPAT)) + return 0; + + return test_ti_thread_flag(thread, TIF_32BIT); +} + struct compat_user_regs_struct { compat_ulong_t pc; compat_ulong_t ra; diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 2afe460de16a6..f362832123616 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -374,14 +374,14 @@ long compat_arch_ptrace(struct task_struct *child, co= mpat_long_t request, =20 return ret; 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charset="utf-8" In order to have all task compat bit access directly in compat.h, introduce set_compat_task() to set/reset those when needed. Also, since it's only used on an if/else scenario, simplify the macro using it. Signed-off-by: Leonardo Bras Reviewed-by: Guo Ren --- arch/riscv/include/asm/compat.h | 8 ++++++++ arch/riscv/include/asm/elf.h | 5 +---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/riscv/include/asm/compat.h b/arch/riscv/include/asm/compa= t.h index da4b28cd01a95..aa103530a5c83 100644 --- a/arch/riscv/include/asm/compat.h +++ b/arch/riscv/include/asm/compat.h @@ -28,6 +28,14 @@ static inline int is_compat_thread(struct thread_info *t= hread) return test_ti_thread_flag(thread, TIF_32BIT); } =20 +static inline void set_compat_task(bool is_compat) +{ + if (is_compat) + set_thread_flag(TIF_32BIT); + else + clear_thread_flag(TIF_32BIT); +} + struct compat_user_regs_struct { compat_ulong_t pc; compat_ulong_t ra; diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index 2e88257cafaea..c7aea7886d22a 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -135,10 +135,7 @@ do { \ #ifdef CONFIG_COMPAT =20 #define SET_PERSONALITY(ex) \ -do { if ((ex).e_ident[EI_CLASS] =3D=3D ELFCLASS32) \ - set_thread_flag(TIF_32BIT); \ - else \ - clear_thread_flag(TIF_32BIT); \ +do { set_compat_task((ex).e_ident[EI_CLASS] =3D=3D ELFCLASS32); \ if (personality(current->personality) !=3D PER_LINUX32) \ set_personality(PER_LINUX | \ (current->personality & (~PER_MASK))); \ --=20 2.43.0