From nobody Fri Sep 20 06:25:27 2024 Received: from mail-il1-f173.google.com (mail-il1-f173.google.com [209.85.166.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E26A118651 for ; Tue, 2 Jan 2024 21:08:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="J/iviGxT" Received: by mail-il1-f173.google.com with SMTP id e9e14a558f8ab-3600dc78bc0so29926405ab.2 for ; Tue, 02 Jan 2024 13:08:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229735; x=1704834535; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6xWplU6V/74zhrE0fU+phMJuFQc01H2ditVc3hsW/nY=; b=J/iviGxTnseTosGYD18/rbF8CRnnRPLnuoyhM+uMxt2rHo8zsjpoIu858je2rx9fSw nNFtxc1LOzjg1Bb5JrY3peV4KD6mCmd/qEqnogrUal+3AjklC1X68C2uWM0UK6ZPDF1m MCEH3hKAIXs4HL84mb8+Hlm2oT8Lv2Jt3Vbtk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229735; x=1704834535; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6xWplU6V/74zhrE0fU+phMJuFQc01H2ditVc3hsW/nY=; b=RMOfL8q8TmjRvnzKJqTJksislE48NExfeTLEYqZuduZYRAsD5Ib3vwG5uS2Ox3tJKM A5PQ4R5rQMvfIgEgmtqL/PiWPxVqLoNLS4BNQOhLSQ8ITa7x8v3p67QBFjBf4QxfhpaM dGuZ26AqKb+zH469zwHpLObj5zyz/bNmpjc5vyQV5g+aPI5KQHshrOVPign2YXVmDN3R JrQ4/NsyR1wU9LRFjYFWYVKL/a/ddjxBWqX7oHjHoA/lA69VtIlNc9gWfogGeEgqmCBJ UpjS2TaMxQf/9k8b0AjHxjA/6EhWowLphLMOKlnHJMC0kTIP4N3rFsx0/dNRWiLK5iGW Ubjg== X-Gm-Message-State: AOJu0YxNEjgRNdPiE3E/nE9sWB2qq0lpksUp8GYOygWlJfFwO5o7Py2h OL/VKwEt3E45mCO+TLusi6QzWL1MfWdm7c/sEQJNfbl5HviB X-Google-Smtp-Source: AGHT+IHfOsWwH7XeGwxyO82lQ7Beiea2aMSZMszgEK2VhB9dcZJ2V4KeyfBreF3d8IlhWEEKQTrnQw== X-Received: by 2002:a05:6e02:1be1:b0:360:2197:4bbe with SMTP id y1-20020a056e021be100b0036021974bbemr15914894ilv.59.1704229735102; Tue, 02 Jan 2024 13:08:55 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:54 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , Conor Dooley , Jonathan Hunter , Krzysztof Kozlowski , Rob Herring , Thierry Reding , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v4 13/24] arm64: dts: tegra: Enable cros-ec-spi as wake source Date: Tue, 2 Jan 2024 14:07:37 -0700 Message-ID: <20240102140734.v4.13.Ic12bf13efe60f9ffaa444126c55a35fbf6c521cc@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240102210820.2604667-1-markhas@chromium.org> References: <20240102210820.2604667-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by: Mark Hasemeyer --- (no changes since v3) Changes in v3: -Update commit message to provide details of the motivation behind the change Changes in v2: -Split by arch/soc arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/bo= ot/dts/nvidia/tegra132-norrin.dts index bbc2e9bef08da..14d58859bb55c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts @@ -762,6 +762,7 @@ ec: cros-ec@0 { interrupt-parent =3D <&gpio>; interrupts =3D ; reg =3D <0>; + wakeup-source; =20 google,cros-ec-spi-msg-delay =3D <2000>; =20 --=20 2.43.0.472.g3155946c3a-goog