From nobody Fri Dec 26 23:36:15 2025 Received: from mail-ot1-f49.google.com (mail-ot1-f49.google.com [209.85.210.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEC6B1642F for ; Fri, 29 Dec 2023 21:50:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="xWDAVtAw" Received: by mail-ot1-f49.google.com with SMTP id 46e09a7af769-6dbfdb41a63so2443376a34.0 for ; Fri, 29 Dec 2023 13:50:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1703886610; x=1704491410; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h9sAaI5x/m4qa/IsblGkrHPvGq73TiWdoovLssK6KVs=; b=xWDAVtAw0i1yX1oBfsj9Xbz9+pqZ2SYrxIjHNJbB//2JvXGt2rhHe6oXr2XCnckRcR ZmSelL0I71O1zxv44XyK5z1lt42GU89rNpwGIWIgkADcfwj5jDAMhFxywr+t3/dwlnNA k0CCq5WopeQ6uKN6255OgTrabyHQ/LSAt60CbhNzo50+sh2MQfQlF6cExW5ERwxbBtGo QqVeT/6wNqWoLEaXIUE4ZczKaoDlEHYRzgO6F4Y9yB+4p5gvyPRWjFgmWon7JlMXwEHu RwAy5Zb92hrXrrWslW+Lh4enzQLsNO949uG1t3m2Joa2bfH0Dt1lCdRptgBa5EDtR3Fa +/5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703886610; x=1704491410; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=h9sAaI5x/m4qa/IsblGkrHPvGq73TiWdoovLssK6KVs=; b=Soyc3TbrWcyT9DKM/SXzdJSa9CbBVmUgIDYQzKA+BEYqWzfh725vqfZxab8dGXzGkB aDLEqA74WxgCCeMrM8IcUM+txpKCqaDp7zXH+AxNx9DoJfo9UCwA72pmMk6RcGUMKSec y0VoqhtvEl11yn42Htf18Gy1NeNC3f+TDgEEGqVSgiPO1uzMoVU7HsSAVmj0aYBgMZ/Q s167l5UIrpEGyjcd0mhQIqWixsE36qp/YQvriorsGF+K69i5pVAi9IRieAddd7Sr5Bnc IpAcxO2uIJgxybbqvzsYOT5bX+ENX+PqDBGS93p3dEVIu1hwOko7H2DMhoV7y4ufLMfV o2iA== X-Gm-Message-State: AOJu0Yzq4YpNgsapPrXuCPqhPl3AWZ73d/Nau/8w2UUnQ3X4r4UgECzM HdlZDgR1l3cJsRYyz0KmNeyPQftLJyW0qqUnNXcrpeHKTPQ= X-Google-Smtp-Source: AGHT+IFoZdi69fR1RVMQrS5+z2lZ3ANAuSBiic5ImLxKQuR4x/mQOda884boDm8q+SDpYIGvV84mdw== X-Received: by 2002:a9d:730f:0:b0:6d9:f1b4:c560 with SMTP id e15-20020a9d730f000000b006d9f1b4c560mr9972651otk.67.1703886610630; Fri, 29 Dec 2023 13:50:10 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id r126-20020a4a4e84000000b00594e32e4364sm1034751ooa.24.2023.12.29.13.50.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Dec 2023 13:50:10 -0800 (PST) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Albert Ou , Alexandre Ghiti , Andrew Jones , Anup Patel , Atish Patra , Conor Dooley , Guo Ren , Heiko Stuebner , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paul Walmsley , Will Deacon Subject: [v2 07/10] RISC-V: KVM: No need to exit to the user space if perf event failed Date: Fri, 29 Dec 2023 13:49:47 -0800 Message-Id: <20231229214950.4061381-8-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231229214950.4061381-1-atishp@rivosinc.com> References: <20231229214950.4061381-1-atishp@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently, we return a linux error code if creating a perf event failed in kvm. That shouldn't be necessary as guest can continue to operate without perf profiling or profiling with firmware counters. Return appropriate SBI error code to indicate that PMU configuration failed. An error message in kvm already describes the reason for failure. Fixes: 0cb74b65d2e5 ("RISC-V: KVM: Implement perf support without sampling") Signed-off-by: Atish Patra Reviewed-by: Anup Patel --- arch/riscv/kvm/vcpu_pmu.c | 14 +++++++++----- arch/riscv/kvm/vcpu_sbi_pmu.c | 6 +++--- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c index 8c44f26e754d..08f561998611 100644 --- a/arch/riscv/kvm/vcpu_pmu.c +++ b/arch/riscv/kvm/vcpu_pmu.c @@ -229,8 +229,9 @@ static int kvm_pmu_validate_counter_mask(struct kvm_pmu= *kvpmu, unsigned long ct return 0; } =20 -static int kvm_pmu_create_perf_event(struct kvm_pmc *pmc, struct perf_even= t_attr *attr, - unsigned long flags, unsigned long eidx, unsigned long evtdata) +static long kvm_pmu_create_perf_event(struct kvm_pmc *pmc, struct perf_eve= nt_attr *attr, + unsigned long flags, unsigned long eidx, + unsigned long evtdata) { struct perf_event *event; =20 @@ -455,7 +456,8 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *v= cpu, unsigned long ctr_ba unsigned long eidx, u64 evtdata, struct kvm_vcpu_sbi_return *retdata) { - int ctr_idx, ret, sbiret =3D 0; + int ctr_idx, sbiret =3D 0; + long ret; bool is_fevent; unsigned long event_code; u32 etype =3D kvm_pmu_get_perf_event_type(eidx); @@ -514,8 +516,10 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *= vcpu, unsigned long ctr_ba kvpmu->fw_event[event_code].started =3D true; } else { ret =3D kvm_pmu_create_perf_event(pmc, &attr, flags, eidx, evtdata); - if (ret) - return ret; + if (ret) { + sbiret =3D SBI_ERR_NOT_SUPPORTED; + goto out; + } } =20 set_bit(ctr_idx, kvpmu->pmc_in_use); diff --git a/arch/riscv/kvm/vcpu_sbi_pmu.c b/arch/riscv/kvm/vcpu_sbi_pmu.c index 7eca72df2cbd..b70179e9e875 100644 --- a/arch/riscv/kvm/vcpu_sbi_pmu.c +++ b/arch/riscv/kvm/vcpu_sbi_pmu.c @@ -42,9 +42,9 @@ static int kvm_sbi_ext_pmu_handler(struct kvm_vcpu *vcpu,= struct kvm_run *run, #endif /* * This can fail if perf core framework fails to create an event. - * Forward the error to userspace because it's an error which - * happened within the host kernel. The other option would be - * to convert to an SBI error and forward to the guest. + * No need to forward the error to userspace and exit the guest + * operation can continue without profiling. Forward the + * appropriate SBI error to the guest. */ ret =3D kvm_riscv_vcpu_pmu_ctr_cfg_match(vcpu, cp->a0, cp->a1, cp->a2, cp->a3, temp, retdata); --=20 2.34.1