From nobody Fri Sep 20 09:55:12 2024 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A56167491; Wed, 27 Dec 2023 04:44:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="pbfdb9Zc" Received: by mail.gandi.net (Postfix) with ESMTPSA id AFD961C0005; Wed, 27 Dec 2023 04:44:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1703652268; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=65dnSrXOzOWi1yBmaxCyl5uIl8FJyuseOOIh7XCp6Nw=; b=pbfdb9ZckIq0GiF6ZQXcoPL9NYz5KTp/akQy1oM+OAntJ30kQlZiw6pwN+X4dsC+9U3YtF J71g4J37jWowhZ72DE0O6YwTyypqsGvP242XbLs2av7OJG7lEXCrdqQj6PhyAZOIB+0IE/ 9s0yxYbwgx9oyZQWhdGuDMPbfdT3pcgS36qQwzyFVFRkXlMLZhOa6UnHZoA0iZirn8L0Ps P9326Uh6Ftrxakq3sSrah0a9eyZFdij23CtsqlbSKonkhP82O00fuKd5zW7LeJJwqBMmql NJwSb8oLh4a85qBLryil8hdemUvaAYomlzScItjvrj7E90QAM4VJ45yU947Qsg== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net-next v2 5/7] net: dsa: mt7530: improve code path for setting up port 5 Date: Wed, 27 Dec 2023 07:43:45 +0300 Message-Id: <20231227044347.107291-6-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231227044347.107291-1-arinc.unal@arinc9.com> References: <20231227044347.107291-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com There're two code paths for setting up port 5: mt7530_setup() -> mt7530_setup_port5() mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() Currently mt7530_setup_port5() from mt7530_setup() always runs. If port 5 is used as a CPU, DSA, or user port, mt7530_setup_port5() from mt753x_phylink_mac_config() won't run. That is because priv->p5_interface set on mt7530_setup_port5() will match state->interface on mt753x_phylink_mac_config() which will stop running mt7530_setup_port5() again. Therefore, mt7530_setup_port5() will never run from mt753x_phylink_mac_config(). Address this by not running mt7530_setup_port5() from mt7530_setup() if port 5 is used as a CPU, DSA, or user port. This driver isn't in the dsa_switches_apply_workarounds[] array so phylink will always be present. To keep the cases where port 5 isn't controlled by phylink working as before, preserve the mt7530_setup_port5() call from mt7530_setup(). Do not set priv->p5_intf_sel to P5_DISABLED. It is already set to that when "priv" is allocated. Move setting the interface to a more specific location. It's supposed to be overwritten if PHY muxing is detected. Improve the comment which explains the process. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 558784f830c2..bf6c59ecc489 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2308,16 +2308,15 @@ mt7530_setup(struct dsa_switch *ds) return ret; =20 /* Setup port 5 */ - priv->p5_intf_sel =3D P5_DISABLED; - interface =3D PHY_INTERFACE_MODE_NA; - if (!dsa_is_unused_port(ds, 5)) { priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5; - ret =3D of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface); - if (ret && ret !=3D -ENODEV) - return ret; } else { - /* Scan the ethernet nodes. look for GMAC1, lookup used phy */ + /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. + * Set priv->p5_intf_sel to the appropriate value if PHY muxing + * is detected. + */ + interface =3D PHY_INTERFACE_MODE_NA; + for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) @@ -2348,6 +2347,8 @@ mt7530_setup(struct dsa_switch *ds) of_node_put(phy_node); break; } + + mt7530_setup_port5(ds, interface); } =20 #ifdef CONFIG_GPIOLIB @@ -2358,8 +2359,6 @@ mt7530_setup(struct dsa_switch *ds) } #endif /* CONFIG_GPIOLIB */ =20 - mt7530_setup_port5(ds, interface); - /* Flush the FDB table */ ret =3D mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); if (ret < 0) --=20 2.40.1