From nobody Fri Dec 19 17:01:50 2025 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5779E23743 for ; Fri, 22 Dec 2023 15:01:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="hhgiFGbw" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-a1fae88e66eso231923066b.3 for ; Fri, 22 Dec 2023 07:01:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703257304; x=1703862104; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TIsLTUxJE1cxBBiiifVCcvawbyJ4lrohtOQb+rAqVac=; b=hhgiFGbwHUwz52j8mNsxeXgT1VIxJE8NIpT0RNJvC97hWVt/cBgE6Yc8NELwVLReyI Zy7Cl3m/UUH9vrvfbXPRA8qk7CrhoeVZACNkX1+bWAAIrDO+lY+k25qeJ+bffRVdARxV tlDWIiKYTVEyZ8MIjs0J+ECescmIeL/HctVW/llmsbrlmlRmw1RnZB6PlpyrmQ12aggr DiFUCWenO4pkNdPiALv6N1gVFKHgyg9x04H9pFZ0bK9Gi6p/zRDo0JyLU+bnI/iK6NTK sVTh2s1e4ogikW0a1kQ7VbZhV/cUJgjIlPlQKqMLivSIDbj/lbjF2dUy3H8K0g8FW3xs Y2tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703257304; x=1703862104; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TIsLTUxJE1cxBBiiifVCcvawbyJ4lrohtOQb+rAqVac=; b=GVOnwB5U9EzkOD8q8BfsmVq+1zg25mlu5PX21IrOdUqk82J6wrL6YGDxHwDMc6R+t3 uihVrbV4ZMVTE3lrH/MzMxSd26SSopxfBRZuWeXUbUCNiEW20goEn4cMnO3Erme3/UI/ QpXdBHHQDXPctyibtJXPPa8rzEcUFX1BRsRD4+NnVYnBRkChzx+61TD9ypRlXwftuDuI ZhxvT7ue5ohqD61xDc2o7NpusHN8S2kKIYZmVryi8ptLAO1K8mXstjWMN1IOjIJKObZW y0cpChklHtQC1Wmyp2bDAxlXix12ZIuNz5jl/OYfaVYEM5VpMFxRN7TZI5jqkDFvBCDG A1tA== X-Gm-Message-State: AOJu0YwaoPaz8F989Fk2PizpiNiZB/MR+81CG3ulczdCJ4UgDzPJn53C itxA8hjF3LOXFuIAkGhTceWN8vQqaJWy1w== X-Google-Smtp-Source: AGHT+IFOVAFE/3mSgxDg8r0BmeFffXjHPsKVAmnpzZGOR+G92xcuwjc1mM3+0AL59eOzOUdBtOOHBQ== X-Received: by 2002:a17:906:eb51:b0:a26:858b:b76e with SMTP id mc17-20020a170906eb5100b00a26858bb76emr831943ejb.105.1703257304630; Fri, 22 Dec 2023 07:01:44 -0800 (PST) Received: from krzk-bin.. ([78.10.206.178]) by smtp.gmail.com with ESMTPSA id h1-20020a17090791c100b00a26af35c171sm1275671ejz.0.2023.12.22.07.01.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 07:01:44 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Srinivas Kandagatla , Banajit Goswami , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Jaroslav Kysela , Takashi Iwai , linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Bartosz Golaszewski , Sean Anderson Subject: [PATCH 1/4] reset: instantiate reset GPIO controller for shared reset-gpios Date: Fri, 22 Dec 2023 16:01:30 +0100 Message-Id: <20231222150133.732662-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> References: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Devices sharing a reset GPIO could use the reset framework for coordinated handling of that shared GPIO line. We have several cases of such needs, at least for Devicetree-based platforms. If Devicetree-based device requests a reset line which is missing but there is a reset-gpios property, instantiate a new "reset-gpio" platform device which will handle such reset line. This allows seamless handling of such shared reset-gpios without need of changing Devicetree binding [1]. The "reset-gpio" driver follows shortly. Link: https://lore.kernel.org/all/YXi5CUCEi7YmNxXM@robh.at.kernel.org/ Cc: Bartosz Golaszewski Cc: Sean Anderson Signed-off-by: Krzysztof Kozlowski --- drivers/reset/core.c | 70 +++++++++++++++++++++++++++----- include/linux/reset-controller.h | 2 + 2 files changed, 61 insertions(+), 11 deletions(-) diff --git a/drivers/reset/core.c b/drivers/reset/core.c index 4d5a78d3c085..a1f0f515a7e0 100644 --- a/drivers/reset/core.c +++ b/drivers/reset/core.c @@ -10,9 +10,12 @@ #include #include #include +#include #include #include +#include #include +#include #include #include #include @@ -813,13 +816,59 @@ static void __reset_control_put_internal(struct reset= _control *rstc) kref_put(&rstc->refcnt, __reset_control_release); } =20 +static int __reset_add_reset_gpio_device(struct device_node *node, + const struct gpio_desc **out) +{ + struct platform_device *pdev; + int gpio; + + /* Don't care about deprecated '-gpio' suffix. */ + gpio =3D of_get_named_gpio(node, "reset-gpios", 0); + if (!gpio_is_valid(gpio)) + return gpio; + + pdev =3D platform_device_register_data(NULL, "reset-gpio", + PLATFORM_DEVID_AUTO, &node, + sizeof(node)); + if (!IS_ERR(pdev)) + *out =3D gpio_to_desc(gpio); + + return PTR_ERR_OR_ZERO(pdev); +} + +static struct reset_controller_dev *__reset_find_rcdev(const struct of_pha= ndle_args *args, + const void *cookie) +{ + struct reset_controller_dev *r, *rcdev; + + lockdep_assert_held(&reset_list_mutex); + + rcdev =3D NULL; + list_for_each_entry(r, &reset_controller_list, list) { + if (args && args->np) { + if (args->np =3D=3D r->of_node) { + rcdev =3D r; + break; + } + } else if (cookie) { + if (cookie =3D=3D r->cookie) { + rcdev =3D r; + break; + } + } + } + + return rcdev; +} + struct reset_control * __of_reset_control_get(struct device_node *node, const char *id, int index, bool shared, bool optional, bool acquired) { + const struct gpio_desc *gpio =3D NULL; + struct of_phandle_args args =3D {0}; struct reset_control *rstc; - struct reset_controller_dev *r, *rcdev; - struct of_phandle_args args; + struct reset_controller_dev *rcdev; int rstc_id; int ret; =20 @@ -839,17 +888,16 @@ __of_reset_control_get(struct device_node *node, cons= t char *id, int index, index, &args); if (ret =3D=3D -EINVAL) return ERR_PTR(ret); - if (ret) - return optional ? NULL : ERR_PTR(ret); + if (ret) { + ret =3D __reset_add_reset_gpio_device(node, &gpio); + if (ret) + return optional ? NULL : ERR_PTR(ret); + + args.args_count =3D 1; /* reset-gpio has only one reset line */ + } =20 mutex_lock(&reset_list_mutex); - rcdev =3D NULL; - list_for_each_entry(r, &reset_controller_list, list) { - if (args.np =3D=3D r->of_node) { - rcdev =3D r; - break; - } - } + rcdev =3D __reset_find_rcdev(&args, gpio); =20 if (!rcdev) { rstc =3D ERR_PTR(-EPROBE_DEFER); diff --git a/include/linux/reset-controller.h b/include/linux/reset-control= ler.h index 0fa4f60e1186..c0a99a8ea29e 100644 --- a/include/linux/reset-controller.h +++ b/include/linux/reset-controller.h @@ -61,6 +61,7 @@ struct reset_control_lookup { * @dev: corresponding driver model device struct * @of_node: corresponding device tree node as phandle target * @of_reset_n_cells: number of cells in reset line specifiers + * @cookie: for reset-gpios controllers: corresponding GPIO instead of of_= node * @of_xlate: translation function to translate from specifier as found in= the * device tree to id as given to the reset control ops, defaults * to :c:func:`of_reset_simple_xlate`. @@ -74,6 +75,7 @@ struct reset_controller_dev { struct device *dev; struct device_node *of_node; int of_reset_n_cells; + const void *cookie; int (*of_xlate)(struct reset_controller_dev *rcdev, const struct of_phandle_args *reset_spec); unsigned int nr_resets; --=20 2.34.1 From nobody Fri Dec 19 17:01:50 2025 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C06392377A for ; Fri, 22 Dec 2023 15:01:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="HMaP8UZT" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-50e44c1b35fso2349363e87.3 for ; Fri, 22 Dec 2023 07:01:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703257309; x=1703862109; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rY+Ix+0Edhw9Of7v8MceePDnv6PKZ0qWKEzNHi94emw=; b=HMaP8UZTsP+ppUX+FHaBN4lutrWq8+IbrcXH9B+0bxInxU0gPWg8Faly0ZaCGQnn6w qac+Zq5sUd58lRqpz+oIo4v5aLBClriS2+EfM9hW7nHzWcSHy3YoNDeWe1VWadJ0PBPP GfbgOhUFKIMI2x3SOnDPmXXxKc/Ly06VZbzJFPUMmfGBDJ8cyyrYf1sx0v0z4MXbOKJz jNRtHFYw4ABSo9OmL4PwfDT25HBqW7+Ox/8VPCP2g2lkZUAYBVzh3fZ42oxxdOKTMd7Z rO/i7SFLp0qdpgUCnkPWJPrfqe5YvC2PsKnsYQ7Bbp1+ZRZQIhNSeFtWXJNjadnwCLKn MQ6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703257309; x=1703862109; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rY+Ix+0Edhw9Of7v8MceePDnv6PKZ0qWKEzNHi94emw=; b=wPBsS4hxdl48xv3wDoHse6hl8jr/y6g26cND8dXVfeWugW8E/3Ptde6stRIX6CigLP oqPYuTWTZyqmDF5kljDHBWfRw4HZ4C1RqD6y3yXP98whayaR5CYS3QBJApN7ftlViEtf krzQmkmdmt8g6Zh0pgsiKjM1YhoQuhZPmTLVybvsGpyTRU2ESpXeCrfgY7xMJaVV0V6k h/nl7n6NtPTJDCA80TqQh5yIs0/OGsKAh3SA152ubyuwF0DlT8rXckcdwkJxednM2hqD 5SkZk+4Mm0bRBTHFZWDVegzh03lyXsg1Nc6sFTSn/3A+3IoPCckUggbGpE+lIbaYdCNV Sk1w== X-Gm-Message-State: AOJu0YzifXNoIEvVOUR8pHwrTbK90Xz3xCeDTJFzKyyrWVWs2j/WtVVp Qz2FbpqQxF7AIW3H8li5l7b0yujilnfV9w== X-Google-Smtp-Source: AGHT+IERJW4T91WGiP+wu8qoU0QkN4X16TMIuviArBP6wKljKiUI/SdehMnQ9+X+6SnuqpYnMufOlA== X-Received: by 2002:a05:6512:104a:b0:50e:6a31:127a with SMTP id c10-20020a056512104a00b0050e6a31127amr770806lfb.31.1703257306354; Fri, 22 Dec 2023 07:01:46 -0800 (PST) Received: from krzk-bin.. ([78.10.206.178]) by smtp.gmail.com with ESMTPSA id h1-20020a17090791c100b00a26af35c171sm1275671ejz.0.2023.12.22.07.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 07:01:45 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Srinivas Kandagatla , Banajit Goswami , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Jaroslav Kysela , Takashi Iwai , linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Bartosz Golaszewski , Sean Anderson Subject: [PATCH 2/4] reset: add GPIO-based reset controller Date: Fri, 22 Dec 2023 16:01:31 +0100 Message-Id: <20231222150133.732662-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> References: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add simple driver to control GPIO-based resets using the reset controller API for the cases when the GPIOs are shared and reset should be coordinated. The driver is expected to be used by reset core framework for ad-hoc reset controllers. Cc: Bartosz Golaszewski Cc: Sean Anderson Signed-off-by: Krzysztof Kozlowski --- MAINTAINERS | 5 ++ drivers/reset/Kconfig | 9 ++++ drivers/reset/Makefile | 1 + drivers/reset/reset-gpio.c | 105 +++++++++++++++++++++++++++++++++++++ 4 files changed, 120 insertions(+) create mode 100644 drivers/reset/reset-gpio.c diff --git a/MAINTAINERS b/MAINTAINERS index 7fe27cd60e1b..a0fbd4814bc7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8866,6 +8866,11 @@ F: Documentation/i2c/muxes/i2c-mux-gpio.rst F: drivers/i2c/muxes/i2c-mux-gpio.c F: include/linux/platform_data/i2c-mux-gpio.h =20 +GENERIC GPIO RESET DRIVER +M: Krzysztof Kozlowski +S: Maintained +F: drivers/reset/reset-gpio.c + GENERIC HDLC (WAN) DRIVERS M: Krzysztof Halasa S: Maintained diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index ccd59ddd7610..bb1b5a326eb7 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -66,6 +66,15 @@ config RESET_BRCMSTB_RESCAL This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on BCM7216. =20 +config RESET_GPIO + tristate "GPIO reset controller" + help + This enables a generic reset controller for resets attached via + GPIOs. Typically for OF platforms this driver expects "reset-gpios" + property. + + If compiled as module, it will be called reset-gpio. + config RESET_HSDK bool "Synopsys HSDK Reset Driver" depends on HAS_IOMEM diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 8270da8a4baa..fd8b49fa46fc 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_RESET_BCM6345) +=3D reset-bcm6345.o obj-$(CONFIG_RESET_BERLIN) +=3D reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) +=3D reset-brcmstb.o obj-$(CONFIG_RESET_BRCMSTB_RESCAL) +=3D reset-brcmstb-rescal.o +obj-$(CONFIG_RESET_GPIO) +=3D reset-gpio.o obj-$(CONFIG_RESET_HSDK) +=3D reset-hsdk.o obj-$(CONFIG_RESET_IMX7) +=3D reset-imx7.o obj-$(CONFIG_RESET_INTEL_GW) +=3D reset-intel-gw.o diff --git a/drivers/reset/reset-gpio.c b/drivers/reset/reset-gpio.c new file mode 100644 index 000000000000..6952996dbc9f --- /dev/null +++ b/drivers/reset/reset-gpio.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include + +struct reset_gpio_priv { + struct reset_controller_dev rc; + struct gpio_desc *reset; +}; + +static inline struct reset_gpio_priv +*rc_to_reset_gpio(struct reset_controller_dev *rc) +{ + return container_of(rc, struct reset_gpio_priv, rc); +} + +static int reset_gpio_assert(struct reset_controller_dev *rc, unsigned lon= g id) +{ + struct reset_gpio_priv *priv =3D rc_to_reset_gpio(rc); + + gpiod_set_value_cansleep(priv->reset, 1); + + return 0; +} + +static int reset_gpio_deassert(struct reset_controller_dev *rc, + unsigned long id) +{ + struct reset_gpio_priv *priv =3D rc_to_reset_gpio(rc); + + gpiod_set_value_cansleep(priv->reset, 0); + + return 0; +} + +static int reset_gpio_status(struct reset_controller_dev *rc, unsigned lon= g id) +{ + struct reset_gpio_priv *priv =3D rc_to_reset_gpio(rc); + + return gpiod_get_value_cansleep(priv->reset); +} + +static const struct reset_control_ops reset_gpio_ops =3D { + .assert =3D reset_gpio_assert, + .deassert =3D reset_gpio_deassert, + .status =3D reset_gpio_status, +}; + +static int reset_gpio_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct device_node **platdata =3D dev_get_platdata(dev); + struct reset_gpio_priv *priv; + + if (!platdata && !*platdata) + return -EINVAL; + + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + platform_set_drvdata(pdev, &priv->rc); + device_set_node(dev, of_fwnode_handle(*platdata)); + + /* + * Need to get non-exclusive because it is used in reset core as cookie + * to find existing controllers. However the actual use is exclusive. + */ + priv->reset =3D devm_gpiod_get(dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(priv->reset)) + return dev_err_probe(dev, PTR_ERR(priv->reset), + "Could not get reset gpios\n"); + + priv->rc.ops =3D &reset_gpio_ops; + priv->rc.owner =3D THIS_MODULE; + priv->rc.dev =3D dev; + priv->rc.cookie =3D priv->reset; + priv->rc.nr_resets =3D 1; + + return devm_reset_controller_register(dev, &priv->rc); +} + +static const struct platform_device_id reset_gpio_ids[] =3D { + { .name =3D "reset-gpio", }, + {} +}; +MODULE_DEVICE_TABLE(platform, reset_gpio_ids); + +static struct platform_driver reset_gpio_driver =3D { + .probe =3D reset_gpio_probe, + .id_table =3D reset_gpio_ids, + .driver =3D { + .name =3D "reset-gpio", + }, +}; +module_platform_driver(reset_gpio_driver); + +MODULE_AUTHOR("Krzysztof Kozlowski "); +MODULE_DESCRIPTION("Generic GPIO reset driver"); +MODULE_LICENSE("GPL"); --=20 2.34.1 From nobody Fri Dec 19 17:01:50 2025 Received: from mail-ej1-f48.google.com (mail-ej1-f48.google.com [209.85.218.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E1022376C for ; Fri, 22 Dec 2023 15:01:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="dYgS+xPs" Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-a22deb95d21so243276966b.3 for ; Fri, 22 Dec 2023 07:01:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703257308; x=1703862108; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vx3v1qGZeqQnkYVSrY5RSwpGT9fxdZloG/62JqqyTmE=; b=dYgS+xPsMLUMdnAhOB4BpD3CsRBuYcoZ/a+ph7FCZ/g2I1WfER3aCwYMq62GgQ2ZYf B3LeTwmpM2bdXvZkutwfaXd80+SX9nAbGl33jRRq17DtLPFs+TydW6R73Bfv7gyfXD6r 8/zelrMX1nGTg48NnFEmOrZRUJK/hdr5JtYj//qNxTROnc0MdDYg/dpdTVAGXvMPFs+o Kpr/FKgTtH9vGjzt4zBo2zW5vqKSoZLpJDthPlywZk4YV/ywDnofpTojBEElTdnr/p9t 22OANkJ64nbmOkJHTK+anIoLPzhZ+2RHymlsUXMU11tD/IVoeskbeVa0FytrPk6aK2/9 Bfow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703257308; x=1703862108; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vx3v1qGZeqQnkYVSrY5RSwpGT9fxdZloG/62JqqyTmE=; b=A1ZTJ/Fn5D+HUBWwPefy+3hgGDjewmlhqqiEUvLahGCYRWzsOnM6tSCHFu+8gycNU0 FCZ/JRnqUq2yifsphhNRSOCh9SeOCYyqswpaJWgm0T1IyC8d41EWj+vJe+6p2Zvna8sn MCvlaQ9EUZ+pDEkRhSkBvaWbKJj+PrzvxrGWkR+9gkTubkX6WIpNnxDftCL2qI6ySW/x UfIv5tQ8aKN9OHydEnrmxtkLkiXu+uAj2tPmG+DOLC3LBczOJScJNXLgPtlB89cm8eJo AUHCHZCEUo42DDepmzK1bWodzP8bFXjIddhk9UqRMQ3wOIv7K+BkPFH2HRkXjMrzxedv iFnQ== X-Gm-Message-State: AOJu0YzdC5Vkdz0pChdJXtYz4TKFU5HKKjQxVAq+2hTST3hVjvqeB25U taR4wnAZBYB0ruXIYmUjQxuwR6YYR5Sadg== X-Google-Smtp-Source: AGHT+IFSkPoU1vTjmyalz79sN5kxTWIe8tnjANHRIdEWKTqQBOahgPnI8lq+LbB2c3LndM4iYEf3iw== X-Received: by 2002:a17:906:eb12:b0:a23:333b:129a with SMTP id mb18-20020a170906eb1200b00a23333b129amr888281ejb.53.1703257308319; Fri, 22 Dec 2023 07:01:48 -0800 (PST) Received: from krzk-bin.. ([78.10.206.178]) by smtp.gmail.com with ESMTPSA id h1-20020a17090791c100b00a26af35c171sm1275671ejz.0.2023.12.22.07.01.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 07:01:47 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Srinivas Kandagatla , Banajit Goswami , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Jaroslav Kysela , Takashi Iwai , linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Bartosz Golaszewski , Sean Anderson Subject: [PATCH 3/4] ASoC: dt-bindings: qcom,wsa8840: Add reset-gpios for shared line Date: Fri, 22 Dec 2023 16:01:32 +0100 Message-Id: <20231222150133.732662-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> References: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On newer Qualcomm platforms, like X1E80100-CRD, the WSA884x speakers share SD_N GPIOs between two speakers, thus a coordinated assertion is needed. Linux supports handling shared GPIO lines through "reset-gpios" property, thus allow specifying either powerdown or reset GPIOs (these are the same). Cc: Bartosz Golaszewski Cc: Sean Anderson Signed-off-by: Krzysztof Kozlowski --- If previous patches are fine, then this commit is independent and could be taken via ASoC. --- .../devicetree/bindings/sound/qcom,wsa8840.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/qcom,wsa8840.yaml b/Do= cumentation/devicetree/bindings/sound/qcom,wsa8840.yaml index d717017b0fdb..4b4bcbeba9c1 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wsa8840.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wsa8840.yaml @@ -28,6 +28,10 @@ properties: description: Powerdown/Shutdown line to use (pin SD_N) maxItems: 1 =20 + reset-gpios: + description: Powerdown/Shutdown line to use (pin SD_N) + maxItems: 1 + '#sound-dai-cells': const: 0 =20 @@ -37,11 +41,14 @@ properties: required: - compatible - reg - - powerdown-gpios - '#sound-dai-cells' - vdd-1p8-supply - vdd-io-supply =20 +oneOf: + - powerdown-gpios + - reset-gpios + unevaluatedProperties: false =20 examples: --=20 2.34.1 From nobody Fri Dec 19 17:01:50 2025 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7E5B241FD for ; Fri, 22 Dec 2023 15:01:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="MU0DWe9w" Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-a235e394758so216947466b.1 for ; Fri, 22 Dec 2023 07:01:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703257310; x=1703862110; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+d2F5ydtA1OobfJmI2hpIshuNT6ymaNJ4rjSuqNR8IA=; b=MU0DWe9w6pHEuxKA32Jx7HPsnmZMaUdvYgQovU+9LEgQV68hwfB63pdAz7yxYwydMg QzLWoh+nhFgCajpXrXFyd9K3tBM0LWzIDJSGU+dAVMCfb5uDOAEKVUOSzbJNm9xT5ehC OxaKNUVwqj2mPJ/xoEMUw/rUtSb/6Jmr9E5D6SgdyDLjb1fBnicKAlL35hwlqLNpVdVx aklooGxr0CefoTStBiRg+W+mT8oulBXzADBT/OmRNMMx5uoCRus3LetIAqR6moWTwQuc HXygHPbp0sxVjNEaPq5b4jCOcHw5nhraElt9k9wMP585qrx+/rHAE6e5OVaMLXAVWjqK 9hDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703257310; x=1703862110; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+d2F5ydtA1OobfJmI2hpIshuNT6ymaNJ4rjSuqNR8IA=; b=Wxi/VYDT5g9Mg71xHLSoFFTuKJNPxEP66c4eA8udv++VGmPwhl+zmsMeBmX8+UPsnH pgZKXy4zL9oHV9bb65fE83RXXRcXNyyDoNvdewrdntno83QIQaoERrU0PL2ib/0uouCn 5O7NtMpgGpJPA1GWfVJ1tRvG1UGpgZ83Bs0kxGcHuJmHGgVTpyDHwdti+3a+AdngsBae OVy2erzMYBhyodCUmTFIoZKzXMe0GGInM0h0jMN41gzT8l+DB3BmsRzC2/F8idRYKn+8 v9rLy2HFLMovqIOEOiViN7Vn/mze7ATE65Zmr0YB+ouRMel4B/KwFL02+0VWe6bw+fKN zTZQ== X-Gm-Message-State: AOJu0YxH7Zh8hLnYyzT7LemN2xjIBU9WI9au+ixvRIwMo7ODMvg5nA5W tNOe6qfOd7xxgKcJlgfzGqe9tWY8hae1uQ== X-Google-Smtp-Source: AGHT+IFzDificB3UdraTqz1VX5y4HhiRlv+QgDqloc5aGPlnfsgxfIGccPb4+aYc8yFdDUFdm5GSDw== X-Received: by 2002:a17:906:18:b0:a23:4589:75b0 with SMTP id 24-20020a170906001800b00a23458975b0mr808715eja.100.1703257310132; Fri, 22 Dec 2023 07:01:50 -0800 (PST) Received: from krzk-bin.. ([78.10.206.178]) by smtp.gmail.com with ESMTPSA id h1-20020a17090791c100b00a26af35c171sm1275671ejz.0.2023.12.22.07.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 07:01:49 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Srinivas Kandagatla , Banajit Goswami , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Jaroslav Kysela , Takashi Iwai , linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Bartosz Golaszewski , Sean Anderson Subject: [PATCH 4/4] ASoC: codecs: wsa884x: Allow sharing reset GPIO Date: Fri, 22 Dec 2023 16:01:33 +0100 Message-Id: <20231222150133.732662-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> References: <20231222150133.732662-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On some boards with multiple WSA8840/WSA8845 speakers, the reset (shutdown) GPIO is shared between two speakers. Use the reset controller framework and its "reset-gpio" driver to handle this case. This allows bring-up and proper handling of all WSA884x speakers on X1E80100-CRD board. Cc: Bartosz Golaszewski Cc: Sean Anderson Signed-off-by: Krzysztof Kozlowski --- If previous patches are fine, then this commit is independent and could be taken via ASoC. --- sound/soc/codecs/wsa884x.c | 52 ++++++++++++++++++++++++++++++-------- 1 file changed, 42 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/wsa884x.c b/sound/soc/codecs/wsa884x.c index f2653df84e4a..49ae7712e6ef 100644 --- a/sound/soc/codecs/wsa884x.c +++ b/sound/soc/codecs/wsa884x.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -699,6 +700,7 @@ struct wsa884x_priv { struct sdw_stream_runtime *sruntime; struct sdw_port_config port_config[WSA884X_MAX_SWR_PORTS]; struct gpio_desc *sd_n; + struct reset_control *sd_reset; bool port_prepared[WSA884X_MAX_SWR_PORTS]; bool port_enable[WSA884X_MAX_SWR_PORTS]; unsigned int variant; @@ -1799,9 +1801,22 @@ static struct snd_soc_dai_driver wsa884x_dais[] =3D { }, }; =20 -static void wsa884x_gpio_powerdown(void *data) +static void wsa884x_reset_powerdown(void *data) { - gpiod_direction_output(data, 1); + struct wsa884x_priv *wsa884x =3D data; + + if (wsa884x->sd_reset) + reset_control_assert(wsa884x->sd_reset); + else + gpiod_direction_output(wsa884x->sd_n, 1); +} + +static void wsa884x_reset_deassert(struct wsa884x_priv *wsa884x) +{ + if (wsa884x->sd_reset) + reset_control_deassert(wsa884x->sd_reset); + else + gpiod_direction_output(wsa884x->sd_n, 0); } =20 static void wsa884x_regulator_disable(void *data) @@ -1809,6 +1824,26 @@ static void wsa884x_regulator_disable(void *data) regulator_bulk_disable(WSA884X_SUPPLIES_NUM, data); } =20 +static int wsa884x_get_reset(struct device *dev, struct wsa884x_priv *wsa8= 84x) +{ + wsa884x->sd_reset =3D devm_reset_control_get_optional_shared(dev, NULL); + if (IS_ERR(wsa884x->sd_reset)) + return dev_err_probe(dev, PTR_ERR(wsa884x->sd_reset), + "Failed to get reset\n"); + + /* + * Backwards compatible way for powerdown-gpios, does not handle + * sharing GPIO properly. + */ + wsa884x->sd_n =3D devm_gpiod_get_optional(dev, "powerdown", + GPIOD_OUT_HIGH); + if (IS_ERR(wsa884x->sd_n)) + return dev_err_probe(dev, PTR_ERR(wsa884x->sd_n), + "Shutdown Control GPIO not found\n"); + + return 0; +} + static int wsa884x_probe(struct sdw_slave *pdev, const struct sdw_device_id *id) { @@ -1838,11 +1873,9 @@ static int wsa884x_probe(struct sdw_slave *pdev, if (ret) return ret; =20 - wsa884x->sd_n =3D devm_gpiod_get_optional(dev, "powerdown", - GPIOD_OUT_HIGH); - if (IS_ERR(wsa884x->sd_n)) - return dev_err_probe(dev, PTR_ERR(wsa884x->sd_n), - "Shutdown Control GPIO not found\n"); + ret =3D wsa884x_get_reset(dev, wsa884x); + if (ret) + return ret; =20 dev_set_drvdata(dev, wsa884x); wsa884x->slave =3D pdev; @@ -1858,9 +1891,8 @@ static int wsa884x_probe(struct sdw_slave *pdev, pdev->prop.sink_dpn_prop =3D wsa884x_sink_dpn_prop; pdev->prop.scp_int1_mask =3D SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; =20 - /* Bring out of reset */ - gpiod_direction_output(wsa884x->sd_n, 0); - ret =3D devm_add_action_or_reset(dev, wsa884x_gpio_powerdown, wsa884x->sd= _n); + wsa884x_reset_deassert(wsa884x); + ret =3D devm_add_action_or_reset(dev, wsa884x_reset_powerdown, wsa884x); if (ret) return ret; =20 --=20 2.34.1