From nobody Fri Sep 20 06:52:23 2024 Received: from mail-il1-f175.google.com (mail-il1-f175.google.com [209.85.166.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8805F4B5AD for ; Wed, 20 Dec 2023 23:55:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="RFbvA5Xq" Received: by mail-il1-f175.google.com with SMTP id e9e14a558f8ab-35fceb46c5fso672935ab.0 for ; Wed, 20 Dec 2023 15:55:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116508; x=1703721308; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J4PHO7Jw/IWJrb0Mf1SLe4BFSupAlBrmRHdwYgRla00=; b=RFbvA5XqAwcl+y2f/yvdDqW4T70wVF4nPS/ukZQErT+rodUh9LH/azDIrv5siBKYnp 0aIbFWPqjYZBjOWWydoyQTT7Y0ocsxLXC3J1rmZ6xebUMXDiUOYu3oKJRggCll2e6cJ7 /zGPXZCH/b3SsQMO7NK639rk79lMl4Ao0Nd9U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116508; x=1703721308; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J4PHO7Jw/IWJrb0Mf1SLe4BFSupAlBrmRHdwYgRla00=; b=TMbYPB2yd38YH8ie8l4BR9wH2ZPFEMQTKP9jld6bmvvI4ENYcUCZYyF1mJ+ziT4xjL 6GO5wKrzHs6e7bCLFUg/AelltK9bmqL9tNSGLBcRCz3+iuK6xuVkviGUWIJKbdueRenv nwXhekqfrdlE6A10CvPp14sMK2llmJ8CmeKvyw+J/zsWnAmmnGp8fRo0kHdfI/B6Rc35 DVpYtjRZp6yS/rHlyWkTlAzFgLWakC26+0mn1zUFHjRKMzoLNbL64C4cSCO6cMI/KGLk LK2LURoNJtDesxRgL/be73913gWG3nxWHuYSI8yhRSu3TmyUNuqlh40p9FiVcVY53dLC LtAw== X-Gm-Message-State: AOJu0YwOQNGWcQIxgELaakfkmASmi8tMPfSd3MrN6REkr0tc3f4KaWfc OjOccoIWBuhbsKQEO0pEC18PQ8XwIlMYE2dqVvBcUBSHlYGb X-Google-Smtp-Source: AGHT+IH2lTPGo2WEeRiZiIJrzCSOk2a8rUTZziZgBwUnQ/vrtMNeRF1WZyCgr0C+c1ZFnu0ife2BGw== X-Received: by 2002:a05:6e02:154d:b0:35d:59b3:2f87 with SMTP id j13-20020a056e02154d00b0035d59b32f87mr2865766ilu.28.1703116508461; Wed, 20 Dec 2023 15:55:08 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:08 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Andy Shevchenko , Bartosz Golaszewski , Len Brown , Linus Walleij , Mika Westerberg , "Rafael J. Wysocki" , Wolfram Sang , linux-acpi@vger.kernel.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH v2 01/22] gpiolib: acpi: Modify acpi_dev_irq_wake_get_by() to use resource Date: Wed, 20 Dec 2023 16:54:15 -0700 Message-ID: <20231220165423.v2.1.Ifd0903f1c351e84376d71dbdadbd43931197f5ea@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Other information besides wake capability can be provided about GPIO IRQs such as triggering, polarity, and sharability. Use resource flags to provide this information to the caller if they want it. This should keep the API more robust over time as flags are added, modified, or removed. It also more closely matches acpi_irq_get() which take a resource as an argument. Rename the function to acpi_dev_get_gpio_irq_resource() to better describe the function's new behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Remove explicit cast to struct resource -irq -> IRQ drivers/gpio/gpiolib-acpi.c | 25 ++++++++++++++++--------- drivers/i2c/i2c-core-acpi.c | 10 ++++++++-- include/linux/acpi.h | 23 ++++++++++------------- 3 files changed, 34 insertions(+), 24 deletions(-) diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c index 88066826d8e5b..ef98b50f42f86 100644 --- a/drivers/gpio/gpiolib-acpi.c +++ b/drivers/gpio/gpiolib-acpi.c @@ -111,6 +111,7 @@ struct acpi_gpio_info { int polarity; int triggering; bool wake_capable; + bool shareable; unsigned int debounce; unsigned int quirks; }; @@ -760,6 +761,7 @@ static int acpi_populate_gpio_lookup(struct acpi_resour= ce *ares, void *data) lookup->info.debounce =3D agpio->debounce_timeout; lookup->info.gpioint =3D gpioint; lookup->info.wake_capable =3D acpi_gpio_irq_is_wake(&lookup->info.adev->= dev, agpio); + lookup->info.shareable =3D agpio->shareable =3D=3D ACPI_SHARED; =20 /* * Polarity and triggering are only specified for GpioInt @@ -1004,11 +1006,11 @@ struct gpio_desc *acpi_find_gpio(struct fwnode_hand= le *fwnode, } =20 /** - * acpi_dev_gpio_irq_wake_get_by() - Find GpioInt and translate it to Linu= x IRQ number + * acpi_dev_get_gpio_irq_resource() - Find GpioInt and populate resource s= truct * @adev: pointer to a ACPI device to get IRQ from * @name: optional name of GpioInt resource * @index: index of GpioInt resource (starting from %0) - * @wake_capable: Set to true if the IRQ is wake capable + * @r: pointer to resource to populate with IRQ information. * * If the device has one or more GpioInt resources, this function can be * used to translate from the GPIO offset in the resource to the Linux IRQ @@ -1023,10 +1025,12 @@ struct gpio_desc *acpi_find_gpio(struct fwnode_hand= le *fwnode, * The GPIO is considered wake capable if the GpioInt resource specifies * SharedAndWake or ExclusiveAndWake. * - * Return: Linux IRQ number (> %0) on success, negative errno on failure. + * IRQ number will be available in the resource structure. + * + * Return: 0 on success, negative errno on failure. */ -int acpi_dev_gpio_irq_wake_get_by(struct acpi_device *adev, const char *na= me, int index, - bool *wake_capable) +int acpi_dev_get_gpio_irq_resource(struct acpi_device *adev, const char *n= ame, int index, + struct resource *r) { int idx, i; unsigned int irq_flags; @@ -1084,16 +1088,19 @@ int acpi_dev_gpio_irq_wake_get_by(struct acpi_devic= e *adev, const char *name, in } =20 /* avoid suspend issues with GPIOs when systems are using S3 */ - if (wake_capable && acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) - *wake_capable =3D info.wake_capable; + if (info.wake_capable && !(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0= )) + info.wake_capable =3D false; =20 - return irq; + *r =3D DEFINE_RES_IRQ(irq); + r->flags =3D acpi_dev_irq_flags(info.triggering, info.polarity, + info.shareable, info.wake_capable); + return 0; } =20 } return -ENOENT; } -EXPORT_SYMBOL_GPL(acpi_dev_gpio_irq_wake_get_by); +EXPORT_SYMBOL_GPL(acpi_dev_get_gpio_irq_resource); =20 static acpi_status acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, diff --git a/drivers/i2c/i2c-core-acpi.c b/drivers/i2c/i2c-core-acpi.c index d6037a3286690..8126a87baf3d4 100644 --- a/drivers/i2c/i2c-core-acpi.c +++ b/drivers/i2c/i2c-core-acpi.c @@ -203,6 +203,7 @@ int i2c_acpi_get_irq(struct i2c_client *client, bool *w= ake_capable) { struct acpi_device *adev =3D ACPI_COMPANION(&client->dev); struct list_head resource_list; + struct resource irqres; struct i2c_acpi_irq_context irq_ctx =3D { .irq =3D -ENOENT, }; @@ -217,8 +218,13 @@ int i2c_acpi_get_irq(struct i2c_client *client, bool *= wake_capable) =20 acpi_dev_free_resource_list(&resource_list); =20 - if (irq_ctx.irq =3D=3D -ENOENT) - irq_ctx.irq =3D acpi_dev_gpio_irq_wake_get(adev, 0, &irq_ctx.wake_capabl= e); + if (irq_ctx.irq =3D=3D -ENOENT) { + ret =3D acpi_dev_get_gpio_irq_resource(adev, NULL, 0, &irqres); + if (ret) + return ret; + irq_ctx.irq =3D irqres.start; + irq_ctx.wake_capable =3D irqres.flags & IORESOURCE_IRQ_WAKECAPABLE; + } =20 if (irq_ctx.irq < 0) return irq_ctx.irq; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 118a18b7ff844..83aa2fa8e81fc 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1221,8 +1221,8 @@ bool acpi_gpio_get_irq_resource(struct acpi_resource = *ares, struct acpi_resource_gpio **agpio); bool acpi_gpio_get_io_resource(struct acpi_resource *ares, struct acpi_resource_gpio **agpio); -int acpi_dev_gpio_irq_wake_get_by(struct acpi_device *adev, const char *na= me, int index, - bool *wake_capable); +int acpi_dev_get_gpio_irq_resource(struct acpi_device *adev, const char *n= ame, int index, + struct resource *r); #else static inline bool acpi_gpio_get_irq_resource(struct acpi_resource *ares, struct acpi_resource_gpio **agpio) @@ -1234,28 +1234,25 @@ static inline bool acpi_gpio_get_io_resource(struct= acpi_resource *ares, { return false; } -static inline int acpi_dev_gpio_irq_wake_get_by(struct acpi_device *adev, = const char *name, - int index, bool *wake_capable) +static inline int acpi_dev_get_gpio_irq_resource(struct acpi_device *adev,= const char *name, + int index, struct resource *r) { return -ENXIO; } #endif =20 -static inline int acpi_dev_gpio_irq_wake_get(struct acpi_device *adev, int= index, - bool *wake_capable) +static inline int acpi_dev_gpio_irq_get_by(struct acpi_device *adev, const= char *name, int index) { - return acpi_dev_gpio_irq_wake_get_by(adev, NULL, index, wake_capable); -} + struct resource r; + int ret; =20 -static inline int acpi_dev_gpio_irq_get_by(struct acpi_device *adev, const= char *name, - int index) -{ - return acpi_dev_gpio_irq_wake_get_by(adev, name, index, NULL); + ret =3D acpi_dev_get_gpio_irq_resource(adev, name, index, &r); + return ret ?: r.start; } =20 static inline int acpi_dev_gpio_irq_get(struct acpi_device *adev, int inde= x) { - return acpi_dev_gpio_irq_wake_get_by(adev, NULL, index, NULL); + return acpi_dev_gpio_irq_get_by(adev, NULL, index); } =20 /* Device properties */ --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f41.google.com (mail-io1-f41.google.com [209.85.166.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AD4D4B5C3 for ; Wed, 20 Dec 2023 23:55:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; 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[71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:09 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Mika Westerberg , Wolfram Sang , linux-acpi@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH v2 02/22] i2c: acpi: Modify i2c_acpi_get_irq() to use resource Date: Wed, 20 Dec 2023 16:54:16 -0700 Message-ID: <20231220165423.v2.2.Ib65096357993ff602e7dd0000dd59a36571c48d8@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The i2c_acpi_irq_context structure provides redundant information that can be provided with struct resource. Refactor i2c_acpi_get_irq() to use struct resource instead of struct i2c_acpi_irq_context. Signed-off-by: Mark Hasemeyer Suggested-by? --- Changes in v2: -New patch drivers/i2c/i2c-core-acpi.c | 44 ++++++++++++++----------------------- drivers/i2c/i2c-core-base.c | 6 ++--- drivers/i2c/i2c-core.h | 4 ++-- 3 files changed, 22 insertions(+), 32 deletions(-) diff --git a/drivers/i2c/i2c-core-acpi.c b/drivers/i2c/i2c-core-acpi.c index 8126a87baf3d4..01cf140da21af 100644 --- a/drivers/i2c/i2c-core-acpi.c +++ b/drivers/i2c/i2c-core-acpi.c @@ -175,64 +175,54 @@ static int i2c_acpi_do_lookup(struct acpi_device *ade= v, =20 static int i2c_acpi_add_irq_resource(struct acpi_resource *ares, void *dat= a) { - struct i2c_acpi_irq_context *irq_ctx =3D data; - struct resource r; + struct resource *r =3D data; =20 - if (irq_ctx->irq > 0) + if (r->start > 0) return 1; =20 - if (!acpi_dev_resource_interrupt(ares, 0, &r)) + if (!acpi_dev_resource_interrupt(ares, 0, r)) return 1; =20 - irq_ctx->irq =3D i2c_dev_irq_from_resources(&r, 1); - irq_ctx->wake_capable =3D r.flags & IORESOURCE_IRQ_WAKECAPABLE; + i2c_dev_irq_from_resources(r, 1); =20 return 1; /* No need to add resource to the list */ } =20 /** - * i2c_acpi_get_irq - get device IRQ number from ACPI + * i2c_acpi_get_irq - get device IRQ number from ACPI and populate resource * @client: Pointer to the I2C client device - * @wake_capable: Set to true if the IRQ is wake capable + * @r: resource with populated IRQ information * * Find the IRQ number used by a specific client device. * * Return: The IRQ number or an error code. */ -int i2c_acpi_get_irq(struct i2c_client *client, bool *wake_capable) +int i2c_acpi_get_irq(struct i2c_client *client, struct resource *r) { struct acpi_device *adev =3D ACPI_COMPANION(&client->dev); struct list_head resource_list; - struct resource irqres; - struct i2c_acpi_irq_context irq_ctx =3D { - .irq =3D -ENOENT, - }; int ret; =20 + if (IS_ERR_OR_NULL(r)) + return -EINVAL; + INIT_LIST_HEAD(&resource_list); =20 ret =3D acpi_dev_get_resources(adev, &resource_list, - i2c_acpi_add_irq_resource, &irq_ctx); + i2c_acpi_add_irq_resource, r); if (ret < 0) return ret; =20 acpi_dev_free_resource_list(&resource_list); =20 - if (irq_ctx.irq =3D=3D -ENOENT) { - ret =3D acpi_dev_get_gpio_irq_resource(adev, NULL, 0, &irqres); - if (ret) - return ret; - irq_ctx.irq =3D irqres.start; - irq_ctx.wake_capable =3D irqres.flags & IORESOURCE_IRQ_WAKECAPABLE; - } - - if (irq_ctx.irq < 0) - return irq_ctx.irq; + if (r->start > 0) + return r->start; =20 - if (wake_capable) - *wake_capable =3D irq_ctx.wake_capable; + ret =3D acpi_dev_get_gpio_irq_resource(adev, NULL, 0, r); + if (!ret) + return r->start; =20 - return irq_ctx.irq; + return ret; } =20 static int i2c_acpi_get_info(struct acpi_device *adev, diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index 3bd48d4b6318f..8b8c7581a60c2 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c @@ -513,10 +513,10 @@ static int i2c_device_probe(struct device *dev) if (irq =3D=3D -EINVAL || irq =3D=3D -ENODATA) irq =3D of_irq_get(dev->of_node, 0); } else if (ACPI_COMPANION(dev)) { - bool wake_capable; + struct resource r =3D {0}; =20 - irq =3D i2c_acpi_get_irq(client, &wake_capable); - if (irq > 0 && wake_capable) + irq =3D i2c_acpi_get_irq(client, &r); + if (irq > 0 && r.flags & IORESOURCE_IRQ_WAKECAPABLE) client->flags |=3D I2C_CLIENT_WAKE; } if (irq =3D=3D -EPROBE_DEFER) { diff --git a/drivers/i2c/i2c-core.h b/drivers/i2c/i2c-core.h index 05b8b8dfa9bdd..b5dc559c49d11 100644 --- a/drivers/i2c/i2c-core.h +++ b/drivers/i2c/i2c-core.h @@ -61,11 +61,11 @@ static inline int __i2c_check_suspended(struct i2c_adap= ter *adap) #ifdef CONFIG_ACPI void i2c_acpi_register_devices(struct i2c_adapter *adap); =20 -int i2c_acpi_get_irq(struct i2c_client *client, bool *wake_capable); +int i2c_acpi_get_irq(struct i2c_client *client, struct resource *r); #else /* CONFIG_ACPI */ static inline void i2c_acpi_register_devices(struct i2c_adapter *adap) { } =20 -static inline int i2c_acpi_get_irq(struct i2c_client *client, bool *wake_c= apable) +static inline int i2c_acpi_get_irq(struct i2c_client *client, struct resou= rce *r) { return 0; } --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f48.google.com (mail-io1-f48.google.com [209.85.166.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 510124B5CA for ; Wed, 20 Dec 2023 23:55:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="UoatwZ4i" Received: by mail-io1-f48.google.com with SMTP id ca18e2360f4ac-7b798e6f702so8431739f.2 for ; Wed, 20 Dec 2023 15:55:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116510; x=1703721310; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; 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[71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:09 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 03/22] Documentation: devicetree: Clarify wording for wakeup-source property Date: Wed, 20 Dec 2023 16:54:17 -0700 Message-ID: <20231220165423.v2.3.I1016a45ac9e8daf8a9ebc9854ab90ec3542e7c30@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The wording in the current documentation is a little strong. The intention was not to fix any particular interrupt as wakeup capable but leave those details to the device. It wasn't intended to enforce any rules as what can be or can't be a wakeup interrupt. Soften the wording to not mandate that the 'wakeup-source' property be used, and clarify what it means when an interrupt is marked (or not marked) for wakeup. Link: https://lore.kernel.org/all/ZYAjxxHcCOgDVMTQ@bogus/ Link: https://lore.kernel.org/all/CAL_Jsq+MYwOG40X26cYmO9EkZ9xqWrXDi03MaRfx= nV-+VGkXWQ@mail.gmail.com/ Signed-off-by: Mark Hasemeyer --- Changes in v2: -New patch .../bindings/power/wakeup-source.txt | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/power/wakeup-source.txt b/Do= cumentation/devicetree/bindings/power/wakeup-source.txt index 697333a56d5e2..75bc20b95688f 100644 --- a/Documentation/devicetree/bindings/power/wakeup-source.txt +++ b/Documentation/devicetree/bindings/power/wakeup-source.txt @@ -3,16 +3,20 @@ Specifying wakeup capability for devices =20 Any device nodes ---------------- -Nodes that describe devices which has wakeup capability must contain an +Nodes that describe devices which have wakeup capability may contain a "wakeup-source" boolean property. =20 -Also, if device is marked as a wakeup source, then all the primary -interrupt(s) can be used as wakeup interrupt(s). +If the device is marked as a wakeup-source, interrupt wake capability depe= nds +on the device specific "interrupt-names" property. If no interrupts are la= beled +as wake capable, then it is up to the device to determine which interrupts= can +wake the system. =20 -However if the devices have dedicated interrupt as the wakeup source -then they need to specify/identify the same using device specific -interrupt name. In such cases only that interrupt can be used as wakeup -interrupt. +However if a device has a dedicated interrupt as the wakeup source, then it +needs to specify/identify it using a device specific interrupt name. In su= ch +cases only that interrupt can be used as a wakeup interrupt. + +While various legacy interrupt names exist, new devices should use "wakeup= " as +the canonical interrupt name. =20 List of legacy properties and respective binding document --------------------------------------------------------- --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f52.google.com (mail-io1-f52.google.com [209.85.166.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72B784BAA6 for ; Wed, 20 Dec 2023 23:55:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="eXZNoUFY" Received: by mail-io1-f52.google.com with SMTP id ca18e2360f4ac-7b71e389fb2so9045539f.3 for ; Wed, 20 Dec 2023 15:55:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116511; x=1703721311; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=moVzHQYgk23qLvXFemqZkcgdvSUVJ85XUZMZayldchU=; b=eXZNoUFY5kGrDYszgBwIu+A0GPgmLRnEfb7PwYqw4ReaovROvnrJhwCdzSnZ4dSh4f MGempUz1PI4sZCdPzea8dLWFFpyM28LrhOX++nD3tzy03trbJDXFEcfbXMuTuaGC8EUL 1mA2QDFy0GojmZdaEB3V50Z0RIHfPhqscz0k8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116511; x=1703721311; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=moVzHQYgk23qLvXFemqZkcgdvSUVJ85XUZMZayldchU=; b=ooQpIZy1EhDfRHmDzDuUoUthD0kPCe0/PmEMYwYZcFY2spGbGWg3BQ9TLXZn54CWFd c7XgiwG0yzc7BeRQ+7OrmJvNAsMaJM5ygkqP1q7BoEN3/sev0v4uO8oTNeld0K3Do+Nx Jr415GpSxDRQy7xyEfgwPbtjhgwdxTfHzPzs0O5/UcQ42CKVpOH2LaNzUXflnPCoZPu/ aTZS3L8qvEJN+BfLtHMfSPI1Ec5f9sW6jj4urAIp5ejTcxuLxtSku/XIbGq4B0Gx+3qf Y9f/qKvnpJFiTmiO01S7PFIEZLZ1pos3o5V18kdmLSYvYIvb4y9rWCP+Kh4+53Y8dhar 3FLw== X-Gm-Message-State: AOJu0Ywj9YCub84Lfrpgo2MVauzmStlZXsOLeTmdhPmJGLI7rLhAC5rd y6fEDcXPNoEzoqU5cuPU6Jy+eGhkBXiOfJ2k6ttcfQ== X-Google-Smtp-Source: AGHT+IHIYrjffUfU5PYl/Gof5mJUZa0K5TBE1VO+JQ9wu0i35S3zZy6iTiKsMWq0lfhMRfiZfNNpMQ== X-Received: by 2002:a6b:6e13:0:b0:7b7:f3f2:9a97 with SMTP id d19-20020a6b6e13000000b007b7f3f29a97mr3933437ioh.26.1703116511607; Wed, 20 Dec 2023 15:55:11 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:11 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Andre Przywara , Conor Dooley , Enric Balletbo i Serra , Jesper Nilsson , Jisheng Zhang , Jonathan Hunter , Krzysztof Kozlowski , Kunihiko Hayashi , Patrice Chotard , Rob Herring , Romain Perier , Thierry Reding , Wei Xu , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 04/22] ARM: dts: tegra: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:18 -0700 Message-ID: <20231220165423.v2.4.Ia598792a1386cca61844068be03c3ccec9e81753@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi | 1 + arch/arm/boot/dts/nvidia/tegra124-venice2.dts | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi b/arch/arm/boot/dt= s/nvidia/tegra124-nyan.dtsi index a2ee371802004..8125c1b3e8d79 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi @@ -338,6 +338,7 @@ cros_ec: cros-ec@0 { interrupt-parent =3D <&gpio>; interrupts =3D ; reg =3D <0>; + wakeup-source; =20 google,cros-ec-spi-msg-delay =3D <2000>; =20 diff --git a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts b/arch/arm/boot/= dts/nvidia/tegra124-venice2.dts index 3924ee385dee0..df98dc2a67b85 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts @@ -857,6 +857,7 @@ cros_ec: cros-ec@0 { interrupt-parent =3D <&gpio>; interrupts =3D ; reg =3D <0>; + wakeup-source; =20 google,cros-ec-spi-msg-delay =3D <2000>; =20 --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f47.google.com (mail-io1-f47.google.com [209.85.166.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F8024C3D6 for ; Wed, 20 Dec 2023 23:55:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="lJNijnIQ" Received: by mail-io1-f47.google.com with SMTP id ca18e2360f4ac-7b7fdde8b54so8829139f.1 for ; Wed, 20 Dec 2023 15:55:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116512; x=1703721312; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uCBYuSyv1htu4Z4UMY79JiCUyFE6xNOmu0NfxL7CL1o=; b=lJNijnIQqt6zUOSl4xal2gPN3JSGaAbShE86eaxXK1s+pzdkYO0ADji40tV9EEDyhB cbggHELnV5v2dCBlhDHg59hxqkWBMYigXmnoBJ35sFb6X5zqS2ywNsOeRDarxXec7355 qBIoEaeYpAZ2TijzBss38xJOkYZWAmiR1NxME= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116512; x=1703721312; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uCBYuSyv1htu4Z4UMY79JiCUyFE6xNOmu0NfxL7CL1o=; b=FLzDrhEdHvgI0HJfhExkLCkBUufBjo40onjX83R3Dql/iiPijTTEQhEayn3XyfU1kD Vv5wvtfq9dP2wfOGXIdS0FQRyl2y8WYuqYADmwo0lkM9loCVKZ/Fa0oDEjY+zTU2Svm7 5ZTYOaC7o3e2e9X6rPHYyySUHeuZHyVSaVnirk76mA1x72mpw9H73liGDcmYPPjeAg62 Uan/S7hoVJcwQJqFdYSg2ek+BuVflWn2baNn2MhxJ/yo6CWT4eI7g5jQikT7lLoL8fGD ddK7k53KWDB5rPIyGVNomhrItckFB8SaPifZ5KDPsprpinJ4ORoQWBJ+G+/7V1Akvv0D ERJw== X-Gm-Message-State: AOJu0Yyl0k2g7l2r8i5E+WFSCBmjGmIiRQuqJsVkmN4Hts6imyI936ur OYvk7OtYjCEOo4ifrY4useg0q6hQuyeKiw4TgEs= X-Google-Smtp-Source: AGHT+IHSg3mJJWavfesm2hpmBZ0S+/Z6QyumQes9iV9E7AinPPpe4ysdoPMdMc1c/Ob/o7mRjGp4Kg== X-Received: by 2002:a6b:c8c8:0:b0:7b7:f971:8e75 with SMTP id y191-20020a6bc8c8000000b007b7f9718e75mr3226475iof.12.1703116512588; Wed, 20 Dec 2023 15:55:12 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:12 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 05/22] ARM: dts: rockchip: rk3288: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:19 -0700 Message-ID: <20231220165423.v2.5.I8249df4df0b7d12fb68ea1e69f84ca589c574bb1@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi b/arc= h/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi index 092316be67f74..1554fe36e60fe 100644 --- a/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi @@ -112,6 +112,7 @@ cros_ec: ec@0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&ec_int>; spi-max-frequency =3D <3000000>; + wakeup-source; =20 i2c_tunnel: i2c-tunnel { compatible =3D "google,cros-ec-i2c-tunnel"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f50.google.com (mail-io1-f50.google.com [209.85.166.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FF364CB20 for ; Wed, 20 Dec 2023 23:55:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="c1Or9FTp" Received: by mail-io1-f50.google.com with SMTP id ca18e2360f4ac-7b7fdde8b98so9328439f.1 for ; Wed, 20 Dec 2023 15:55:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116513; x=1703721313; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kZeDaLYJRo5zLa/L/bxhfuH9rT1XYjT6TiTC8Trsii8=; b=c1Or9FTptFd/J14gVUcRsVlsmwGZznif5GSbnzqdbbWzayd7SAhmqVt2uaXSZonXOx ba4XBfFBsDD78bhinCkcL+TLH+e4wiIjDAdbqu1xE/cZIpnfiMJusBnEnnU2z+IFoLDI JjH8vntTQsG0nx+LY68xNe+s/QtB5MdLnSkR0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116513; x=1703721313; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kZeDaLYJRo5zLa/L/bxhfuH9rT1XYjT6TiTC8Trsii8=; b=expDY0UPXTEzg7zlVNnXVeITeICqWfN8lfTcHghGSVwyrZISpKd5+EDnMoEzIT07Kl qv2Ly+cXQ8ZeqUr0Mh2+opRArzJL2WW+/Gil/FIHsUUvHbcNwqo9XM7tfsqPfZdRo4ni sQj4vRzd+GBZ8+B3ea54k2xF/4Z03C84TxHWVRde4X8KY20L+83JHrwdju8hNlDOwFC0 aL/9Ko11CcoF0/AyYJDvQkF8GkJlWyyqemICFdemalykVT3C1J1Xg5QHuT914yW3GYQt 9yW+ZM1t7Hi7HI8K46qCe+OsmdSKiPEWep+QkYkMCVbAj/AviWbXrGbi/D9Hsxgawc7n ZsyQ== X-Gm-Message-State: AOJu0YzQ+KBOFE++LplSyqqcgUItK3d3Qwhbu2w3+TgBKOT7TYlWG7R5 z6IOr5o2UdILFPwvwtbeAAtRKbegbIeYSK5Dcvc= X-Google-Smtp-Source: AGHT+IEk8m96lV9iBV0InAWBCJf8FPF2Hlzn006lTcKeoi8vAPlF6SmDvyTGDOc2BbQymmk/iA/zow== X-Received: by 2002:a6b:c417:0:b0:7b7:d807:42bb with SMTP id y23-20020a6bc417000000b007b7d80742bbmr5876797ioa.41.1703116513408; Wed, 20 Dec 2023 15:55:13 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:13 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Alim Akhtar , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 06/22] ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:20 -0700 Message-ID: <20231220165423.v2.6.I06b059021de1bf6103e60a73211f078f2af75d17@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts b/arch/arm/= boot/dts/samsung/exynos5420-peach-pit.dts index 4e757b6e28e1c..3759742d38cac 100644 --- a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts @@ -967,6 +967,7 @@ cros_ec: cros-ec@0 { reg =3D <0>; spi-max-frequency =3D <3125000>; google,has-vbc-nvram; + wakeup-source; =20 controller-data { samsung,spi-feedback-delay =3D <1>; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f53.google.com (mail-io1-f53.google.com [209.85.166.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 416274CB55 for ; Wed, 20 Dec 2023 23:55:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="jY0oCY2Q" Received: by mail-io1-f53.google.com with SMTP id ca18e2360f4ac-7b7f6caf047so7178939f.3 for ; Wed, 20 Dec 2023 15:55:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116514; x=1703721314; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=06i8yMe3unqllEnKE3Q0g5bmBjz7Qwg6DF0FrSTHOkw=; b=jY0oCY2QW6zKPDJqJpJOqXHd3PRfdue/GA6fECqXaBquJjPXOnp2KG3IDeRaDEOqcA 0LUz1TlyIn7Kl2GW4tyaE7Zt/ZQx8F6LYees8joXLw4CthNDOQ+wn5+xuf5HZ2Hr3+G4 oL0/U9/1YLZH4UlA2l4CkVqPxDv7pASHgwNzo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116514; x=1703721314; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=06i8yMe3unqllEnKE3Q0g5bmBjz7Qwg6DF0FrSTHOkw=; b=qG0N5AKcgNG6y03anHY+II0VMYSYHuC8smLA14Q0qHmlUI9ALBxkrL0Z48q4jEdLY7 lgxmVwIZrJpv8tR9WsWK4vaQZPrbBLvIXMhfNuVyYaMJJ1iAsr8xIGyRLUhj8UkHUYOm fhvy3zEdxdWqVEbawvoNgSJLcaaJ8RLGY24UCHnzYmKgDA/YHUw4SSRHkCtxrZiDKt4S XkEFI0MmH9OZ0JaxIAEi0r7W6WbvBpN25dGu7ZiS961puKLAF5sYivoxyeIWtj6EujLY 771EAaFDjgfCLeKcrdVMbv2uvl6OwocDz7tCPBQKjKqPn6v4tXi058NECrTaNu5xf8aw kfiQ== X-Gm-Message-State: AOJu0YwW6DdoLt2ljawPCvT1jVYiyPXSSm0xmeDsEX+mQFiG1sLBfE0D MOCZfnc2o2lyd6NROkaUmI+9Y3kCfoaRPqDzXIc= X-Google-Smtp-Source: AGHT+IFtNsaq0EzBRu4Ew+8zNVmj75dDLgrwZJJB/sP75mn6dWM7HXO8w8QE3J+d103cQRFMUtPPIw== X-Received: by 2002:a5e:8b0d:0:b0:7ba:7de5:609f with SMTP id g13-20020a5e8b0d000000b007ba7de5609fmr1200517iok.38.1703116514370; Wed, 20 Dec 2023 15:55:14 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:14 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Alim Akhtar , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 07/22] ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:21 -0700 Message-ID: <20231220165423.v2.7.Idc995ce08a52ba4c5fde0685118ddf2873fc8acd@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts b/arch/arm/b= oot/dts/samsung/exynos5800-peach-pi.dts index f91bc4ae008e4..9bbbdce9103a6 100644 --- a/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts @@ -949,6 +949,7 @@ cros_ec: cros-ec@0 { reg =3D <0>; spi-max-frequency =3D <3125000>; google,has-vbc-nvram; + wakeup-source; =20 controller-data { samsung,spi-feedback-delay =3D <1>; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f54.google.com (mail-io1-f54.google.com [209.85.166.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CD984CDF5 for ; Wed, 20 Dec 2023 23:55:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="N1G5a8Pl" Received: by mail-io1-f54.google.com with SMTP id ca18e2360f4ac-7b7d55d7717so8989839f.2 for ; Wed, 20 Dec 2023 15:55:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116515; x=1703721315; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2yCVu6I1r+NRnz/AsvfCkzFQXXECY+E6K5qe+5haxTA=; b=N1G5a8Pl6WrTyomiUFQijWqyUJclivXFLDPuqXUm1qGjwe+tpjlB3yKLug1SDEc481 ADx1NDpa75czkVpX3jeLVK/8eqImK6UPIDc2k/8AsjZFtpaB8iT2SZsy6wBWt2rFpCSU bciLHt3/DKcpYfASHnvExdxyJRjgqbRah13cE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116515; x=1703721315; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2yCVu6I1r+NRnz/AsvfCkzFQXXECY+E6K5qe+5haxTA=; b=sFSQwkXnIYbmyCZwVX1MDUBNHEvyVJDih978z36DlJtTFAA8Mh7czjR3RNyUpzCjkX Qscgti2/Dsd2m9Z+8WVBoy+lUz/bK64YRIrDQvDOLYfpg71brSUWtdvE/valuAwOtWBq I3dIitHGQkM/fVeepJMmjZ422qCpr/tgfZw3ScgwZrDBRTp3KnjNfVG3bTnNFoe0QfGu Y4rbJjrzeEFnJibmoF9nFqsSciY6F7H8oT/M92PPRpTL27cMozBal5EkQNFL+zHR+Oea Nta1OaMdVYaXGmNIdBAZh86GE86SC//JgD8neCdIC6cc+VF4iIAhMP8j0b+cEa9G3BEd aYRw== X-Gm-Message-State: AOJu0YxcYpfN9CTHBTHdrUBXJosAWadvaKrNghwshpMuCBW66egF+wjv tapITlzJR/R/a+Ped6uYKSBeCnJQSaforQXuihU= X-Google-Smtp-Source: AGHT+IGQS9ViCfOP9DV0BcBpVda4PiMnNXFrq7RZGrtBIBlYRUtl6txSB+SASJAG9M8UOIfTNMd85Q== X-Received: by 2002:a5e:de46:0:b0:7ba:8b76:6f65 with SMTP id e6-20020a5ede46000000b007ba8b766f65mr67557ioq.9.1703116515275; Wed, 20 Dec 2023 15:55:15 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:14 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 08/22] arm64: dts: mediatek: mt8173: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:22 -0700 Message-ID: <20231220165423.v2.8.Ic09ebe116c18e83cc1161f4bb073fea8043f03f3@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot= /dts/mediatek/mt8173-elm.dtsi index 111495622cacd..190a3ffd81471 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -1163,6 +1163,7 @@ cros_ec: ec@0 { interrupt-parent =3D <&pio>; interrupts =3D <0 IRQ_TYPE_LEVEL_LOW>; google,cros-ec-spi-msg-delay =3D <500>; + wakeup-source; =20 i2c_tunnel: i2c-tunnel0 { compatible =3D "google,cros-ec-i2c-tunnel"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-il1-f180.google.com (mail-il1-f180.google.com [209.85.166.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 522194C630 for ; Wed, 20 Dec 2023 23:55:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="Qo9MLcsk" Received: by mail-il1-f180.google.com with SMTP id e9e14a558f8ab-35fc1a21f60so1140645ab.0 for ; Wed, 20 Dec 2023 15:55:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116516; x=1703721316; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+KIM4NQPVUw5XQPjNCJNZ+EzGM62sn2zFTK1BxHqm24=; b=Qo9MLcskKcLDqgh9ODct1NaD2Sm83R1IYP/VUPLNG60Que+2w2mQjLI1zD8+Ti7FjF N6i7dy/6b76Yj8dvZz926CCHAEuQ39jNWcZA4ON95pXdcop1JolsE+MRE9mfkWAi3Jje mcz+Ocl6PEDflBJrnzFUlYT/otX+dm5ztsUAM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116516; x=1703721316; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+KIM4NQPVUw5XQPjNCJNZ+EzGM62sn2zFTK1BxHqm24=; b=eieNPypqYWFSSSzktcbjwIqcjANOquMojZgwb1NgxU+nHo267n9UQLhLSbgDJ3yqDf PvgrcDnLHtbUhHpAhm4hHOU3TrQ6WWkX3oTTSxpo6Lx8FIdD844zSDDQ8nO4oSsb+WQx oZ3jICLuyKQIbDh/9C7surPEEjLbX+mXhz1ftKdvWicCbrWXUbMwBdHaCRNmItC9SNVe m2xXhBV1eAFn7HRlqtlyZuGIHrJyBUVLJpmVu8BZctxzRm73z76x+uS8m62BLQBLcRcW mBevwsp6TbFo8qbR8hpHiW230HtBVtBYnMeobYrOFMDRz46W0Own2gsEFImfbmp6u/PV VL8w== X-Gm-Message-State: AOJu0YyurzxkWKBhg14BsyyR9RknAXeglPfVWc3uEXilv2Mit/if1J4f KGDkdKZ6gWxkIVwIDtgw3GkIzbE5mupKlynNG3o= X-Google-Smtp-Source: AGHT+IE5Fh0GQqdpS6aUnNljRA1kzY4Iqpzlbmpa89jfkHQhQpYtqbFAles2BemXZpQUZLiye2NH/Q== X-Received: by 2002:a05:6e02:3205:b0:35f:7db1:3f9a with SMTP id cd5-20020a056e02320500b0035f7db13f9amr10498168ilb.34.1703116516382; Wed, 20 Dec 2023 15:55:16 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:15 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 09/22] arm64: dts: mediatek: mt8183: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:23 -0700 Message-ID: <20231220165423.v2.9.Iba4a8b7e908989e57f7838a80013a4062be5e614@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index 7881a27be0297..06cbf29d16215 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -922,6 +922,7 @@ cros_ec: cros-ec@0 { interrupts =3D <151 IRQ_TYPE_LEVEL_LOW>; pinctrl-names =3D "default"; pinctrl-0 =3D <&ec_ap_int_odl>; + wakeup-source; =20 i2c_tunnel: i2c-tunnel { compatible =3D "google,cros-ec-i2c-tunnel"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f44.google.com (mail-io1-f44.google.com [209.85.166.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 293134D585 for ; Wed, 20 Dec 2023 23:55:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="UNa404fI" Received: by mail-io1-f44.google.com with SMTP id ca18e2360f4ac-7b3708b3eacso8400339f.2 for ; Wed, 20 Dec 2023 15:55:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116517; x=1703721317; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MqwPaQqmenUw9eRcinVgTHm+ZDOG0CHY3aysuEWfhMk=; b=UNa404fIZzDDmWKdork9ZDgJDqQTFPke4qm1NHcs+1ya96f2EeSE5qngsLKy1/pvQs E9MarPSrXP4GFc92aPf4MUE5VjUXJuj348EnqGhiWhZZIYWvF9nSqR2HlX3HdR7Qo5QZ NaLK8HQmzxq1IQW9IfemCVxbOXZbCE8yenykY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116517; x=1703721317; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MqwPaQqmenUw9eRcinVgTHm+ZDOG0CHY3aysuEWfhMk=; b=khijlnJR4Nc65S0A2E7fLOGxRrupmEgdNDrG0Vmvi4o2p3PjyxJ4+4mwhqloRIhKHR eyCTCpRkjRAbPSkD+IdhRdfwdAkPYDofczDd9LLbRAG6UVLZm8LeX2HiP2EVVCxyF4wS xTsL2OMSVmh62Zt/BB3udbMsvCT/5fyagxsmhBIne+hVVeqx5Od+L0MsQN72dEef081h ij3SbS0UwJMgFN0dBHdxj+aT2Yq8hOCwEJlXT2w/ddiH5AzY0PN1mg+eSzMYzXdsK5xp FjFsUHcE7z0R9yrlnHIERbmceTSh0Ik4u+wOiWs5i5xuX4yWpYDNVGpwOU7wTPEtGDOA PgQw== X-Gm-Message-State: AOJu0YzLDm3BORG/FmwXnJi1BrGKN7ZEEFKRJ1FrSjr1wOQ7+s+OVc43 ++G0Xi/1mS+ofDHQYZOt/KhqVbMjj6/kPg8MJfo= X-Google-Smtp-Source: AGHT+IGMe/Z9RFCpmHfT3jd1XYj7esK25Q3besGk8XDKQEr5sJIDR1GLwrxSPfaU1Eltl1MnNPIZww== X-Received: by 2002:a5d:8c83:0:b0:7b7:fe6c:e6d3 with SMTP id g3-20020a5d8c83000000b007b7fe6ce6d3mr2659120ion.2.1703116517315; Wed, 20 Dec 2023 15:55:17 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:17 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 10/22] arm64: dts: mediatek: mt8192: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:24 -0700 Message-ID: <20231220165423.v2.10.Ibd330d26a00f5e219a7e448452769124833a9762@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index f2281250ac35d..ab44d382f757e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -1332,6 +1332,7 @@ cros_ec: ec@0 { spi-max-frequency =3D <3000000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&cros_ec_int>; + wakeup-source; =20 #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-il1-f173.google.com (mail-il1-f173.google.com [209.85.166.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EEF2A4D5AD for ; Wed, 20 Dec 2023 23:55:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="cqCgo5MJ" Received: by mail-il1-f173.google.com with SMTP id e9e14a558f8ab-35da160de2bso907215ab.1 for ; Wed, 20 Dec 2023 15:55:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116518; x=1703721318; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QGItW2tX+Z99WO9rLTZWRRLNJGNHjPVu0HpOP7a3OKs=; b=cqCgo5MJ+zQltH6gmsqAhQd4bBYDYD4ULm26qgJFLOYE+2YZbgxbNwmguh+wk27J02 DBvVHmleH5W96tR06KqERKOQcstAhANlSmRTntAYo/fd4lmNtzaNUGEsJCq0aTzALpfu pWLELdH++kpUjhZ/Y5H54SwLm4T9mCbemWhwg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116518; x=1703721318; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QGItW2tX+Z99WO9rLTZWRRLNJGNHjPVu0HpOP7a3OKs=; b=s7LxcEu4rZWLrL82KH3AY+sIi2MRm1F2PBOtMQ+9IWSUGz9l8xQ+qeb3d9KBADD50A nyU2ZkHfv6McARSxiNCDXjglc2IDVLOnIrbtqKFvcVLgnQuUFrjyMo/tieytR8pbN5/Y P369TB0OgcnSsnk31SM27iNPkhdc8z0NeqMiu2ltrg3kpWvP0A1g+8jyL/XKe0ZSorJH /MJXCvhzcTCclpC0N8w7HxN1UmMn56NCyovzXEPH4wJzZfbeJcbz0OpbGhGD/Y9t+BMf 16rCUVcHbuZbMq9bf9qdehttC4wHmxalqfhAWvvuviSwzc/37GAQNNWaobV6T3GanyTF 53gw== X-Gm-Message-State: AOJu0YzXeNZz3jCv2veB8GvxB5NWe+ysKgW/prJeXHQVoF4/QDv96Ddn Xx9oK7WMSuYtkT5ofo5RsfhVogA6gRxYy86sBXo= X-Google-Smtp-Source: AGHT+IEeTSi14BnWNyhDnJXCHg/iyGa81oQJSiNqZOmCD0hxTMyfI0gkwqEmm1ElucJzYwa6n9C2iA== X-Received: by 2002:a05:6e02:3892:b0:35f:b4ef:ff2d with SMTP id cn18-20020a056e02389200b0035fb4efff2dmr5733161ilb.18.1703116518133; Wed, 20 Dec 2023 15:55:18 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:17 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Krzysztof Kozlowski , Matthias Brugger , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 11/22] arm64: dts: mediatek: mt8195: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:25 -0700 Message-ID: <20231220165423.v2.11.Iee33a7f1f991408cef372744199026f936bf54e2@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 5a7cab489ff3a..4292b72566bcf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -1067,6 +1067,7 @@ cros_ec: ec@0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&cros_ec_int>; spi-max-frequency =3D <3000000>; + wakeup-source; =20 keyboard-backlight { compatible =3D "google,cros-kbd-led-backlight"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:23 2024 Received: from mail-io1-f54.google.com (mail-io1-f54.google.com [209.85.166.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED0444E1CB for ; Wed, 20 Dec 2023 23:55:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="PhzhskKt" Received: by mail-io1-f54.google.com with SMTP id ca18e2360f4ac-7b7f9fdc14dso12204939f.0 for ; Wed, 20 Dec 2023 15:55:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116519; x=1703721319; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NsTh8joUVqMg5ezobFr/U/KJPW/QvWwfP5qstPNIFW4=; b=PhzhskKtQnql6Cf6MBNgp3MbQUt4W7vUw1hDCxYygoVRAzjKYF7tudOUsnLhRQeOoX Uk0lpUNhqpkOvCrEwWpC0GZ/dUGxlAz8nVr+LBYGosS1kaittF95Nzz6OHoYpijigsUm 3gYfkyWL09zkUUJNCtl1TWpze0FGuSKQO0F/U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116519; x=1703721319; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NsTh8joUVqMg5ezobFr/U/KJPW/QvWwfP5qstPNIFW4=; b=gfZ07ACEPqWqMgGN3+nT48XKJe4suKR4z4trqKr89zYBTnWbFmuUtauxTZnp5Mdtmc 0n9dlACem99zyMNxhCkRGlNXL3zPC930u2dl6NunCycY1vHuSb3AdN6pVZsYZAYXq0RB iRfLLMnR94MP2WB812Rxte53Q9RneRslocGHr39u85zGTLA0IVru1goJzIkixbwVNn73 luB+rlaWvycs1f3FTEBfZKcn5+y9+10TpB2xrT55fkAbCfKFVpK2iw1a2dRq8jZ205SV mI878In5CGBSzUa39xXI+OupnGwIPsSh+2g7o0weSIN+G19mtVFLMDTNNn/ZWp1PK02Z JO/Q== X-Gm-Message-State: AOJu0YxXq+SYbBmFkjZwhuVJdovY7MnrnPsfx9vVb3C5acfOdfijAWum m08lg+/WTtlXKvhbwzmnW6zE69oANZGA608ACTQ= X-Google-Smtp-Source: AGHT+IHpd/hQAO+JzgPTfDrP8J99ho1LatjOhD+y+1pzGqV1gGpidEZh0CuNI5ZEZbQoXBE9btwq6A== X-Received: by 2002:a05:6e02:2607:b0:35f:9920:1111 with SMTP id by7-20020a056e02260700b0035f99201111mr9605176ilb.129.1703116519155; Wed, 20 Dec 2023 15:55:19 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:18 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Jonathan Hunter , Krzysztof Kozlowski , Rob Herring , Thierry Reding , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 12/22] arm64: dts: tegra: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:26 -0700 Message-ID: <20231220165423.v2.12.Ic12bf13efe60f9ffaa444126c55a35fbf6c521cc@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/bo= ot/dts/nvidia/tegra132-norrin.dts index bbc2e9bef08da..14d58859bb55c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts @@ -762,6 +762,7 @@ ec: cros-ec@0 { interrupt-parent =3D <&gpio>; interrupts =3D ; reg =3D <0>; + wakeup-source; =20 google,cros-ec-spi-msg-delay =3D <2000>; =20 --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f44.google.com (mail-io1-f44.google.com [209.85.166.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C37594E61D for ; Wed, 20 Dec 2023 23:55:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="m67xZNrj" Received: by mail-io1-f44.google.com with SMTP id ca18e2360f4ac-7b7fb34265fso9423539f.3 for ; Wed, 20 Dec 2023 15:55:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116520; x=1703721320; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wJduS/1fJUByj83cmxVS/XQjbXOMlAAEnEEqFMZKGGY=; b=m67xZNrj+bACUTayQ8vCk89bCG3aJ28wj3+AqWdfhb/qVO+YiEUYCVbWttmog6/dUg HBvQxuQO+CNyNoc4yCurTN7IgCziZZIwczOJmGTNJwYjCeA8UsJJSwwvt2z74jDeDdW8 4uiIE/nnmHJxzfBWYUAEQqrJmekZ923LqZHuE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116520; x=1703721320; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wJduS/1fJUByj83cmxVS/XQjbXOMlAAEnEEqFMZKGGY=; b=qy05l5UQ0mCbzYj8AYI41P9ffhM6nPrreEjbeoXPiIB4vlWOUPRsXKjgP42yjCiyPG O0yDgOTZYswr7bEPVLerEhL9KdE269SRbTRbzdPKTa0WSoqCY6OWNL5Ngj2PAgvCGFQm aOl89XKhkNQn6lLKX70KAMyJpj0r0qH9at+yT7Wz5xqj4CpXK9l/BrekHkIpp3Tzbc3z FeK0ePzq8zrUA8yBM3JClenB1L6DxR6v38kYkPbHRLbZCvmjNzv8MAigwa9v7tMjqj7i U1e5tb9/Pi9F2l/KiWjp53EawCLzkKoxFjhaBZLSeV8qMf9xFYywZA2PnknzPRDWkAsz KRJg== X-Gm-Message-State: AOJu0Yx3WYtm8zGDPBM0wlpV8h9kMiJQ5c61hN/44PAUhxnyVvOT2y0r ZUyKMPjuDQ3jXzzh1Va87EIg0XNBWrxSwVEEHPs= X-Google-Smtp-Source: AGHT+IHGFtnZQ7iLgJfoVYEVEaK5odOPIEkB3kjTbyuaK6Zg3MTx5G7vEnhwrIdBftS6jyvuHgaTVw== X-Received: by 2002:a5e:8610:0:b0:7ba:753a:ed0a with SMTP id z16-20020a5e8610000000b007ba753aed0amr1782436ioj.16.1703116520055; Wed, 20 Dec 2023 15:55:20 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:19 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 13/22] arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:27 -0700 Message-ID: <20231220165423.v2.13.I2ee94aede9e25932f656c2bdb832be3199fa1291@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer Reviewed-by: Douglas Anderson --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot= /dts/qcom/sc7180-trogdor.dtsi index 46aaeba286047..f3a6da8b28901 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -649,6 +649,7 @@ cros_ec: ec@0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&ap_ec_int_l>; spi-max-frequency =3D <3000000>; + wakeup-source; =20 cros_ec_pwm: pwm { compatible =3D "google,cros-ec-pwm"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f43.google.com (mail-io1-f43.google.com [209.85.166.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7F104C3D6 for ; Wed, 20 Dec 2023 23:55:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="MnbpjDzK" Received: by mail-io1-f43.google.com with SMTP id ca18e2360f4ac-7b7fe0ae57bso9904539f.0 for ; Wed, 20 Dec 2023 15:55:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116521; x=1703721321; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bZuPqRxkPW8qurxjYx07gjm1CYO7d9uELmdtkiZRYco=; b=MnbpjDzKOaN/BhBdGaCtMaiJ3xpNomM8j7iiMCSYgNHNCA14g3C3/pl1vTx3i/Xd4G O0n5Z+HAjQLECf/wNCBpzhNbPUts/tkrVXgKOiO2xfev8yiZtEGP/iAJVY1OnK5pYN1t PTvB3j+nNoIZIY4R4v2vFaCHx4LXB0tt65sd8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116521; x=1703721321; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bZuPqRxkPW8qurxjYx07gjm1CYO7d9uELmdtkiZRYco=; b=OaHY5S6IC8Qka2kGTuo4Zp4FClObGMu9uij+ibLxoND6xBWqUfax9NXDERfDl6ym00 u97BQl3V8GWWaVm+6rC8imyGN4JPm3WQf4ZiAbQYxkqlgTVQgC2px5KDAejj+tsK7bhz uvlXPto9eeHdGYHzn2V3IAvfj5VYpUW8qYvlUWvYJTpbYJiLBqi1trObvC32qIuAfKbI /VS/pS89zbl2VNP/AzLpHMbGnNMFHK4JO6KYb0DGLLOfwsm8onR4vywg7WMVJSeKngci Zyi3lynAxhpb3blXXzKrqKv3Z060bNDQECTCCOyGErgcCSOQ829xMTerJSxlq7oqMU3l Tosg== X-Gm-Message-State: AOJu0Yzyu5BHaSxLER6tj7/JTbuQqE5ixttriA5Xm+mQVRhc2r40XdPB fMiPSJOLfYQKZLEi91w92UKVpljFTkNC+ogIviU= X-Google-Smtp-Source: AGHT+IH9eKxs2gX2n0YBuAdnfEstGKr3mBLvpJ8v13Hu+3I2CjGqKVDhyAV9CBjaiJ1aNpqgRQZE1w== X-Received: by 2002:a05:6e02:1ba3:b0:35f:c678:9509 with SMTP id n3-20020a056e021ba300b0035fc6789509mr3542419ili.48.1703116520994; Wed, 20 Dec 2023 15:55:20 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:20 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 14/22] arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:28 -0700 Message-ID: <20231220165423.v2.14.I7ea3f53272c9b7cd77633adfd18058ba443eed96@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer Reviewed-by: Douglas Anderson --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1 + arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/bo= ot/dts/qcom/sc7280-herobrine.dtsi index 9ea6636125ad9..2ba4ea60cb147 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -548,6 +548,7 @@ cros_ec: ec@0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&ap_ec_int_l>; spi-max-frequency =3D <3000000>; + wakeup-source; =20 cros_ec_pwm: pwm { compatible =3D "google,cros-ec-pwm"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/bo= ot/dts/qcom/sc7280-idp-ec-h1.dtsi index ebae545c587c4..fbfac7534d3c6 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi @@ -19,6 +19,7 @@ cros_ec: ec@0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&ap_ec_int_l>; spi-max-frequency =3D <3000000>; + wakeup-source; =20 cros_ec_pwm: pwm { compatible =3D "google,cros-ec-pwm"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f49.google.com (mail-io1-f49.google.com [209.85.166.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E39EF4F1E0 for ; Wed, 20 Dec 2023 23:55:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="hbJ9A2us" Received: by mail-io1-f49.google.com with SMTP id ca18e2360f4ac-7ba7e8ba078so8263239f.3 for ; Wed, 20 Dec 2023 15:55:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116522; x=1703721322; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BjWQ8eHs2ceg5U4ktitsF8+YwQ1pARiSqNQDfBjNb6E=; b=hbJ9A2usGrH7IQvXrRk9FH5Jx/CipokbMBy80RejDGQy09ierB3oveknrICujQ5juw O/yKO3ezi+UriLtn5nCq1HXGjwgy6ufVJRLwmaCcR9uRKCZndrdPG7hLaH8TI2zQ0txO XJqVKAp8cSESzV7foeHH6SHLo/s0rBBhVCY44= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116522; x=1703721322; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BjWQ8eHs2ceg5U4ktitsF8+YwQ1pARiSqNQDfBjNb6E=; b=R1ILaWsdvgvMdbqSa5SYfq9ClmZfDvpz+ZXKJFQU9RXwfHAeXzywYob4326Uyra4B4 bG8znlJ9Fx1aEaW954i660Ng3pqsMu87BwP9tXgqaEE2QFnUFoq6EMtf7D9qmofk6zsR 7YFKCUuF+/KPwR/3O3aY2MvrPD/WDXSakIuIKHb27zE1CjdL1jAXsZvrc3TVGOcAlz5V hoAIJd4WvC7uZIN+bDE6WPsLvWhVOdDKtZwBgiUkSFkh7Nxom/oxhRSW24x4uuCoWbxG +wV2XL3MjUv/1ZO2Ll0ai8hPXUicYTwuXk4wNEd2xJUI/THslXUBLxwpZ9uAAv2vFx3N UQpg== X-Gm-Message-State: AOJu0Yxwn5Pvt7xhj5y/SjhHss25PKiBIZRyA0MpPaxha2T8UsymwiJW 6sA9cDUjmeC6+hXyi4mfJyRFA6CNiiboPpyg6/s= X-Google-Smtp-Source: AGHT+IHVHPsjxzWXdDQxx0hkClv58a6uuyHSa0qGobL+NY/YSniAlZM8fFxAz9OPni6RxwbAihyg9A== X-Received: by 2002:a05:6602:2809:b0:7ba:80de:e3b9 with SMTP id d9-20020a056602280900b007ba80dee3b9mr786935ioe.11.1703116521985; Wed, 20 Dec 2023 15:55:21 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:21 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Rob Herring , cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 15/22] arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:29 -0700 Message-ID: <20231220165423.v2.15.I870e2c3490e7fc27a8f6bc41dba23b3dfacd2d13@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer Reviewed-by: Douglas Anderson --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/d= ts/qcom/sdm845-cheza.dtsi index 0ab5e8f53ac9f..e8276db9eabb2 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi @@ -852,6 +852,7 @@ cros_ec: ec@0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&ec_ap_int_l>; spi-max-frequency =3D <3000000>; + wakeup-source; =20 cros_ec_pwm: pwm { compatible =3D "google,cros-ec-pwm"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f46.google.com (mail-io1-f46.google.com [209.85.166.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4ECD4F209 for ; Wed, 20 Dec 2023 23:55:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="mocD4svU" Received: by mail-io1-f46.google.com with SMTP id ca18e2360f4ac-7b35d476d61so9609539f.0 for ; Wed, 20 Dec 2023 15:55:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116523; x=1703721323; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9SmCkbB9UhMeKs9+2qDNSyTsxiHJD2y/t1pUjGilRTg=; b=mocD4svUyULAIqzBp0tCOvIKuM+S/+OaorsVAveT04GJ95Ha2HO1WWfA5xz0XoHvwS mkxAXh/iKbvGlydhsId6mWBrJ1AaixPcYaNP00qSQWUe2bKDoRO3iAOLQobnvCs2qjDf V432LDi9YMWbpwP2T5ECRjKK/uoU5p4XArJ0A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116523; x=1703721323; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9SmCkbB9UhMeKs9+2qDNSyTsxiHJD2y/t1pUjGilRTg=; b=Xlu4lXqhu6xlayUZbLp+1IAhreLhgAdZHLcXprCor/+wLUBlf+rHabBk+11cUlTSI0 BIj0bwUrm+tIdP6hWMV0M2VyFQNDQuOuon3Pz/n964UazG9cvA9i+zSaUfDDJ+CeKBaX RC8uXLeI7gcQfQ3rUv5MXDxa15rtEUe9pJ24awmbMG8iT8FBiUnpHW61pW0uXlo3N96u 1Z72SVzuxNIzkNOxH3wwSuQtQywzee54swNQ4DxdaqAX0Rcf7Q8o4cf+LJDN9pnYDAfK 8I5zAYAen/dqQMyLReMQAlGYSMznD8NflK1ZmQFF20pLVLP/qMtqukKeJCOMhWnWAKdn mPSA== X-Gm-Message-State: AOJu0Yy1uGSCJxrNYb1utExWuk+i2A4WAVFmnRLPyBMyJ+a2dJrkrsxp 7P/HxqzgRmUN8ZhjkLtDvNvCdqosU68lmQ7YZ1Y= X-Google-Smtp-Source: AGHT+IHK/bUEHWlzooHpOwEVS9+Oxk990sSaRzHv5EcAGd37/O9A0Vk7LwOVcnNWMGNdoN2K5E8zOQ== X-Received: by 2002:a6b:7f01:0:b0:7b7:fd05:4472 with SMTP id l1-20020a6b7f01000000b007b7fd054472mr2991741ioq.18.1703116522877; Wed, 20 Dec 2023 15:55:22 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:22 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 16/22] arm64: dts: rockchip: rk3399: Enable cros-ec-spi as wake source Date: Wed, 20 Dec 2023 16:54:30 -0700 Message-ID: <20231220165423.v2.16.Ice617703aded22ad4c806459129e1ae693eb57af@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Add the wakeup-source property to all cros-ec-spi compatible device nodes to match expected behavior. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Split by arch/soc arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot= /dts/rockchip/rk3399-gru.dtsi index 789fd0dcc88ba..b5734e056aef1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi @@ -603,6 +603,7 @@ cros_ec: ec@0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&ec_ap_int_l>; spi-max-frequency =3D <3000000>; + wakeup-source; =20 i2c_tunnel: i2c-tunnel { compatible =3D "google,cros-ec-i2c-tunnel"; --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-il1-f177.google.com (mail-il1-f177.google.com [209.85.166.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C94C4F5FA for ; Wed, 20 Dec 2023 23:55:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="ieMQxj5w" Received: by mail-il1-f177.google.com with SMTP id e9e14a558f8ab-35fc6eb9075so619165ab.1 for ; Wed, 20 Dec 2023 15:55:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116523; x=1703721323; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZKh5FX4xH2A55TvaLBm+1lswVT7mH5LMvN7VXVfLl8c=; b=ieMQxj5wfYGB1TiYeOYZCbjVxOt4Rz94IXWdMs4OMMQukhyWpk8iRfK8F32s6INq3n nP40GVvM2bHStM/qkxPwfs8LybFBxzjdxyP+k6qvzJhCaY3nSyE9tjr2weZMiifFyjrC QltXU3YE+xn5zUxK+U3RA6KCXBGJ2/y4ge17c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116523; x=1703721323; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZKh5FX4xH2A55TvaLBm+1lswVT7mH5LMvN7VXVfLl8c=; b=gNiCMIoyrWOv3BxpnxrCw5xBHUlyi/5hhjBjVsERQLh8DMTnkuvgNWlUim6eg6jDK2 eVK8w+UVZ9XJjMg6yelzW7cHJwjcy/t0nTbefsOQR3/aTz9Ylayk9f5YunSA+fnOLOrA 3+6ZnY36Ve6+ZEum91TFBFotzDsXtHL2xqc81XZCcWbZez8c9S0An0SeI+pWu9uLR7pE BRnVfYKKWCfH2rEZjDq0zwIm4z93NDFblYQ8Xw2pWCwAN7mYmM9cOgu7Tt9LXTC0iz2T O8WaX+K+uMqS0ThsnWxUm1XEt10mScZtf4Gw4XWsN+paiBOQwSfdFjI0trMFhNE+NXQI JgLw== X-Gm-Message-State: AOJu0YxXcVg/l900N2OpKgXYvUtk/gVWuPMzEuCY4pgG893bp86Mrah7 gWO5VKD42sxL0PlUdzsEfha0EiEJLiA6B/NaDBWIDxNjfQ== X-Google-Smtp-Source: AGHT+IEmW9gIzUsmNqEyx5I4EH1A+yRQP7jOpEKHuyJqA2GJeCmFZb3fstaeE8sjWD7QqAT20uydcQ== X-Received: by 2002:a05:6e02:1bc4:b0:35d:4463:5dd2 with SMTP id x4-20020a056e021bc400b0035d44635dd2mr2680020ilv.16.1703116523652; Wed, 20 Dec 2023 15:55:23 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:23 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 17/22] of: irq: add wake capable bit to of_irq_resource() Date: Wed, 20 Dec 2023 16:54:31 -0700 Message-ID: <20231220165423.v2.17.I29b26a7f3b80fac0a618707446a10b6cc974fdaf@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add wake capability information to the IRQ resource. Wake capability is assumed based on conventions provided in the devicetree wakeup-source binding documentation. An interrupt is considered wake capable if the following are true: 1. A wakeup-source property exits in the same device node as the interrupt. 2. The IRQ is marked as dedicated by setting its interrupt-name to "wakeup". The wakeup-source documentation states that dedicated interrupts can use device specific interrupt names and device drivers are still welcome to use their own naming schemes. This API is provided as a helper if one is willing to conform to the above conventions. The ACPI subsystems already provides similar APIs that allow one to query the wake capability of an IRQ. This brings closer feature parity to the devicetree. Signed-off-by: Mark Hasemeyer Reviewed-by: Rob Herring --- Changes in v2: -Update logic to return true only if wakeup-source property and "wakeup" interrupt-name are defined -irq->IRQ, api->API drivers/of/irq.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 174900072c18c..7583adf386220 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -383,11 +383,39 @@ int of_irq_parse_one(struct device_node *device, int = index, struct of_phandle_ar } EXPORT_SYMBOL_GPL(of_irq_parse_one); =20 +/** + * __of_irq_wake_capable - Determine whether a given IRQ index is wake cap= able + * + * The IRQ is considered wake capable if the following are true: + * 1. wakeup-source property exists + * 2. provided IRQ index is labelled as a dedicated wakeirq + * + * This logic assumes the provided IRQ index is valid. + * + * @dev: pointer to device tree node + * @index: zero-based index of the IRQ + * Return: True if provided IRQ index for #dev is wake capable. False othe= rwise. + */ +static bool __of_irq_wake_capable(const struct device_node *dev, int index) +{ + int wakeindex; + + if (!of_property_read_bool(dev, "wakeup-source")) + return false; + + wakeindex =3D of_property_match_string(dev, "interrupt-names", "wakeup"); + return wakeindex >=3D 0 && wakeindex =3D=3D index; +} + /** * of_irq_to_resource - Decode a node's IRQ and return it as a resource * @dev: pointer to device tree node - * @index: zero-based index of the irq + * @index: zero-based index of the IRQ * @r: pointer to resource structure to return result into. + * + * Return: Linux IRQ number on success, or 0 on the IRQ mapping failure, or + * -EPROBE_DEFER if the IRQ domain is not yet created, or error code in ca= se + * of any other failure. */ int of_irq_to_resource(struct device_node *dev, int index, struct resource= *r) { @@ -411,6 +439,8 @@ int of_irq_to_resource(struct device_node *dev, int ind= ex, struct resource *r) =20 r->start =3D r->end =3D irq; r->flags =3D IORESOURCE_IRQ | irqd_get_trigger_type(irq_get_irq_data(irq= )); + if (__of_irq_wake_capable(dev, index)) + r->flags |=3D IORESOURCE_IRQ_WAKECAPABLE; r->name =3D name ? name : of_node_full_name(dev); } =20 --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f46.google.com (mail-io1-f46.google.com [209.85.166.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BEA94F892 for ; Wed, 20 Dec 2023 23:55:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="RTult0R2" Received: by mail-io1-f46.google.com with SMTP id ca18e2360f4ac-7b7fbe3db16so8312739f.3 for ; Wed, 20 Dec 2023 15:55:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116524; x=1703721324; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tGuZXGW/tZ1AN0p557o5C5f/tYqgvv6aKKeuF8fEKW0=; b=RTult0R2kNN/Ah8ueZDjGp0VS3HMqdkRL4Yn56i2O4KqPkVI9buwRJFYTAzWF6kU5l GaM4S3MtRxWGfsrGfiW/a0b7YgCnBjx4sqbmrHECczjC5BG7w7onpDYatWzGs5W+1ACQ It9z4KD2cNV7srisn0btvOR1nbuAGs7t6Lm5g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116524; x=1703721324; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tGuZXGW/tZ1AN0p557o5C5f/tYqgvv6aKKeuF8fEKW0=; b=A/rqU4dj2Sz5Gc3urbyZtqun/BVGJNnYfGaW3QpwiBG1ctLlWekBtYn5PgwAYcB5mQ 21Gs6bQLyc1w1UCnKN12VCkpYcYYNPxMwHXg85iAsx/xGfE078tCdk9dXZKLjrxYWtY0 UmgEsnjErgxLEK2wYtoQiBPbda/KqkM3Xt6xOxdnCIYas3yiY9TBeTBNObH6rrTn4QJl mAZbopDiEeC9RUtitAUxAvGp7ZRMVnwCAuFgj6Ybk5FEi7c1IXpUBzJB+1u7uhvqfH+q QIiPMDMtvL8aSh9SbATA90wtwJ8nsYZ8SDXO3PIWFNACPcfDIjZjR4sOUAwDx9bHVItF 3GNg== X-Gm-Message-State: AOJu0YyAyFaawPeJAGu3f3NTjaDh5N43q0Xo7shRCnfj0F1vIR3Lja33 b1eYfgeP1+gDz2Fvd6hZjOQFQf9f1a+J3fTpuZM= X-Google-Smtp-Source: AGHT+IHwsyDhLKH4KCjyu9wSKyc/C2kTcwRhw8xhhn17ISW39v1/k+XbVmie3GgkSnB8nUOY8TufEQ== X-Received: by 2002:a6b:7305:0:b0:7b9:c344:6e77 with SMTP id e5-20020a6b7305000000b007b9c3446e77mr2318247ioh.8.1703116524433; Wed, 20 Dec 2023 15:55:24 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:24 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 18/22] of: irq: Add default implementation for of_irq_to_resource() Date: Wed, 20 Dec 2023 16:54:32 -0700 Message-ID: <20231220165423.v2.18.I31d4dd6a7e5a3e5eee05c87b358e63cd1aa0e467@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Similar to of_irq_to_resource_table(), add a default implementation of of_irq_to_resource() for systems that don't have CONFIG_OF_IRQ defined. Signed-off-by: Mark Hasemeyer Acked-by: Rob Herring --- Changes in v2: -None include/linux/of_irq.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index d6d3eae2f1452..0d73b2ca92d31 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -34,8 +34,6 @@ static inline int of_irq_parse_oldworld(const struct devi= ce_node *device, int in =20 extern int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *ou= t_irq); extern unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data= ); -extern int of_irq_to_resource(struct device_node *dev, int index, - struct resource *r); =20 #ifdef CONFIG_OF_IRQ extern void of_irq_init(const struct of_device_id *matches); @@ -44,6 +42,7 @@ extern int of_irq_parse_one(struct device_node *device, i= nt index, extern int of_irq_count(struct device_node *dev); extern int of_irq_get(struct device_node *dev, int index); extern int of_irq_get_byname(struct device_node *dev, const char *name); +extern int of_irq_to_resource(struct device_node *dev, int index, struct r= esource *r); extern int of_irq_to_resource_table(struct device_node *dev, struct resource *res, int nr_irqs); extern struct device_node *of_irq_find_parent(struct device_node *child); @@ -76,6 +75,11 @@ static inline int of_irq_get_byname(struct device_node *= dev, const char *name) { return 0; } +static inline int of_irq_to_resource(struct device_node *dev, int index, + struct resource *r) +{ + return 0; +} static inline int of_irq_to_resource_table(struct device_node *dev, struct resource *res, int nr_irqs) { --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f42.google.com (mail-io1-f42.google.com [209.85.166.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A9DD4FF65 for ; Wed, 20 Dec 2023 23:55:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="YsCoH7/Z" Received: by mail-io1-f42.google.com with SMTP id ca18e2360f4ac-7b35d476d61so9610539f.0 for ; Wed, 20 Dec 2023 15:55:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116525; x=1703721325; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/4vyd1tF7LY6LenXuoft53vwvHTu14aLUC8wddaElsk=; b=YsCoH7/ZbO+dsTFo1Nao4y3nEV+9+WrVNB+fkuNvqRrbjSylGI032V+UsAi2cdEJQw UVoxKCISQfLg7+tk0Qn9pb9oCKrImqgPzxdNjSi+ARpivTBNAYT1rx777OR5LaGAaFgD h6dtebRO0A199MwX/xATjW3l63rVBO2B/0lDc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116525; x=1703721325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/4vyd1tF7LY6LenXuoft53vwvHTu14aLUC8wddaElsk=; b=kadc8A4obHdCTweJ9l7H5XHsQS/f6dSfXArqu5G5byp4AF/rlbr8N0adQzQC1zNP0z IzhIKnMOSrmcs9ftmHfaM6yaXuonq5fU+crLBtpaj96UvI5vZMTU5NdK+ytps0wyqnRw Qa1fC+pXJORQOrHu3+Ug/DTUO0HiUfKeVPCIR/qL7bGtRiU3MN9FDgPIH9PCVyxMZiCQ 3kdIi471y65qa6O+qyr16huawwim3sPb04lj8FQ70MAvfKYR6VEUhfErrrU1uXyYwmG2 j7OF9XSO8T6uZK5/6OkK+OrjSReTo6BulqrdjD5BwIh9trac9fe6MN4xAgewiTxNOun1 h+qw== X-Gm-Message-State: AOJu0YyAB8GtTEdsLTy2VRtQfHDWOBtN5kZ55IRGtnVi/yzf1XYc70JM GyFNhOBWUtRrFY3cmPSuJC/sU1bqbHW3c02aEAI= X-Google-Smtp-Source: AGHT+IHDc+2/0o2kjedLVyZTxa7KHwUSnk/oDj2qevKyIsfHt2NivDO6L0c2iwsIy058pulYZ3DjuQ== X-Received: by 2002:a05:6e02:1a66:b0:35f:87ac:10d4 with SMTP id w6-20020a056e021a6600b0035f87ac10d4mr12175155ilv.5.1703116525358; Wed, 20 Dec 2023 15:55:25 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:24 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Frank Rowand , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 19/22] of: irq: Remove extern from function declarations Date: Wed, 20 Dec 2023 16:54:33 -0700 Message-ID: <20231220165423.v2.19.I319e781c11e6352eb5b6c408dc20bd54a720edbf@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The extern keyword is implicit for function declarations. Remove it where possible and adjust the line wrapping accordingly. Signed-off-by: Mark Hasemeyer Acked-by: Rob Herring --- Changes in v2: -New patch include/linux/of_irq.h | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index 0d73b2ca92d31..a130dcbc4bb45 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -32,27 +32,26 @@ static inline int of_irq_parse_oldworld(const struct de= vice_node *device, int in } #endif /* CONFIG_PPC32 && CONFIG_PPC_PMAC */ =20 -extern int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *ou= t_irq); -extern unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data= ); +int of_irq_parse_raw(const __be32 *addr, struct of_phandle_args *out_irq); +unsigned int irq_create_of_mapping(struct of_phandle_args *irq_data); =20 #ifdef CONFIG_OF_IRQ -extern void of_irq_init(const struct of_device_id *matches); -extern int of_irq_parse_one(struct device_node *device, int index, - struct of_phandle_args *out_irq); -extern int of_irq_count(struct device_node *dev); -extern int of_irq_get(struct device_node *dev, int index); -extern int of_irq_get_byname(struct device_node *dev, const char *name); -extern int of_irq_to_resource(struct device_node *dev, int index, struct r= esource *r); -extern int of_irq_to_resource_table(struct device_node *dev, - struct resource *res, int nr_irqs); -extern struct device_node *of_irq_find_parent(struct device_node *child); -extern struct irq_domain *of_msi_get_domain(struct device *dev, +void of_irq_init(const struct of_device_id *matches); +int of_irq_parse_one(struct device_node *device, int index, + struct of_phandle_args *out_irq); +int of_irq_count(struct device_node *dev); +int of_irq_get(struct device_node *dev, int index); +int of_irq_get_byname(struct device_node *dev, const char *name); +int of_irq_to_resource(struct device_node *dev, int index, struct resource= *r); +int of_irq_to_resource_table(struct device_node *dev, struct resource *res, + int nr_irqs); +struct device_node *of_irq_find_parent(struct device_node *child); +struct irq_domain *of_msi_get_domain(struct device *dev, struct device_node *np, enum irq_domain_bus_token token); -extern struct irq_domain *of_msi_map_get_device_domain(struct device *dev, - u32 id, - u32 bus_token); -extern void of_msi_configure(struct device *dev, struct device_node *np); +struct irq_domain *of_msi_map_get_device_domain(struct device *dev, u32 id, + u32 bus_token); +void of_msi_configure(struct device *dev, struct device_node *np); u32 of_msi_map_id(struct device *dev, struct device_node *msi_np, u32 id_i= n); #else static inline void of_irq_init(const struct of_device_id *matches) @@ -117,7 +116,7 @@ static inline u32 of_msi_map_id(struct device *dev, * implements it differently. However, the prototype is the same for all, * so declare it here regardless of the CONFIG_OF_IRQ setting. */ -extern unsigned int irq_of_parse_and_map(struct device_node *node, int ind= ex); +unsigned int irq_of_parse_and_map(struct device_node *node, int index); =20 #else /* !CONFIG_OF && !CONFIG_SPARC */ static inline unsigned int irq_of_parse_and_map(struct device_node *dev, --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f43.google.com (mail-io1-f43.google.com [209.85.166.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CD915026B for ; Wed, 20 Dec 2023 23:55:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="DBrtxpTc" Received: by mail-io1-f43.google.com with SMTP id ca18e2360f4ac-7b7a9f90ee9so9156839f.0 for ; Wed, 20 Dec 2023 15:55:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116526; x=1703721326; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AD3TjuZ8z4szpVAtqglArcudpEVksAT0HzSeLd2B1Dk=; b=DBrtxpTcnWV8jJoVK8EtiBjFz+EPD3xtKcLBwoTfNlBPWsK1A4Fzq9E18e5j7elPzU Zd6UA/5o/0m78Y/o+pP3RWuO8hJbT56ii+w98WnFABSYqxBP9/QaXc6P+GsTGSdlC+tm RnxxyvOCbJOwrrsH00wHPTj5aGMsYVYYvJIZ0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116526; x=1703721326; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AD3TjuZ8z4szpVAtqglArcudpEVksAT0HzSeLd2B1Dk=; b=b0ALlXEJAv9glRMVg3uT2IM2wnJ4HK7nf+gb6/apelHljKHod7xWLfobg23LYzjtZ4 8EbK1Zti2z+doOHWPQcsT97NNOZBXGvDFhQ550rHp2gC6Ay8Ga98Q94WXASaEO1b93wH mTjN8Xq6Q0j4f2dxxNRMgC0buw4i27LbKnkcLkHqyh/iytSijmuLb8JWtbVLrkbz+QKz 58vzlVkrKzQffdrSw1+ILqB6VWTEL38Bcxecekz9zK3jZN06rPpVowTRMOiyyNazvDzn BcSrc29mE1vLrZv6gqYj5U5YyjQr6RPifklskWz47DuoiY7TzTmD3aqQ6GXzbk2PY8Bz ld6Q== X-Gm-Message-State: AOJu0YzKcU7RmqVRrHJTi6SIW8zqqNdvHvp9o+negcG1diCs9NphoH+S NclxPbdC3h/Wv8cUrRumrzMeWbeb32ki8EbmX3k= X-Google-Smtp-Source: AGHT+IH9IT/zBs5lX+0g5tONOHtbi6Aq3OWE6gxs1xgyqopxLZmR5hvRwzgJx1wf6Aqp8B2g+WHCgQ== X-Received: by 2002:a5d:8c83:0:b0:7b7:fe6c:e6d3 with SMTP id g3-20020a5d8c83000000b007b7fe6ce6d3mr2659307ion.2.1703116526320; Wed, 20 Dec 2023 15:55:26 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:26 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Andy Shevchenko , Daniel Scally , Frank Rowand , Greg Kroah-Hartman , Heikki Krogerus , Len Brown , "Rafael J. Wysocki" , Rob Herring , Sakari Ailus , devicetree@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 20/22] device property: Modify fwnode irq_get() to use resource Date: Wed, 20 Dec 2023 16:54:34 -0700 Message-ID: <20231220165423.v2.20.I38ac58ab04985a404ed6551eb5813fa7841ef410@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The underlying ACPI and OF subsystems provide their own APIs which provide IRQ information as a struct resource. This allows callers to get more information about the IRQ by looking at the resource flags. For example, whether or not an IRQ is wake capable. Signed-off-by: Mark Hasemeyer Reviewed-by: Sakari Ailus Suggested-by? --- Changes in v2: -New patch drivers/acpi/property.c | 11 +++++------ drivers/base/property.c | 24 +++++++++++++++++++++--- drivers/of/property.c | 8 ++++---- include/linux/fwnode.h | 8 +++++--- include/linux/property.h | 2 ++ 5 files changed, 37 insertions(+), 16 deletions(-) diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c index a6ead5204046b..259869987ffff 100644 --- a/drivers/acpi/property.c +++ b/drivers/acpi/property.c @@ -1627,17 +1627,16 @@ static int acpi_fwnode_graph_parse_endpoint(const s= truct fwnode_handle *fwnode, return 0; } =20 -static int acpi_fwnode_irq_get(const struct fwnode_handle *fwnode, - unsigned int index) +static int acpi_fwnode_irq_get_resource(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r) { - struct resource res; int ret; =20 - ret =3D acpi_irq_get(ACPI_HANDLE_FWNODE(fwnode), index, &res); + ret =3D acpi_irq_get(ACPI_HANDLE_FWNODE(fwnode), index, r); if (ret) return ret; =20 - return res.start; + return r->start; } =20 #define DECLARE_ACPI_FWNODE_OPS(ops) \ @@ -1664,7 +1663,7 @@ static int acpi_fwnode_irq_get(const struct fwnode_ha= ndle *fwnode, acpi_graph_get_remote_endpoint, \ .graph_get_port_parent =3D acpi_fwnode_get_parent, \ .graph_parse_endpoint =3D acpi_fwnode_graph_parse_endpoint, \ - .irq_get =3D acpi_fwnode_irq_get, \ + .irq_get_resource =3D acpi_fwnode_irq_get_resource, \ }; \ EXPORT_SYMBOL_GPL(ops) =20 diff --git a/drivers/base/property.c b/drivers/base/property.c index a1b01ab420528..4f5d5ab5ab8cf 100644 --- a/drivers/base/property.c +++ b/drivers/base/property.c @@ -1047,23 +1047,41 @@ void __iomem *fwnode_iomap(struct fwnode_handle *fw= node, int index) EXPORT_SYMBOL(fwnode_iomap); =20 /** - * fwnode_irq_get - Get IRQ directly from a fwnode + * fwnode_irq_get_resource - Get IRQ directly from a fwnode and populate + * the resource struct * @fwnode: Pointer to the firmware node * @index: Zero-based index of the IRQ + * @r: Pointer to resource to populate with IRQ information. * * Return: Linux IRQ number on success. Negative errno on failure. */ -int fwnode_irq_get(const struct fwnode_handle *fwnode, unsigned int index) +int fwnode_irq_get_resource(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r) { int ret; =20 - ret =3D fwnode_call_int_op(fwnode, irq_get, index); + ret =3D fwnode_call_int_op(fwnode, irq_get_resource, index, r); /* We treat mapping errors as invalid case */ if (ret =3D=3D 0) return -EINVAL; =20 return ret; } +EXPORT_SYMBOL(fwnode_irq_get_resource); + +/** + * fwnode_irq_get - Get IRQ directly from a fwnode + * @fwnode: Pointer to the firmware node + * @index: Zero-based index of the IRQ + * + * Return: Linux IRQ number on success. Negative errno on failure. + */ +int fwnode_irq_get(const struct fwnode_handle *fwnode, unsigned int index) +{ + struct resource r; + + return fwnode_irq_get_resource(fwnode, index, &r); +} EXPORT_SYMBOL(fwnode_irq_get); =20 /** diff --git a/drivers/of/property.c b/drivers/of/property.c index afdaefbd03f61..864ea5fa5702b 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1425,10 +1425,10 @@ static void __iomem *of_fwnode_iomap(struct fwnode_= handle *fwnode, int index) #endif } =20 -static int of_fwnode_irq_get(const struct fwnode_handle *fwnode, - unsigned int index) +static int of_fwnode_irq_get_resource(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r) { - return of_irq_get(to_of_node(fwnode), index); + return of_irq_to_resource(to_of_node(fwnode), index, r); } =20 static int of_fwnode_add_links(struct fwnode_handle *fwnode) @@ -1469,7 +1469,7 @@ const struct fwnode_operations of_fwnode_ops =3D { .graph_get_port_parent =3D of_fwnode_graph_get_port_parent, .graph_parse_endpoint =3D of_fwnode_graph_parse_endpoint, .iomap =3D of_fwnode_iomap, - .irq_get =3D of_fwnode_irq_get, + .irq_get_resource =3D of_fwnode_irq_get_resource, .add_links =3D of_fwnode_add_links, }; EXPORT_SYMBOL_GPL(of_fwnode_ops); diff --git a/include/linux/fwnode.h b/include/linux/fwnode.h index 2a72f55d26eb8..716ed863acde0 100644 --- a/include/linux/fwnode.h +++ b/include/linux/fwnode.h @@ -9,10 +9,11 @@ #ifndef _LINUX_FWNODE_H_ #define _LINUX_FWNODE_H_ =20 -#include -#include #include #include +#include +#include +#include =20 struct fwnode_operations; struct device; @@ -164,7 +165,8 @@ struct fwnode_operations { int (*graph_parse_endpoint)(const struct fwnode_handle *fwnode, struct fwnode_endpoint *endpoint); void __iomem *(*iomap)(struct fwnode_handle *fwnode, int index); - int (*irq_get)(const struct fwnode_handle *fwnode, unsigned int index); + int (*irq_get_resource)(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r); int (*add_links)(struct fwnode_handle *fwnode); }; =20 diff --git a/include/linux/property.h b/include/linux/property.h index e6516d0b7d52a..685ba72a8ce9e 100644 --- a/include/linux/property.h +++ b/include/linux/property.h @@ -190,6 +190,8 @@ struct fwnode_handle *fwnode_handle_get(struct fwnode_h= andle *fwnode); void fwnode_handle_put(struct fwnode_handle *fwnode); =20 int fwnode_irq_get(const struct fwnode_handle *fwnode, unsigned int index); +int fwnode_irq_get_resource(const struct fwnode_handle *fwnode, + unsigned int index, struct resource *r); int fwnode_irq_get_byname(const struct fwnode_handle *fwnode, const char *= name); =20 unsigned int device_get_child_node_count(const struct device *dev); --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f47.google.com (mail-io1-f47.google.com [209.85.166.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E15E51013 for ; Wed, 20 Dec 2023 23:55:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; 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[71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:26 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , David Gow , Greg Kroah-Hartman , Mark Brown , "Rafael J. Wysocki" , Takashi Iwai , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Subject: [PATCH v2 21/22] platform: Modify platform_get_irq_optional() to use resource Date: Wed, 20 Dec 2023 16:54:35 -0700 Message-ID: <20231220165423.v2.21.Ife9ebad2bbfbab3a05e90040f344d750aa0aac7e@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unify handling of ACPI, GPIO, devictree, and platform resource interrupts in platform_get_irq_optional(). Each of these subsystems provide their own APIs which provide IRQ information as a struct resource. This simplifies the logic of the function and allows callers to get more information about the IRQ by looking at the resource flags. For example, whether or not an IRQ is wake capable. Signed-off-by: Mark Hasemeyer --- Changes in v2: -irq->IRQ -Remove cast to struct resource -Conform to get_optional() function naming -Revert move of irq_get_irq_data() -Add NULL check on struct resource* -Use fwnode to retrieve IRQ for DT/ACPI drivers/base/platform.c | 74 +++++++++++++++++++++++---------- include/linux/platform_device.h | 3 ++ 2 files changed, 54 insertions(+), 23 deletions(-) diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 10c5779634182..3a556faddd40d 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -151,9 +151,11 @@ EXPORT_SYMBOL_GPL(devm_platform_ioremap_resource_bynam= e); #endif /* CONFIG_HAS_IOMEM */ =20 /** - * platform_get_irq_optional - get an optional IRQ for a device + * platform_get_irq_resource_optional - get an optional IRQ for a device a= nd + * populate the resource struct * @dev: platform device * @num: IRQ number index + * @r: pointer to resource to populate with IRQ information. * * Gets an IRQ for a platform device. Device drivers should check the retu= rn * value for errors so as to not pass a negative integer value to the @@ -162,47 +164,42 @@ EXPORT_SYMBOL_GPL(devm_platform_ioremap_resource_byna= me); * * For example:: * - * int irq =3D platform_get_irq_optional(pdev, 0); + * int irq =3D platform_get_irq_resource_optional(pdev, 0, &res); * if (irq < 0) * return irq; * * Return: non-zero IRQ number on success, negative error number on failur= e. */ -int platform_get_irq_optional(struct platform_device *dev, unsigned int nu= m) +int platform_get_irq_resource_optional(struct platform_device *dev, + unsigned int num, struct resource *r) { int ret; + if (IS_ERR_OR_NULL(r)) + return -EINVAL; #ifdef CONFIG_SPARC /* sparc does not have irqs represented as IORESOURCE_IRQ resources */ if (!dev || num >=3D dev->archdata.num_irqs) goto out_not_found; ret =3D dev->archdata.irqs[num]; + if (ret > 0) + *r =3D DEFINE_RES_IRQ(ret); goto out; #else struct fwnode_handle *fwnode =3D dev_fwnode(&dev->dev); - struct resource *r; + struct resource *platform_res; =20 - if (is_of_node(fwnode)) { - ret =3D of_irq_get(to_of_node(fwnode), num); - if (ret > 0 || ret =3D=3D -EPROBE_DEFER) - goto out; - } - - r =3D platform_get_resource(dev, IORESOURCE_IRQ, num); - if (is_acpi_device_node(fwnode)) { - if (r && r->flags & IORESOURCE_DISABLED) { - ret =3D acpi_irq_get(ACPI_HANDLE_FWNODE(fwnode), num, r); - if (ret) - goto out; - } - } + ret =3D fwnode_irq_get_resource(fwnode, num, r); + if (ret > 0 || ret =3D=3D -EPROBE_DEFER) + goto out; =20 + platform_res =3D platform_get_resource(dev, IORESOURCE_IRQ, num); /* * The resources may pass trigger flags to the irqs that need * to be set up. It so happens that the trigger flags for * IORESOURCE_BITS correspond 1-to-1 to the IRQF_TRIGGER* * settings. */ - if (r && r->flags & IORESOURCE_BITS) { + if (platform_res && platform_res->flags & IORESOURCE_BITS) { struct irq_data *irqd; =20 irqd =3D irq_get_irq_data(r->start); @@ -211,7 +208,8 @@ int platform_get_irq_optional(struct platform_device *d= ev, unsigned int num) irqd_set_trigger_type(irqd, r->flags & IORESOURCE_BITS); } =20 - if (r) { + if (platform_res) { + *r =3D *platform_res; ret =3D r->start; goto out; } @@ -224,10 +222,12 @@ int platform_get_irq_optional(struct platform_device = *dev, unsigned int num) * allows a common code path across either kind of resource. */ if (num =3D=3D 0 && is_acpi_device_node(fwnode)) { - ret =3D acpi_dev_gpio_irq_get(to_acpi_device_node(fwnode), num); + ret =3D acpi_dev_get_gpio_irq_resource(to_acpi_device_node(fwnode), NULL= , num, r); /* Our callers expect -ENXIO for missing IRQs. */ - if (ret >=3D 0 || ret =3D=3D -EPROBE_DEFER) + if (!ret || ret =3D=3D -EPROBE_DEFER) { + ret =3D ret ?: r->start; goto out; + } } =20 #endif @@ -238,7 +238,8 @@ int platform_get_irq_optional(struct platform_device *d= ev, unsigned int num) return -EINVAL; return ret; } -EXPORT_SYMBOL_GPL(platform_get_irq_optional); +EXPORT_SYMBOL_GPL(platform_get_irq_resource_optional); + =20 /** * platform_get_irq - get an IRQ for a device @@ -270,6 +271,33 @@ int platform_get_irq(struct platform_device *dev, unsi= gned int num) } EXPORT_SYMBOL_GPL(platform_get_irq); =20 + +/** + * platform_get_irq_optional - get an optional IRQ for a device + * @dev: platform device + * @num: IRQ number index + * + * Gets an IRQ for a platform device. Device drivers should check the retu= rn + * value for errors so as to not pass a negative integer value to the + * request_irq() APIs. This is the same as platform_get_irq(), except that= it + * does not print an error message if an IRQ can not be obtained. + * + * For example:: + * + * int irq =3D platform_get_irq_optional(pdev, 0); + * if (irq < 0) + * return irq; + * + * Return: non-zero IRQ number on success, negative error number on failur= e. + */ +int platform_get_irq_optional(struct platform_device *dev, unsigned int nu= m) +{ + struct resource r; + + return platform_get_irq_resource_optional(dev, num, &r); +} +EXPORT_SYMBOL_GPL(platform_get_irq_optional); + /** * platform_irq_count - Count the number of IRQs a platform device uses * @dev: platform device diff --git a/include/linux/platform_device.h b/include/linux/platform_devic= e.h index 7a41c72c19591..2117f817d9c9c 100644 --- a/include/linux/platform_device.h +++ b/include/linux/platform_device.h @@ -102,6 +102,9 @@ devm_platform_ioremap_resource_byname(struct platform_d= evice *pdev, =20 extern int platform_get_irq(struct platform_device *, unsigned int); extern int platform_get_irq_optional(struct platform_device *, unsigned in= t); +extern int platform_get_irq_resource_optional(struct platform_device *dev, + unsigned int num, + struct resource *r); extern int platform_irq_count(struct platform_device *); extern int devm_platform_get_irqs_affinity(struct platform_device *dev, struct irq_affinity *affd, --=20 2.43.0.472.g3155946c3a-goog From nobody Fri Sep 20 06:52:24 2024 Received: from mail-io1-f42.google.com (mail-io1-f42.google.com [209.85.166.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2CAB50266 for ; Wed, 20 Dec 2023 23:55:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="A/KtLs3a" Received: by mail-io1-f42.google.com with SMTP id ca18e2360f4ac-7b7fdde8b26so7348139f.1 for ; Wed, 20 Dec 2023 15:55:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1703116528; x=1703721328; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=E4LntbTWAkvb3ubuXcE2yEZinwRXbecjdU87OrYLeRQ=; b=A/KtLs3a+q5u2Z+kgFF4rdclXeigCtkHU8l7JKORaO1NCAr+ZxtHqfHnU9W3idaX/6 rxTJzNpS9gBeG+HBAR/+ETpJNKNkMO3wIaMHOsJDptSwaGPnCpLtw96y1CJsKfKf7GtN XX+YT0jrjPeO/jvZ8cFXSAHe/gw0KRoycOYm0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703116528; x=1703721328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E4LntbTWAkvb3ubuXcE2yEZinwRXbecjdU87OrYLeRQ=; b=DvB9wzFB9atVOAVZz+nTtCXvFMy4XjIVEX0NHMJiCEMbFF7+OXF8YEPvTdFHylYjLo IrulHbsfVgrCzCT2qfDmxE0sIzkZFGFvXXR9/jzuNA6s4BdF0qWWibZsLIJmq0bI8bgb a1sQQjP5Ja0vaZJtrELvQaJf8EYahe89W51DH7VpviZDuYkoxoZFbX/tmIwAkJDO67HU v9PbKnv2EzF75ifZciFO+DXo/O8DiFDWT/qSCgfMnVnCSBQHX4L9nCIJTIcS98/KOWZj RVE6BYjkT3YtRO5HZWwilaIh5nSbjVAQRbckx6YjTd5NSuNzdr+6cYixfDyqmNgl2IUm LqdA== X-Gm-Message-State: AOJu0YwOabgqfz7yvZNZ4BtPVprcf3OHLkLB7FgJWOJUH/BcALF/UIWU YOwXDvqmGB3wXRRBPq0V6BRE9rmbTkOg38ultWE= X-Google-Smtp-Source: AGHT+IFAx/PaxXX+lr5qfGthnr+ElVsLssqVolh6NkqV0cO+WfS28o1kqCpFuafVxI51uDFrBehZvg== X-Received: by 2002:a6b:5f10:0:b0:7ba:8569:8b37 with SMTP id t16-20020a6b5f10000000b007ba85698b37mr298479iob.25.1703116528068; Wed, 20 Dec 2023 15:55:28 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bp22-20020a056638441600b0046b39a6f404sm177805jab.17.2023.12.20.15.55.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 15:55:27 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: AngeloGioacchino Del Regno , Krzysztof Kozlowski , Tzung-Bi Shih , Raul Rangel , Konrad Dybcio , Andy Shevchenko , Rob Herring , Sudeep Holla , Mark Hasemeyer , Benson Leung , Bhanu Prakash Maiya , Chen-Yu Tsai , Guenter Roeck , Lee Jones , Prashant Malani , Rob Barnes , Stephen Boyd , chrome-platform@lists.linux.dev Subject: [PATCH v2 22/22] platform/chrome: cros_ec: Use PM subsystem to manage wakeirq Date: Wed, 20 Dec 2023 16:54:36 -0700 Message-ID: <20231220165423.v2.22.Ieee574a0e94fbaae01fd6883ffe2ceeb98d7df28@changeid> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231220235459.2965548-1-markhas@chromium.org> References: <20231220235459.2965548-1-markhas@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The cros ec driver is manually managing the wake IRQ by calling enable_irq_wake()/disable_irq_wake() during suspend/resume. Modify the driver to use the power management subsystem to manage the wakeirq. Rather than assuming that the IRQ is wake capable, use the underlying firmware/device tree to determine whether or not to enable it as a wake source. Some Chromebooks rely solely on the ec_sync pin to wake the AP but do not specify the interrupt as wake capable in the ACPI _CRS. For LPC/ACPI based systems a DMI quirk is introduced listing boards whose firmware should not be trusted to provide correct wake capable values. For device tree base systems, it is not an issue as the relevant device tree entries have been updated and DTS is built from source for each ChromeOS update. The IRQ wake logic was added on an interface basis (lpc, spi, uart) as opposed to adding it to cros_ec.c because the i2c subsystem already enables the wakirq (if applicable) on our behalf. Signed-off-by: Mark Hasemeyer --- Changes in v2: -Rebase on linux-next -Add cover letter -See each patch for patch specific changes -Look for 'wakeup-source' property in cros_ec_spi.c drivers/platform/chrome/cros_ec.c | 9 ---- drivers/platform/chrome/cros_ec_lpc.c | 52 +++++++++++++++++++-- drivers/platform/chrome/cros_ec_spi.c | 41 ++++++++++++---- drivers/platform/chrome/cros_ec_uart.c | 34 ++++++++++++-- include/linux/platform_data/cros_ec_proto.h | 2 - 5 files changed, 110 insertions(+), 28 deletions(-) diff --git a/drivers/platform/chrome/cros_ec.c b/drivers/platform/chrome/cr= os_ec.c index badc68bbae8cc..f24d2f2084399 100644 --- a/drivers/platform/chrome/cros_ec.c +++ b/drivers/platform/chrome/cros_ec.c @@ -353,12 +353,6 @@ EXPORT_SYMBOL(cros_ec_suspend_prepare); =20 static void cros_ec_disable_irq(struct cros_ec_device *ec_dev) { - struct device *dev =3D ec_dev->dev; - if (device_may_wakeup(dev)) - ec_dev->wake_enabled =3D !enable_irq_wake(ec_dev->irq); - else - ec_dev->wake_enabled =3D false; - disable_irq(ec_dev->irq); ec_dev->suspended =3D true; } @@ -440,9 +434,6 @@ static void cros_ec_enable_irq(struct cros_ec_device *e= c_dev) ec_dev->suspended =3D false; enable_irq(ec_dev->irq); =20 - if (ec_dev->wake_enabled) - disable_irq_wake(ec_dev->irq); - /* * Let the mfd devices know about events that occur during * suspend. This way the clients know what to do with them. diff --git a/drivers/platform/chrome/cros_ec_lpc.c b/drivers/platform/chrom= e/cros_ec_lpc.c index f0f3d3d561572..fec5aefd6f177 100644 --- a/drivers/platform/chrome/cros_ec_lpc.c +++ b/drivers/platform/chrome/cros_ec_lpc.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,28 @@ struct lpc_driver_ops { =20 static struct lpc_driver_ops cros_ec_lpc_ops =3D { }; =20 +static const struct dmi_system_id untrusted_fw_irq_wake_capable[] =3D { + { + .ident =3D "Brya", + .matches =3D { + DMI_MATCH(DMI_PRODUCT_FAMILY, "Google_Brya") + } + }, + { + .ident =3D "Brask", + .matches =3D { + DMI_MATCH(DMI_PRODUCT_FAMILY, "Google_Brask") + } + }, + { } +} +MODULE_DEVICE_TABLE(dmi, untrusted_fw_irq_wake_capable); + +static bool cros_ec_should_force_irq_wake_capable(void) +{ + return dmi_first_match(untrusted_fw_irq_wake_capable) !=3D NULL; +} + /* * A generic instance of the read function of struct lpc_driver_ops, used = for * the LPC EC. @@ -350,9 +373,11 @@ static void cros_ec_lpc_acpi_notify(acpi_handle device= , u32 value, void *data) static int cros_ec_lpc_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; + bool irq_wake =3D false; struct acpi_device *adev; acpi_status status; struct cros_ec_device *ec_dev; + struct resource irqres; u8 buf[2] =3D {}; int irq, ret; =20 @@ -428,20 +453,36 @@ static int cros_ec_lpc_probe(struct platform_device *= pdev) * Some boards do not have an IRQ allotted for cros_ec_lpc, * which makes ENXIO an expected (and safe) scenario. */ - irq =3D platform_get_irq_optional(pdev, 0); - if (irq > 0) + irq =3D platform_get_irq_resource_optional(pdev, 0, &irqres); + if (irq > 0) { ec_dev->irq =3D irq; - else if (irq !=3D -ENXIO) { + if (cros_ec_should_force_irq_wake_capable()) + irq_wake =3D true; + else + irq_wake =3D irqres.flags & IORESOURCE_IRQ_WAKECAPABLE; + dev_dbg(dev, "IRQ: %i, wake_capable: %i\n", irq, irq_wake); + } else if (irq !=3D -ENXIO) { dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq); return irq; } =20 ret =3D cros_ec_register(ec_dev); if (ret) { - dev_err(dev, "couldn't register ec_dev (%d)\n", ret); + dev_err_probe(dev, ret, "couldn't register ec_dev (%d)\n", ret); return ret; } =20 + if (irq_wake) { + ret =3D device_init_wakeup(dev, true); + if (ret) { + dev_err_probe(dev, ret, "Failed to init device for wakeup"); + return ret; + } + ret =3D dev_pm_set_wake_irq(dev, irq); + if (ret) + return ret; + } + /* * Connect a notify handler to process MKBP messages if we have a * companion ACPI device. @@ -463,6 +504,7 @@ static int cros_ec_lpc_probe(struct platform_device *pd= ev) static void cros_ec_lpc_remove(struct platform_device *pdev) { struct cros_ec_device *ec_dev =3D platform_get_drvdata(pdev); + struct device *dev =3D ec_dev->dev; struct acpi_device *adev; =20 adev =3D ACPI_COMPANION(&pdev->dev); @@ -470,6 +512,8 @@ static void cros_ec_lpc_remove(struct platform_device *= pdev) acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY, cros_ec_lpc_acpi_notify); =20 + dev_pm_clear_wake_irq(dev); + device_init_wakeup(dev, false); cros_ec_unregister(ec_dev); } =20 diff --git a/drivers/platform/chrome/cros_ec_spi.c b/drivers/platform/chrom= e/cros_ec_spi.c index 3e88cc92e8192..0aad8b2f007f6 100644 --- a/drivers/platform/chrome/cros_ec_spi.c +++ b/drivers/platform/chrome/cros_ec_spi.c @@ -7,9 +7,11 @@ #include #include #include +#include #include #include #include +#include #include #include #include @@ -70,6 +72,7 @@ * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that * is sent when we want to turn off CS at the end of a transaction. * @high_pri_worker: Used to schedule high priority work. + * @irq_wake: Whether or not irq assertion should wake the system. */ struct cros_ec_spi { struct spi_device *spi; @@ -77,6 +80,7 @@ struct cros_ec_spi { unsigned int start_of_msg_delay; unsigned int end_of_msg_delay; struct kthread_worker *high_pri_worker; + bool irq_wake; }; =20 typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev, @@ -689,12 +693,16 @@ static int cros_ec_cmd_xfer_spi(struct cros_ec_device= *ec_dev, return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi); } =20 -static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device= *dev) +static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct spi_de= vice *spi) { - struct device_node *np =3D dev->of_node; + struct cros_ec_device *ec_dev =3D spi_get_drvdata(spi); + struct device_node *np =3D spi->dev.of_node; u32 val; int ret; =20 + if (!np) + return; + ret =3D of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val); if (!ret) ec_spi->start_of_msg_delay =3D val; @@ -702,6 +710,11 @@ static void cros_ec_spi_dt_probe(struct cros_ec_spi *e= c_spi, struct device *dev) ret =3D of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); if (!ret) ec_spi->end_of_msg_delay =3D val; + + if (ec_dev->irq > 0 && of_property_read_bool(np, "wakeup-source")) { + ec_spi->irq_wake =3D true; + dev_dbg(&spi->dev, "IRQ: %i, wake_capable: %i\n", ec_dev->irq, ec_spi->i= rq_wake); + } } =20 static void cros_ec_spi_high_pri_release(void *worker) @@ -753,9 +766,6 @@ static int cros_ec_spi_probe(struct spi_device *spi) if (!ec_dev) return -ENOMEM; =20 - /* Check for any DT properties */ - cros_ec_spi_dt_probe(ec_spi, dev); - spi_set_drvdata(spi, ec_dev); ec_dev->dev =3D dev; ec_dev->priv =3D ec_spi; @@ -768,6 +778,9 @@ static int cros_ec_spi_probe(struct spi_device *spi) sizeof(struct ec_response_get_protocol_info); ec_dev->dout_size =3D sizeof(struct ec_host_request); =20 + /* Check for any DT properties */ + cros_ec_spi_dt_probe(ec_spi, spi); + ec_spi->last_transfer_ns =3D ktime_get_ns(); =20 err =3D cros_ec_spi_devm_high_pri_alloc(dev, ec_spi); @@ -776,19 +789,31 @@ static int cros_ec_spi_probe(struct spi_device *spi) =20 err =3D cros_ec_register(ec_dev); if (err) { - dev_err(dev, "cannot register EC\n"); + dev_err_probe(dev, err, "cannot register EC\n"); return err; } =20 - device_init_wakeup(&spi->dev, true); + if (ec_spi->irq_wake) { + err =3D device_init_wakeup(dev, true); + if (err) { + dev_err_probe(dev, err, "Failed to init device for wakeup\n"); + return err; + } + err =3D dev_pm_set_wake_irq(dev, ec_dev->irq); + if (err) + dev_err_probe(dev, err, "Failed to set irq(%d) for wake\n", ec_dev->irq= ); + } =20 - return 0; + return err; } =20 static void cros_ec_spi_remove(struct spi_device *spi) { struct cros_ec_device *ec_dev =3D spi_get_drvdata(spi); + struct device *dev =3D ec_dev->dev; =20 + dev_pm_clear_wake_irq(dev); + device_init_wakeup(dev, false); cros_ec_unregister(ec_dev); } =20 diff --git a/drivers/platform/chrome/cros_ec_uart.c b/drivers/platform/chro= me/cros_ec_uart.c index 68d80559fddc2..ced53bb40b2ef 100644 --- a/drivers/platform/chrome/cros_ec_uart.c +++ b/drivers/platform/chrome/cros_ec_uart.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -70,6 +71,7 @@ struct response_info { * @baudrate: UART baudrate of attached EC device. * @flowcontrol: UART flowcontrol of attached device. * @irq: Linux IRQ number of associated serial device. + * @irq_wake: Whether or not irq assertion should wake the system. * @response: Response info passing between cros_ec_uart_pkt_xfer() * and cros_ec_uart_rx_bytes() */ @@ -78,6 +80,7 @@ struct cros_ec_uart { u32 baudrate; u8 flowcontrol; u32 irq; + bool irq_wake; struct response_info response; }; =20 @@ -224,8 +227,10 @@ static int cros_ec_uart_resource(struct acpi_resource = *ares, void *data) static int cros_ec_uart_acpi_probe(struct cros_ec_uart *ec_uart) { int ret; + struct resource irqres; LIST_HEAD(resources); - struct acpi_device *adev =3D ACPI_COMPANION(&ec_uart->serdev->dev); + struct device *dev =3D &ec_uart->serdev->dev; + struct acpi_device *adev =3D ACPI_COMPANION(dev); =20 ret =3D acpi_dev_get_resources(adev, &resources, cros_ec_uart_resource, e= c_uart); if (ret < 0) @@ -234,12 +239,13 @@ static int cros_ec_uart_acpi_probe(struct cros_ec_uar= t *ec_uart) acpi_dev_free_resource_list(&resources); =20 /* Retrieve GpioInt and translate it to Linux IRQ number */ - ret =3D acpi_dev_gpio_irq_get(adev, 0); + ret =3D acpi_dev_get_gpio_irq_resource(adev, NULL, 0, &irqres); if (ret < 0) return ret; =20 - ec_uart->irq =3D ret; - dev_dbg(&ec_uart->serdev->dev, "IRQ number %d\n", ec_uart->irq); + ec_uart->irq =3D irqres.start; + ec_uart->irq_wake =3D irqres.flags & IORESOURCE_IRQ_WAKECAPABLE; + dev_dbg(dev, "IRQ: %i, wake_capable: %i\n", ec_uart->irq, ec_uart->irq_wa= ke); =20 return 0; } @@ -301,13 +307,31 @@ static int cros_ec_uart_probe(struct serdev_device *s= erdev) =20 serdev_device_set_client_ops(serdev, &cros_ec_uart_client_ops); =20 - return cros_ec_register(ec_dev); + /* Register a new cros_ec device */ + ret =3D cros_ec_register(ec_dev); + if (ret) { + dev_err(dev, "Couldn't register ec_dev (%d)\n", ret); + return ret; + } + + if (ec_uart->irq_wake) { + ret =3D device_init_wakeup(dev, true); + if (ret) { + dev_err_probe(dev, ret, "Failed to init device for wakeup"); + return ret; + } + ret =3D dev_pm_set_wake_irq(dev, ec_uart->irq); + } + return ret; } =20 static void cros_ec_uart_remove(struct serdev_device *serdev) { struct cros_ec_device *ec_dev =3D serdev_device_get_drvdata(serdev); + struct device *dev =3D ec_dev->dev; =20 + dev_pm_clear_wake_irq(dev); + device_init_wakeup(dev, false); cros_ec_unregister(ec_dev); }; =20 diff --git a/include/linux/platform_data/cros_ec_proto.h b/include/linux/pl= atform_data/cros_ec_proto.h index 8865e350c12a5..91e32db4ef715 100644 --- a/include/linux/platform_data/cros_ec_proto.h +++ b/include/linux/platform_data/cros_ec_proto.h @@ -115,7 +115,6 @@ struct cros_ec_command { * performance advantage to using dword. * @din_size: Size of din buffer to allocate (zero to use static din). * @dout_size: Size of dout buffer to allocate (zero to use static dout). - * @wake_enabled: True if this device can wake the system from sleep. * @suspended: True if this device had been suspended. * @cmd_xfer: Send command to EC and get response. * Returns the number of bytes received if the communication @@ -173,7 +172,6 @@ struct cros_ec_device { u8 *dout; int din_size; int dout_size; - bool wake_enabled; bool suspended; int (*cmd_xfer)(struct cros_ec_device *ec, struct cros_ec_command *msg); --=20 2.43.0.472.g3155946c3a-goog