From nobody Thu Nov 14 17:03:06 2024 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 311C7210E7; Wed, 20 Dec 2023 10:09:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="A4fNBGwd" X-UUID: c95aeaec9f1f11eea5db2bebc7c28f94-20231220 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=E8/fAekjxBykSa2BC/K/wB1RyxJ+T73gazGdt8LU+ro=; b=A4fNBGwdar4b21kjy94l0rGRV5JBawbAtxu+qYYISSbEMAtBF6p1/g8Qd3eLzMmDJGwIwKFBckghqxNbrVnywMv1q4/Hp0EWqeYKaEYHOhNHyUo7th/Hr52UYzEOcEPW6XlaZVGqIXKDFqpyYkWkw8l7tyYYI5slBiW3Q4XMBSc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.35,REQID:182ceb15-f65b-4ddc-8a23-bc0f11e42a3b,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:5d391d7,CLOUDID:755d618d-e2c0-40b0-a8fe-7c7e47299109,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: c95aeaec9f1f11eea5db2bebc7c28f94-20231220 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 336852908; Wed, 20 Dec 2023 18:08:56 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Dec 2023 18:08:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Dec 2023 18:08:54 +0800 From: Moudy Ho To: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Mauro Carvalho Chehab , "Matthias Brugger" , AngeloGioacchino Del Regno , Hans Verkuil CC: , , , , , , "Moudy Ho" Subject: [PATCH v10 01/16] dt-bindings: media: mediatek: mdp3: correct RDMA and WROT node with generic names Date: Wed, 20 Dec 2023 18:08:38 +0800 Message-ID: <20231220100853.20616-2-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231220100853.20616-1-moudy.ho@mediatek.com> References: <20231220100853.20616-1-moudy.ho@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.069300-8.000000 X-TMASE-MatchedRID: xwCqL1bJw75eJRw5hj8/hCZm6wdY+F8KvtVce6w5+K8QHQ+7AkbTsXGp r8/fPJWivQEW+BqnrVrnftxNodBrx8RBLZ5x+SkXH5YQyOg71ZYW40XiUkbrG9zOQo7mTgA+gT4 HLsARG1siA7lT3EYqXMCl/H6TvsoyfyoI97TEvxDdQFsmvD2aF30tCKdnhB589yM15V5aWpj6C0 ePs7A07fhmFHnZFzVq1OS3M18QrJopR/2mSzr5VUVwkBGNaI1zumB3z3Qn489PLuriof24z8mh2 Ib2qzHYNwVlEe2OlsJhNCbU2IFr3KM+tI+Th6+NSZrfNhP3sgUBh9AgBSEFrJm+YJspVvj2xkvr HlT8euJ0YHKn7N1oOA== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.069300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 7079FCC34D3987DC402CD37B3F603F7FC627810880967878C43FCEF9CFEEA3DD2000:8 X-MTK: N Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The DMA-related nodes RDMA/WROT in MDP3 should be changed to generic names. In addition, fix improper space indent in example. Fixes: 4ad7b39623ab ("media: dt-binding: mediatek: add bindings for MediaTe= k MDP3 components") Signed-off-by: Moudy Ho Acked-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/media/mediatek,mdp3-rdma.yaml | 29 +++++++++++-------- .../bindings/media/mediatek,mdp3-wrot.yaml | 23 +++++++++------ 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yam= l b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml index 59dcea797b71..e1ffe7eb2cdf 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -69,6 +69,9 @@ properties: - description: used for 1st data pipe from RDMA - description: used for 2nd data pipe from RDMA =20 + '#dma-cells': + const: 1 + required: - compatible - reg @@ -78,6 +81,7 @@ required: - clocks - iommus - mboxes + - '#dma-cells' =20 additionalProperties: false =20 @@ -88,16 +92,17 @@ examples: #include #include =20 - mdp3_rdma0: mdp3-rdma0@14001000 { - compatible =3D "mediatek,mt8183-mdp3-rdma"; - reg =3D <0x14001000 0x1000>; - mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0x1000 0x1000>; - mediatek,gce-events =3D , - ; - power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; - clocks =3D <&mmsys CLK_MM_MDP_RDMA0>, - <&mmsys CLK_MM_MDP_RSZ1>; - iommus =3D <&iommu>; - mboxes =3D <&gce 20 CMDQ_THR_PRIO_LOWEST>, - <&gce 21 CMDQ_THR_PRIO_LOWEST>; + dma-controller@14001000 { + compatible =3D "mediatek,mt8183-mdp3-rdma"; + reg =3D <0x14001000 0x1000>; + mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0x1000 0x1000>; + mediatek,gce-events =3D , + ; + power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; + clocks =3D <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>; + iommus =3D <&iommu>; + mboxes =3D <&gce 20 CMDQ_THR_PRIO_LOWEST>, + <&gce 21 CMDQ_THR_PRIO_LOWEST>; + #dma-cells =3D <1>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yam= l b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml index 0baa77198fa2..64ea98aa0592 100644 --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -50,6 +50,9 @@ properties: iommus: maxItems: 1 =20 + '#dma-cells': + const: 1 + required: - compatible - reg @@ -58,6 +61,7 @@ required: - power-domains - clocks - iommus + - '#dma-cells' =20 additionalProperties: false =20 @@ -68,13 +72,14 @@ examples: #include #include =20 - mdp3_wrot0: mdp3-wrot0@14005000 { - compatible =3D "mediatek,mt8183-mdp3-wrot"; - reg =3D <0x14005000 0x1000>; - mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0x5000 0x1000>; - mediatek,gce-events =3D , - ; - power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; - clocks =3D <&mmsys CLK_MM_MDP_WROT0>; - iommus =3D <&iommu>; + dma-controller@14005000 { + compatible =3D "mediatek,mt8183-mdp3-wrot"; + reg =3D <0x14005000 0x1000>; + mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + mediatek,gce-events =3D , + ; + power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; + clocks =3D <&mmsys CLK_MM_MDP_WROT0>; + iommus =3D <&iommu>; + #dma-cells =3D <1>; }; --=20 2.18.0