From nobody Fri Dec 19 10:57:30 2025 Received: from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com [205.220.177.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A984920DCB for ; Tue, 19 Dec 2023 15:12:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oracle.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oracle.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=oracle.com header.i=@oracle.com header.b="Ef3yLxo5" Received: from pps.filterd (m0246632.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3BJ9x1RS031609; Tue, 19 Dec 2023 15:12:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=corp-2023-11-20; bh=V6IUUm4WYnN5Ho5RFmogccesju20LkZ9tUpYKLChUyY=; b=Ef3yLxo5QP4Ya1/lLmCDz3Ry0Hko9IMIWHe/G7wlVnqeB5eWZZGeze2OLVQrdPmoU10Q 5Kzmf9L0R/0ZSAaH5foQ0uT3Pq+Jp3rmGdLZ0kseh6AaYAItGjjTUqn2GnAreRqE0iMi TFb233Sq3g+1PZmZAnqLdLbXg5GuxI+XEk/elOPPRSJXVC1x5KNdbYAHOojNiamXnE8w 4DJNYqrRKSKz5OCXa/tytvK0KnpEt76QGg/q/qc2nihHP6PjFJLVb5YvT04aPbGbhDYJ qrFh9sE94bN+Ts4m1gFQEUyJXqHltU/x84v5uRzd17wl2zCoGC/pMRPtE1tqy9EPsLlr vQ== Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.appoci.oracle.com [138.1.37.129]) by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 3v13gue417-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Dec 2023 15:12:12 +0000 Received: from pps.filterd (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (8.17.1.19/8.17.1.19) with ESMTP id 3BJE9F5K029212; Tue, 19 Dec 2023 15:12:12 GMT Received: from pps.reinject (localhost [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTPS id 3v12b6w791-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Dec 2023 15:12:11 +0000 Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3BJF7SdN008899; Tue, 19 Dec 2023 15:12:11 GMT Received: from localhost.localdomain (dhcp-10-175-58-169.vpn.oracle.com [10.175.58.169]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTP id 3v12b6w71u-2; Tue, 19 Dec 2023 15:12:11 +0000 From: Vegard Nossum To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, Brian Gerst , Peter Zijlstra , Linus Torvalds , Vegard Nossum Subject: [PATCH 1/5] x86: provide new infrastructure for GDT descriptors Date: Tue, 19 Dec 2023 16:11:56 +0100 Message-Id: <20231219151200.2878271-2-vegard.nossum@oracle.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231219151200.2878271-1-vegard.nossum@oracle.com> References: <20231219151200.2878271-1-vegard.nossum@oracle.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-19_08,2023-12-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 mlxscore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312190113 X-Proofpoint-ORIG-GUID: 9R0Z_daTIlJ9l5KVFqEgRmnzkj4sdOB3 X-Proofpoint-GUID: 9R0Z_daTIlJ9l5KVFqEgRmnzkj4sdOB3 Content-Type: text/plain; charset="utf-8" Linus suggested replacing the magic numbers in the GDT descriptors using preprocessor macros. Designing the interface properly is actually pretty hard -- there are several constraints: - you want the final expressions to be readable at a glance; something like GDT_ENTRY_FLAGS(5, 1, 0, 1, 0, 1, 1, 0) isn't because you need to visit the definition to understand what each parameter represents and then match up parameters in the user and the definition (which is hard when there are so many of them) - you want the final expressions to be fairly short/information-dense; something like GDT_ENTRY_PRESENT | GDT_ENTRY_DATA_WRITABLE | GDT_ENTRY_SYSTEM | GDT_ENTRY_DB | GDT_ENTRY_GRANULARITY_4K is a bit too verbose to write out every time and is actually hard to read as well because of all the repetition - you may want to assume defaults for some things (e.g. entries are DPL-0 a.k.a. kernel segments by default) and allow the user to override the default -- but this works best if you can OR in the override; if you want DPL-3 by default and override with DPL-0 you would need to start masking off bits instead of OR-ing them in and that just becomes harder to read - you may want to parameterize some things (e.g. CODE vs. DATA or KERNEL vs. USER) since both values are used and you don't really want prefer either one by default -- or DPL, which is always some value that is always specified This patch tries to balance these requirements and has two layers of definitions -- low-level and high-level: - the low-level defines are the mapping between human-readable names and the actual bit numbers - the high-level defines are the mapping from high-level intent to combinations of low-level flags, representing roughly a tuple (data/code/tss, 64/32/16-bits) plus an override for DPL-3 (=3D USER), since that's relatively rare but still very important to mark properly for those segments. - we have *_BIOS variants for 32-bit code and data segments that don't have the G flag set and give the limit in terms of bytes instead of pages Link: https://lore.kernel.org/all/CAHk-=3Dwib5XLebuEra7y2YH96wxdk=3D8vJnA8X= oVq0FExpzVvN=3DQ@mail.gmail.com/ Signed-off-by: Vegard Nossum --- arch/x86/include/asm/desc_defs.h | 66 ++++++++++++++++++++++++++++---- 1 file changed, 58 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/desc_defs.h b/arch/x86/include/asm/desc_d= efs.h index f7e7099af595..b33f5bb240eb 100644 --- a/arch/x86/include/asm/desc_defs.h +++ b/arch/x86/include/asm/desc_defs.h @@ -8,6 +8,56 @@ * archs. */ =20 +/* + * Low-level interface mapping flags/field names to bits + */ + +/* Flags for _DESC_S (non-system) descriptors */ +#define _DESC_ACCESSED 0x0001 +#define _DESC_DATA_WRITABLE 0x0002 +#define _DESC_CODE_READABLE 0x0002 +#define _DESC_DATA_EXPAND_DOWN 0x0004 +#define _DESC_CODE_CONFORMING 0x0004 +#define _DESC_CODE_EXECUTABLE 0x0008 + +/* Common flags */ +#define _DESC_S 0x0010 +#define _DESC_DPL(dpl) ((dpl) << 5) +#define _DESC_PRESENT 0x0080 + +#define _DESC_LONG_CODE 0x2000 +#define _DESC_DB 0x4000 +#define _DESC_GRANULARITY_4K 0x8000 + +/* System descriptors have a numeric "type" field instead of flags */ +#define _DESC_SYSTEM(code) (code) + +/* + * High-level interface mapping intended usage to low-level combinations + * of flags + */ + +#define _DESC_DATA (_DESC_S | _DESC_PRESENT | \ + _DESC_DATA_WRITABLE) +#define _DESC_CODE (_DESC_S | _DESC_PRESENT | \ + _DESC_CODE_READABLE | _DESC_CODE_EXECUTABLE) + +#define DESC_DATA16 (_DESC_DATA) +#define DESC_CODE16 (_DESC_CODE) + +#define DESC_DATA32 (_DESC_DATA | _DESC_GRANULARITY_4K | _DESC_DB) +#define DESC_DATA32_BIOS (_DESC_DATA | _DESC_DB) + +#define DESC_CODE32 (_DESC_CODE | _DESC_GRANULARITY_4K | _DESC_DB) +#define DESC_CODE32_BIOS (_DESC_CODE | _DESC_DB) + +#define DESC_TSS32 (_DESC_SYSTEM(9) | _DESC_PRESENT) + +#define DESC_DATA64 (_DESC_DATA | _DESC_GRANULARITY_4K | _DESC_DB) +#define DESC_CODE64 (_DESC_CODE | _DESC_GRANULARITY_4K | _DESC_LONG_CODE) + +#define DESC_USER (_DESC_DPL(3)) + #ifndef __ASSEMBLY__ =20 #include @@ -27,14 +77,14 @@ struct desc_struct { .base0 =3D (u16) (base), \ .base1 =3D ((base) >> 16) & 0xFF, \ .base2 =3D ((base) >> 24) & 0xFF, \ - .type =3D (flags & 0x0f), \ - .s =3D (flags >> 4) & 0x01, \ - .dpl =3D (flags >> 5) & 0x03, \ - .p =3D (flags >> 7) & 0x01, \ - .avl =3D (flags >> 12) & 0x01, \ - .l =3D (flags >> 13) & 0x01, \ - .d =3D (flags >> 14) & 0x01, \ - .g =3D (flags >> 15) & 0x01, \ + .type =3D ((flags) & 0x0f), \ + .s =3D ((flags) >> 4) & 0x01, \ + .dpl =3D ((flags) >> 5) & 0x03, \ + .p =3D ((flags) >> 7) & 0x01, \ + .avl =3D ((flags) >> 12) & 0x01, \ + .l =3D ((flags) >> 13) & 0x01, \ + .d =3D ((flags) >> 14) & 0x01, \ + .g =3D ((flags) >> 15) & 0x01, \ } =20 enum { --=20 2.34.1 From nobody Fri Dec 19 10:57:30 2025 Received: from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com [205.220.177.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC2D020DC7 for ; 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Tue, 19 Dec 2023 15:12:16 +0000 Received: from pps.filterd (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (8.17.1.19/8.17.1.19) with ESMTP id 3BJEAb9N029105; Tue, 19 Dec 2023 15:12:15 GMT Received: from pps.reinject (localhost [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTPS id 3v12b6w7c3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Dec 2023 15:12:15 +0000 Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3BJF7SdP008899; Tue, 19 Dec 2023 15:12:14 GMT Received: from localhost.localdomain (dhcp-10-175-58-169.vpn.oracle.com [10.175.58.169]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTP id 3v12b6w71u-3; Tue, 19 Dec 2023 15:12:14 +0000 From: Vegard Nossum To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, Brian Gerst , Peter Zijlstra , Linus Torvalds , Vegard Nossum Subject: [PATCH 2/5] x86: replace magic numbers in GDT descriptors, part 1 Date: Tue, 19 Dec 2023 16:11:57 +0100 Message-Id: <20231219151200.2878271-3-vegard.nossum@oracle.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231219151200.2878271-1-vegard.nossum@oracle.com> References: <20231219151200.2878271-1-vegard.nossum@oracle.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-19_08,2023-12-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 mlxscore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312190113 X-Proofpoint-GUID: iC0-4Gw37qFi30fZuKLHZL7xhP7oriIM X-Proofpoint-ORIG-GUID: iC0-4Gw37qFi30fZuKLHZL7xhP7oriIM Content-Type: text/plain; charset="utf-8" We'd like to replace all the magic numbers in various GDT descriptors with new, semantically meaningful, symbolic values. In order to be able to verify that the change doesn't cause any actual changes to the compiled binary code, I've split the change into two patches: Part 1 (this commit): everything _but_ actually replacing the numbers Part 2 (the following commit): _only_ replacing the numbers These two commits may be squashed together when merged. The reason we need this split for verification is that including new headers causes some spurious changes to the object files, mostly line number changes in the debug info but occasionally other subtle codegen changes. Link: https://lore.kernel.org/all/CAHk-=3Dwib5XLebuEra7y2YH96wxdk=3D8vJnA8X= oVq0FExpzVvN=3DQ@mail.gmail.com/ Signed-off-by: Vegard Nossum --- arch/x86/boot/pm.c | 1 + arch/x86/include/asm/desc_defs.h | 2 ++ arch/x86/kernel/cpu/common.c | 8 -------- arch/x86/platform/pvh/head.S | 1 + arch/x86/realmode/rm/reboot.S | 1 + 5 files changed, 5 insertions(+), 8 deletions(-) diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c index 40031a614712..0361b5307bd8 100644 --- a/arch/x86/boot/pm.c +++ b/arch/x86/boot/pm.c @@ -11,6 +11,7 @@ */ =20 #include "boot.h" +#include #include =20 /* diff --git a/arch/x86/include/asm/desc_defs.h b/arch/x86/include/asm/desc_d= efs.h index b33f5bb240eb..014878e584fe 100644 --- a/arch/x86/include/asm/desc_defs.h +++ b/arch/x86/include/asm/desc_defs.h @@ -144,6 +144,7 @@ struct gate_struct { =20 typedef struct gate_struct gate_desc; =20 +#ifndef _SETUP static inline unsigned long gate_offset(const gate_desc *g) { #ifdef CONFIG_X86_64 @@ -158,6 +159,7 @@ static inline unsigned long gate_segment(const gate_des= c *g) { return g->segment; } +#endif =20 struct desc_ptr { unsigned short size; diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index b14fc8c1c953..ceb6e4b6d57e 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -204,25 +204,17 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page= ) =3D { .gdt =3D { * They code segments and data segments have fixed 64k limits, * the transfer segment sizes are set at run time. */ - /* 32-bit code */ [GDT_ENTRY_PNPBIOS_CS32] =3D GDT_ENTRY_INIT(0x409a, 0, 0xffff), - /* 16-bit code */ [GDT_ENTRY_PNPBIOS_CS16] =3D GDT_ENTRY_INIT(0x009a, 0, 0xffff), - /* 16-bit data */ [GDT_ENTRY_PNPBIOS_DS] =3D GDT_ENTRY_INIT(0x0092, 0, 0xffff), - /* 16-bit data */ [GDT_ENTRY_PNPBIOS_TS1] =3D GDT_ENTRY_INIT(0x0092, 0, 0), - /* 16-bit data */ [GDT_ENTRY_PNPBIOS_TS2] =3D GDT_ENTRY_INIT(0x0092, 0, 0), /* * The APM segments have byte granularity and their bases * are set at run time. All have 64k limits. */ - /* 32-bit code */ [GDT_ENTRY_APMBIOS_BASE] =3D GDT_ENTRY_INIT(0x409a, 0, 0xffff), - /* 16-bit code */ [GDT_ENTRY_APMBIOS_BASE+1] =3D GDT_ENTRY_INIT(0x009a, 0, 0xffff), - /* data */ [GDT_ENTRY_APMBIOS_BASE+2] =3D GDT_ENTRY_INIT(0x4092, 0, 0xffff), =20 [GDT_ENTRY_ESPFIX_SS] =3D GDT_ENTRY_INIT(0xc092, 0, 0xfffff), diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S index c4365a05ab83..9bcafdded2a1 100644 --- a/arch/x86/platform/pvh/head.S +++ b/arch/x86/platform/pvh/head.S @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/x86/realmode/rm/reboot.S b/arch/x86/realmode/rm/reboot.S index f10515b10e0a..447641820a8d 100644 --- a/arch/x86/realmode/rm/reboot.S +++ b/arch/x86/realmode/rm/reboot.S @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ #include +#include #include #include #include --=20 2.34.1 From nobody Fri Dec 19 10:57:30 2025 Received: from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com [205.220.177.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C604C20DD1 for ; Tue, 19 Dec 2023 15:12:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oracle.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oracle.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=oracle.com header.i=@oracle.com header.b="J5oHC+OQ" Received: from pps.filterd (m0246630.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3BJ9x1M3028212; Tue, 19 Dec 2023 15:12:20 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=corp-2023-11-20; bh=ddGyKDys05MLGTK4U9g4t4jlQdkek2GlwLVRehG8mj8=; b=J5oHC+OQTs9a9BLGGpxLtm9N2WTGasvE18XuWT9zLy58pwGZJ5QYnVT5BpYg7mzMTGV2 UM34GpctHZyk3rXbuh38WO4sreEZZp6Cm5+SNXsjTs8Z9sBEMoKSONEb+aDKzAbJoYIU aLqhMCCJ2QOwki4qKkoJgg765pLkIppkV+KAvIN93yEwvwvsr/fwI9Z0sRvr5l5GydLf dUThlBymBXmqUkrhZNJzlcUsSwnH5r+6n3lDeUoydvbV9GQB4oqwQ/1wjPVZJGGDI1AF V5tE8vNe5MgpezIAyeUGmC2iVv6LJhUf4iccp28vHtEIcOw/iH95ilwZANIGtO6f7Hg9 TA== Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.appoci.oracle.com [138.1.37.129]) by mx0b-00069f02.pphosted.com (PPS) with ESMTPS id 3v12aee296-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Dec 2023 15:12:20 +0000 Received: from pps.filterd (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (8.17.1.19/8.17.1.19) with ESMTP id 3BJEZpLX029167; Tue, 19 Dec 2023 15:12:19 GMT Received: from pps.reinject (localhost [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTPS id 3v12b6w7fk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Dec 2023 15:12:19 +0000 Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3BJF7SdR008899; Tue, 19 Dec 2023 15:12:18 GMT Received: from localhost.localdomain (dhcp-10-175-58-169.vpn.oracle.com [10.175.58.169]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTP id 3v12b6w71u-4; Tue, 19 Dec 2023 15:12:18 +0000 From: Vegard Nossum To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, Brian Gerst , Peter Zijlstra , Linus Torvalds , Vegard Nossum Subject: [PATCH 3/5] x86: replace magic numbers in GDT descriptors, part 2 Date: Tue, 19 Dec 2023 16:11:58 +0100 Message-Id: <20231219151200.2878271-4-vegard.nossum@oracle.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231219151200.2878271-1-vegard.nossum@oracle.com> References: <20231219151200.2878271-1-vegard.nossum@oracle.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-19_08,2023-12-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 mlxscore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312190113 X-Proofpoint-ORIG-GUID: lj19XYphJT7S4FFUGQx6WK2MoL9A9qeq X-Proofpoint-GUID: lj19XYphJT7S4FFUGQx6WK2MoL9A9qeq Content-Type: text/plain; charset="utf-8" Actually replace the numeric values by the new symbolic values. I used this to find all the existing users of the GDT_ENTRY*() macros: $ git grep -P 'GDT_ENTRY(_INIT)?\(' Some of the lines will exceed 80 characters, but some of them will be shorter again in the next couple of patches. Link: https://lore.kernel.org/all/CAHk-=3Dwib5XLebuEra7y2YH96wxdk=3D8vJnA8X= oVq0FExpzVvN=3DQ@mail.gmail.com/ Signed-off-by: Vegard Nossum --- arch/x86/boot/pm.c | 6 ++-- arch/x86/kernel/apm_32.c | 2 +- arch/x86/kernel/cpu/common.c | 40 ++++++++++++------------- arch/x86/kernel/head64.c | 6 ++-- arch/x86/kernel/setup_percpu.c | 4 +-- arch/x86/platform/pvh/head.S | 6 ++-- arch/x86/realmode/rm/reboot.S | 2 +- drivers/firmware/efi/libstub/x86-5lvl.c | 4 +-- drivers/pnp/pnpbios/bioscalls.c | 2 +- 9 files changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c index 0361b5307bd8..ab35b52d2c4b 100644 --- a/arch/x86/boot/pm.c +++ b/arch/x86/boot/pm.c @@ -68,13 +68,13 @@ static void setup_gdt(void) being 8-byte unaligned. Intel recommends 16 byte alignment. */ static const u64 boot_gdt[] __attribute__((aligned(16))) =3D { /* CS: code, read/execute, 4 GB, base 0 */ - [GDT_ENTRY_BOOT_CS] =3D GDT_ENTRY(0xc09b, 0, 0xfffff), + [GDT_ENTRY_BOOT_CS] =3D GDT_ENTRY(DESC_CODE32 | _DESC_ACCESSED, 0, 0xfff= ff), /* DS: data, read/write, 4 GB, base 0 */ - [GDT_ENTRY_BOOT_DS] =3D GDT_ENTRY(0xc093, 0, 0xfffff), + [GDT_ENTRY_BOOT_DS] =3D GDT_ENTRY(DESC_DATA32 | _DESC_ACCESSED, 0, 0xfff= ff), /* TSS: 32-bit tss, 104 bytes, base 4096 */ /* We only have a TSS here to keep Intel VT happy; we don't actually use it for anything. */ - [GDT_ENTRY_BOOT_TSS] =3D GDT_ENTRY(0x0089, 4096, 103), + [GDT_ENTRY_BOOT_TSS] =3D GDT_ENTRY(DESC_TSS32, 4096, 103), }; /* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead of the gdt_ptr contents. Thus, make it static so it will diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index 5934ee5bc087..76a5ced278c2 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c @@ -420,7 +420,7 @@ static DEFINE_MUTEX(apm_mutex); * This is for buggy BIOS's that refer to (real mode) segment 0x40 * even though they are called in protected mode. */ -static struct desc_struct bad_bios_desc =3D GDT_ENTRY_INIT(0x4092, +static struct desc_struct bad_bios_desc =3D GDT_ENTRY_INIT(DESC_DATA32_BIO= S, (unsigned long)__va(0x400UL), PAGE_SIZE - 0x400 - 1); =20 static const char driver_version[] =3D "1.16ac"; /* no spaces */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index ceb6e4b6d57e..32934a0656af 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -188,37 +188,37 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page= ) =3D { .gdt =3D { * TLS descriptors are currently at a different place compared to i386. * Hopefully nobody expects them at a fixed place (Wine?) */ - [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(0xc09b, 0, 0xfffff), - [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(0xa09b, 0, 0xfffff), - [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(0xc093, 0, 0xfffff), - [GDT_ENTRY_DEFAULT_USER32_CS] =3D GDT_ENTRY_INIT(0xc0fb, 0, 0xfffff), - [GDT_ENTRY_DEFAULT_USER_DS] =3D GDT_ENTRY_INIT(0xc0f3, 0, 0xfffff), - [GDT_ENTRY_DEFAULT_USER_CS] =3D GDT_ENTRY_INIT(0xa0fb, 0, 0xfffff), + [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | _DESC_ACCESSED,= 0, 0xfffff), + [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | _DESC_ACCESSED, 0= , 0xfffff), + [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA64 | _DESC_ACCESSED, 0= , 0xfffff), + [GDT_ENTRY_DEFAULT_USER32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | DESC_USER = | _DESC_ACCESSED, 0, 0xfffff), + [GDT_ENTRY_DEFAULT_USER_DS] =3D GDT_ENTRY_INIT(DESC_DATA64 | DESC_USER | = _DESC_ACCESSED, 0, 0xfffff), + [GDT_ENTRY_DEFAULT_USER_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | DESC_USER | = _DESC_ACCESSED, 0, 0xfffff), #else - [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(0xc09a, 0, 0xfffff), - [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(0xc092, 0, 0xfffff), - [GDT_ENTRY_DEFAULT_USER_CS] =3D GDT_ENTRY_INIT(0xc0fa, 0, 0xfffff), - [GDT_ENTRY_DEFAULT_USER_DS] =3D GDT_ENTRY_INIT(0xc0f2, 0, 0xfffff), + [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE32, 0, 0xfffff), + [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA32, 0, 0xfffff), + [GDT_ENTRY_DEFAULT_USER_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | DESC_USER, 0= , 0xfffff), + [GDT_ENTRY_DEFAULT_USER_DS] =3D GDT_ENTRY_INIT(DESC_DATA32 | DESC_USER, 0= , 0xfffff), /* * Segments used for calling PnP BIOS have byte granularity. * They code segments and data segments have fixed 64k limits, * the transfer segment sizes are set at run time. */ - [GDT_ENTRY_PNPBIOS_CS32] =3D GDT_ENTRY_INIT(0x409a, 0, 0xffff), - [GDT_ENTRY_PNPBIOS_CS16] =3D GDT_ENTRY_INIT(0x009a, 0, 0xffff), - [GDT_ENTRY_PNPBIOS_DS] =3D GDT_ENTRY_INIT(0x0092, 0, 0xffff), - [GDT_ENTRY_PNPBIOS_TS1] =3D GDT_ENTRY_INIT(0x0092, 0, 0), - [GDT_ENTRY_PNPBIOS_TS2] =3D GDT_ENTRY_INIT(0x0092, 0, 0), + [GDT_ENTRY_PNPBIOS_CS32] =3D GDT_ENTRY_INIT(DESC_CODE32_BIOS, 0, 0xffff), + [GDT_ENTRY_PNPBIOS_CS16] =3D GDT_ENTRY_INIT(DESC_CODE16, 0, 0xffff), + [GDT_ENTRY_PNPBIOS_DS] =3D GDT_ENTRY_INIT(DESC_DATA16, 0, 0xffff), + [GDT_ENTRY_PNPBIOS_TS1] =3D GDT_ENTRY_INIT(DESC_DATA16, 0, 0), + [GDT_ENTRY_PNPBIOS_TS2] =3D GDT_ENTRY_INIT(DESC_DATA16, 0, 0), /* * The APM segments have byte granularity and their bases * are set at run time. All have 64k limits. */ - [GDT_ENTRY_APMBIOS_BASE] =3D GDT_ENTRY_INIT(0x409a, 0, 0xffff), - [GDT_ENTRY_APMBIOS_BASE+1] =3D GDT_ENTRY_INIT(0x009a, 0, 0xffff), - [GDT_ENTRY_APMBIOS_BASE+2] =3D GDT_ENTRY_INIT(0x4092, 0, 0xffff), + [GDT_ENTRY_APMBIOS_BASE] =3D GDT_ENTRY_INIT(DESC_CODE32_BIOS, 0, 0xffff), + [GDT_ENTRY_APMBIOS_BASE+1] =3D GDT_ENTRY_INIT(DESC_CODE16, 0, 0xffff), + [GDT_ENTRY_APMBIOS_BASE+2] =3D GDT_ENTRY_INIT(DESC_DATA32_BIOS, 0, 0xffff= ), =20 - [GDT_ENTRY_ESPFIX_SS] =3D GDT_ENTRY_INIT(0xc092, 0, 0xfffff), - [GDT_ENTRY_PERCPU] =3D GDT_ENTRY_INIT(0xc092, 0, 0xfffff), + [GDT_ENTRY_ESPFIX_SS] =3D GDT_ENTRY_INIT(DESC_DATA32, 0, 0xfffff), + [GDT_ENTRY_PERCPU] =3D GDT_ENTRY_INIT(DESC_DATA32, 0, 0xfffff), #endif } }; EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 05a110c97111..00dbddfdfece 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -71,9 +71,9 @@ EXPORT_SYMBOL(vmemmap_base); * GDT used on the boot CPU before switching to virtual addresses. */ static struct desc_struct startup_gdt[GDT_ENTRIES] __initdata =3D { - [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(0xc09b, 0, 0xfffff), - [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(0xa09b, 0, 0xfffff), - [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(0xc093, 0, 0xfffff), + [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | _DESC_AC= CESSED, 0, 0xfffff), + [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | _DESC_AC= CESSED, 0, 0xfffff), + [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA64 | _DESC_AC= CESSED, 0, 0xfffff), }; =20 /* diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index 2c97bf7b56ae..f2583de97a64 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c @@ -106,8 +106,8 @@ void __init pcpu_populate_pte(unsigned long addr) static inline void setup_percpu_segment(int cpu) { #ifdef CONFIG_X86_32 - struct desc_struct d =3D GDT_ENTRY_INIT(0x8092, per_cpu_offset(cpu), - 0xFFFFF); + struct desc_struct d =3D GDT_ENTRY_INIT(DESC_DATA32 & ~_DESC_DB, + per_cpu_offset(cpu), 0xFFFFF); =20 write_gdt_entry(get_cpu_gdt_rw(cpu), GDT_ENTRY_PERCPU, &d, DESCTYPE_S); #endif diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S index 9bcafdded2a1..7c6a1089ce1c 100644 --- a/arch/x86/platform/pvh/head.S +++ b/arch/x86/platform/pvh/head.S @@ -149,11 +149,11 @@ SYM_DATA_END(gdt) SYM_DATA_START_LOCAL(gdt_start) .quad 0x0000000000000000 /* NULL descriptor */ #ifdef CONFIG_X86_64 - .quad GDT_ENTRY(0xa09a, 0, 0xfffff) /* PVH_CS_SEL */ + .quad GDT_ENTRY(DESC_CODE64, 0, 0xfffff) /* PVH_CS_SEL */ #else - .quad GDT_ENTRY(0xc09a, 0, 0xfffff) /* PVH_CS_SEL */ + .quad GDT_ENTRY(DESC_CODE32, 0, 0xfffff) /* PVH_CS_SEL */ #endif - .quad GDT_ENTRY(0xc092, 0, 0xfffff) /* PVH_DS_SEL */ + .quad GDT_ENTRY(DESC_DATA32, 0, 0xfffff) /* PVH_DS_SEL */ SYM_DATA_END_LABEL(gdt_start, SYM_L_LOCAL, gdt_end) =20 .balign 16 diff --git a/arch/x86/realmode/rm/reboot.S b/arch/x86/realmode/rm/reboot.S index 447641820a8d..5bc068b9acdd 100644 --- a/arch/x86/realmode/rm/reboot.S +++ b/arch/x86/realmode/rm/reboot.S @@ -154,5 +154,5 @@ SYM_DATA_START(machine_real_restart_gdt) * base value 0x100; since this is consistent with real mode * semantics we don't have to reload the segments once CR0.PE =3D 0. */ - .quad GDT_ENTRY(0x0093, 0x100, 0xffff) + .quad GDT_ENTRY(DESC_DATA16 | _DESC_ACCESSED, 0x100, 0xffff) SYM_DATA_END(machine_real_restart_gdt) diff --git a/drivers/firmware/efi/libstub/x86-5lvl.c b/drivers/firmware/efi= /libstub/x86-5lvl.c index 479dd445acdc..005dd9b14f95 100644 --- a/drivers/firmware/efi/libstub/x86-5lvl.c +++ b/drivers/firmware/efi/libstub/x86-5lvl.c @@ -13,8 +13,8 @@ bool efi_no5lvl; static void (*la57_toggle)(void *cr3); =20 static const struct desc_struct gdt[] =3D { - [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(0xc09b, 0, 0xfffff), - [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(0xa09b, 0, 0xfffff), + [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | _DESC_ACCESSED, = 0, 0xfffff), + [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | _DESC_ACCESSED, = 0, 0xfffff), }; =20 /* diff --git a/drivers/pnp/pnpbios/bioscalls.c b/drivers/pnp/pnpbios/bioscall= s.c index ddc6f2163c8e..1f31dce5835a 100644 --- a/drivers/pnp/pnpbios/bioscalls.c +++ b/drivers/pnp/pnpbios/bioscalls.c @@ -60,7 +60,7 @@ do { \ set_desc_limit(&gdt[(selname) >> 3], (size) - 1); \ } while(0) =20 -static struct desc_struct bad_bios_desc =3D GDT_ENTRY_INIT(0x4092, +static struct desc_struct bad_bios_desc =3D GDT_ENTRY_INIT(DESC_DATA32_BIO= S, (unsigned long)__va(0x400UL), PAGE_SIZE - 0x400 - 1); =20 /* --=20 2.34.1 From nobody Fri Dec 19 10:57:30 2025 Received: from mx0a-00069f02.pphosted.com (mx0a-00069f02.pphosted.com [205.220.165.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 831E535267 for ; Tue, 19 Dec 2023 15:13:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oracle.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oracle.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=oracle.com header.i=@oracle.com header.b="j0HOYbgd" Received: from pps.filterd (m0246627.ppops.net [127.0.0.1]) by mx0b-00069f02.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3BJ9xCQo011288; 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Tue, 19 Dec 2023 15:12:22 GMT Received: from pps.reinject (localhost [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTPS id 3v12b6w7jr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Dec 2023 15:12:22 +0000 Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3BJF7SdT008899; Tue, 19 Dec 2023 15:12:22 GMT Received: from localhost.localdomain (dhcp-10-175-58-169.vpn.oracle.com [10.175.58.169]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTP id 3v12b6w71u-5; Tue, 19 Dec 2023 15:12:22 +0000 From: Vegard Nossum To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, Brian Gerst , Peter Zijlstra , Linus Torvalds , Vegard Nossum Subject: [PATCH 4/5] x86: always set A (accessed) flag in GDT descriptors Date: Tue, 19 Dec 2023 16:11:59 +0100 Message-Id: <20231219151200.2878271-5-vegard.nossum@oracle.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231219151200.2878271-1-vegard.nossum@oracle.com> References: <20231219151200.2878271-1-vegard.nossum@oracle.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-19_08,2023-12-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 mlxscore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312190113 X-Proofpoint-GUID: HpLnaHOOCUXrdT9GMDCRfspyGwpFQhaY X-Proofpoint-ORIG-GUID: HpLnaHOOCUXrdT9GMDCRfspyGwpFQhaY Content-Type: text/plain; charset="utf-8" We have no known use for having the CPU track whether GDT descriptors have been accessed or not. Simplify the code by adding the flag to the common flags and removing it everywhere else. Link: https://lore.kernel.org/all/CAHk-=3Dwib5XLebuEra7y2YH96wxdk=3D8vJnA8X= oVq0FExpzVvN=3DQ@mail.gmail.com/ Signed-off-by: Vegard Nossum --- arch/x86/boot/pm.c | 4 ++-- arch/x86/include/asm/desc_defs.h | 4 ++-- arch/x86/kernel/cpu/common.c | 12 ++++++------ arch/x86/kernel/head64.c | 6 +++--- arch/x86/realmode/rm/reboot.S | 2 +- drivers/firmware/efi/libstub/x86-5lvl.c | 4 ++-- 6 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c index ab35b52d2c4b..5941f930f6c5 100644 --- a/arch/x86/boot/pm.c +++ b/arch/x86/boot/pm.c @@ -68,9 +68,9 @@ static void setup_gdt(void) being 8-byte unaligned. Intel recommends 16 byte alignment. */ static const u64 boot_gdt[] __attribute__((aligned(16))) =3D { /* CS: code, read/execute, 4 GB, base 0 */ - [GDT_ENTRY_BOOT_CS] =3D GDT_ENTRY(DESC_CODE32 | _DESC_ACCESSED, 0, 0xfff= ff), + [GDT_ENTRY_BOOT_CS] =3D GDT_ENTRY(DESC_CODE32, 0, 0xfffff), /* DS: data, read/write, 4 GB, base 0 */ - [GDT_ENTRY_BOOT_DS] =3D GDT_ENTRY(DESC_DATA32 | _DESC_ACCESSED, 0, 0xfff= ff), + [GDT_ENTRY_BOOT_DS] =3D GDT_ENTRY(DESC_DATA32, 0, 0xfffff), /* TSS: 32-bit tss, 104 bytes, base 4096 */ /* We only have a TSS here to keep Intel VT happy; we don't actually use it for anything. */ diff --git a/arch/x86/include/asm/desc_defs.h b/arch/x86/include/asm/desc_d= efs.h index 014878e584fe..f9282bcb0a91 100644 --- a/arch/x86/include/asm/desc_defs.h +++ b/arch/x86/include/asm/desc_defs.h @@ -37,9 +37,9 @@ * of flags */ =20 -#define _DESC_DATA (_DESC_S | _DESC_PRESENT | \ +#define _DESC_DATA (_DESC_S | _DESC_PRESENT | _DESC_ACCESSED | \ _DESC_DATA_WRITABLE) -#define _DESC_CODE (_DESC_S | _DESC_PRESENT | \ +#define _DESC_CODE (_DESC_S | _DESC_PRESENT | _DESC_ACCESSED | \ _DESC_CODE_READABLE | _DESC_CODE_EXECUTABLE) =20 #define DESC_DATA16 (_DESC_DATA) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 32934a0656af..6184488a7d77 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -188,12 +188,12 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page= ) =3D { .gdt =3D { * TLS descriptors are currently at a different place compared to i386. * Hopefully nobody expects them at a fixed place (Wine?) */ - [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | _DESC_ACCESSED,= 0, 0xfffff), - [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | _DESC_ACCESSED, 0= , 0xfffff), - [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA64 | _DESC_ACCESSED, 0= , 0xfffff), - [GDT_ENTRY_DEFAULT_USER32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | DESC_USER = | _DESC_ACCESSED, 0, 0xfffff), - [GDT_ENTRY_DEFAULT_USER_DS] =3D GDT_ENTRY_INIT(DESC_DATA64 | DESC_USER | = _DESC_ACCESSED, 0, 0xfffff), - [GDT_ENTRY_DEFAULT_USER_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | DESC_USER | = _DESC_ACCESSED, 0, 0xfffff), + [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32, 0, 0xfffff), + [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64, 0, 0xfffff), + [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA64, 0, 0xfffff), + [GDT_ENTRY_DEFAULT_USER32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | DESC_USER,= 0, 0xfffff), + [GDT_ENTRY_DEFAULT_USER_DS] =3D GDT_ENTRY_INIT(DESC_DATA64 | DESC_USER, 0= , 0xfffff), + [GDT_ENTRY_DEFAULT_USER_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | DESC_USER, 0= , 0xfffff), #else [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE32, 0, 0xfffff), [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA32, 0, 0xfffff), diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 00dbddfdfece..dc0956067944 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -71,9 +71,9 @@ EXPORT_SYMBOL(vmemmap_base); * GDT used on the boot CPU before switching to virtual addresses. */ static struct desc_struct startup_gdt[GDT_ENTRIES] __initdata =3D { - [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | _DESC_AC= CESSED, 0, 0xfffff), - [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | _DESC_AC= CESSED, 0, 0xfffff), - [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA64 | _DESC_AC= CESSED, 0, 0xfffff), + [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32, 0, 0xffff= f), + [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64, 0, 0xffff= f), + [GDT_ENTRY_KERNEL_DS] =3D GDT_ENTRY_INIT(DESC_DATA64, 0, 0xffff= f), }; =20 /* diff --git a/arch/x86/realmode/rm/reboot.S b/arch/x86/realmode/rm/reboot.S index 5bc068b9acdd..e714b4624e36 100644 --- a/arch/x86/realmode/rm/reboot.S +++ b/arch/x86/realmode/rm/reboot.S @@ -154,5 +154,5 @@ SYM_DATA_START(machine_real_restart_gdt) * base value 0x100; since this is consistent with real mode * semantics we don't have to reload the segments once CR0.PE =3D 0. */ - .quad GDT_ENTRY(DESC_DATA16 | _DESC_ACCESSED, 0x100, 0xffff) + .quad GDT_ENTRY(DESC_DATA16, 0x100, 0xffff) SYM_DATA_END(machine_real_restart_gdt) diff --git a/drivers/firmware/efi/libstub/x86-5lvl.c b/drivers/firmware/efi= /libstub/x86-5lvl.c index 005dd9b14f95..77359e802181 100644 --- a/drivers/firmware/efi/libstub/x86-5lvl.c +++ b/drivers/firmware/efi/libstub/x86-5lvl.c @@ -13,8 +13,8 @@ bool efi_no5lvl; static void (*la57_toggle)(void *cr3); =20 static const struct desc_struct gdt[] =3D { - [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32 | _DESC_ACCESSED, = 0, 0xfffff), - [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64 | _DESC_ACCESSED, = 0, 0xfffff), + [GDT_ENTRY_KERNEL32_CS] =3D GDT_ENTRY_INIT(DESC_CODE32, 0, 0xfffff), + [GDT_ENTRY_KERNEL_CS] =3D GDT_ENTRY_INIT(DESC_CODE64, 0, 0xfffff), }; =20 /* --=20 2.34.1 From nobody Fri Dec 19 10:57:30 2025 Received: from mx0b-00069f02.pphosted.com (mx0b-00069f02.pphosted.com [205.220.177.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E696220DC4 for ; Tue, 19 Dec 2023 15:12:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oracle.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oracle.com Authentication-Results: smtp.subspace.kernel.org; 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Tue, 19 Dec 2023 15:12:27 +0000 Received: from pps.filterd (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (8.17.1.19/8.17.1.19) with ESMTP id 3BJDuAKW028981; Tue, 19 Dec 2023 15:12:26 GMT Received: from pps.reinject (localhost [127.0.0.1]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTPS id 3v12b6w7p2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Dec 2023 15:12:26 +0000 Received: from phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3BJF7SdV008899; Tue, 19 Dec 2023 15:12:26 GMT Received: from localhost.localdomain (dhcp-10-175-58-169.vpn.oracle.com [10.175.58.169]) by phxpaimrmta03.imrmtpd1.prodappphxaev1.oraclevcn.com (PPS) with ESMTP id 3v12b6w71u-6; Tue, 19 Dec 2023 15:12:25 +0000 From: Vegard Nossum To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, Brian Gerst , Peter Zijlstra , Linus Torvalds , Vegard Nossum Subject: [PATCH 5/5] x86: add DB flag to 32-bit percpu GDT entry Date: Tue, 19 Dec 2023 16:12:00 +0100 Message-Id: <20231219151200.2878271-6-vegard.nossum@oracle.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231219151200.2878271-1-vegard.nossum@oracle.com> References: <20231219151200.2878271-1-vegard.nossum@oracle.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-19_08,2023-12-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 mlxscore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312190113 X-Proofpoint-GUID: 5IeiefAD5OtgnnxlBoEVhp68y83iybXq X-Proofpoint-ORIG-GUID: 5IeiefAD5OtgnnxlBoEVhp68y83iybXq Content-Type: text/plain; charset="utf-8" The D/B size flag for the 32-bit percpu GDT entry was not set. The Intel manual (vol 3, section 3.4.5) only specifies the meaning of this flag for three cases: 1) code segments used for %cs -- doesn't apply here 2) stack segments used for %ss -- doesn't apply 3) expand-down data segments -- but we don't have the expand-down flag set, so it also doesn't apply here The flag likely doesn't do anything here, although the manual does also say: "This flag should always be set to 1 for 32-bit code and data segments [...]" so we should probably do it anyway. Link: https://lore.kernel.org/all/CAHk-=3Dwib5XLebuEra7y2YH96wxdk=3D8vJnA8X= oVq0FExpzVvN=3DQ@mail.gmail.com/ Signed-off-by: Vegard Nossum --- arch/x86/kernel/setup_percpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index f2583de97a64..b30d6e180df7 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c @@ -106,7 +106,7 @@ void __init pcpu_populate_pte(unsigned long addr) static inline void setup_percpu_segment(int cpu) { #ifdef CONFIG_X86_32 - struct desc_struct d =3D GDT_ENTRY_INIT(DESC_DATA32 & ~_DESC_DB, + struct desc_struct d =3D GDT_ENTRY_INIT(DESC_DATA32, per_cpu_offset(cpu), 0xFFFFF); =20 write_gdt_entry(get_cpu_gdt_rw(cpu), GDT_ENTRY_PERCPU, &d, DESCTYPE_S); --=20 2.34.1